gem5-dev  

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• • [gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Split decodeDataProcReg into subfunctions Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Define a AA64ZFR0 data type Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Define a AA64ZFR0 data type Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_RNG Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_RNG Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_IDST Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_IDST Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCR to be 64-bit wide Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCR to be 64-bit wide Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix printing of VecElemClass registers Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix printing of VecElemClass registers Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] Hyperthreading in X86 full system mode Ishita Chaturvedi via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Fix nbio psp ring assert Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Fix nbio psp ring assert Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] Build failed in Jenkins: nightly #607 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Jenkins build is back to normal : nightly #608 jenkins-no-reply--- via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-riscv: Fix WFI for O3 CPU Bobby Bruce (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-riscv: Fix WFI for O3 CPU Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix position of AA64ISAR0.AES bitfield Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix position of AA64ISAR0.AES bitfield Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: base: add Activate to enable log of particular targets Yan Lee (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: base: add Activate to enable log of particular targets Yan Lee (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: sim,python: add activate option and method Yan Lee (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: sim,python: add activate option and method Yan Lee (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: merge rv32 and rv64 version of xperm4 and xperm8 Roger Chang (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Merge rv32 and rv64 version of xperm4 and xperm8 Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: arch-riscv: Simplify amd merge RV32/RV64 the RVM instructions Roger Chang (Gerrit) via gem5-dev
  • [gem5-dev] [L] Change in gem5/gem5[develop]: arch-riscv: Simplify amd merge RV32/RV64 the RVM instructions Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-riscv: simply the rev8 and brev8 instruction Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-riscv: Add BS format isa Roger Chang (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-riscv: Add BS format isa Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] ?????? GEM5-GCN-DNNMark get Invalid filter channel number when running: dnnmark_test_VGG, dnnmark_test_alexnet, dnnmark_test_fwd_conv 429442672 via gem5-dev
  • [gem5-dev] Re: GEM5-GCN-DNNMark get Invalid filter channel number when running: dnnmark_test_VGG, dnnmark_test_alexnet, dnnmark_test_fwd_conv Matt Sinclair via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-gcn3,arch-vega: Fix ds_read2st64_b32 Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-gcn3,arch-vega: Fix ds_read2st64_b32 Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_TLBIOS Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement FEAT_TLBIOS Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement RES0/RES1 with miscreg specifiers Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement RES0/RES1 with miscreg specifiers Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Provide default mask for raz/rao helpers Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Provide default mask for raz/rao helpers Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add UNSERIALIZE flag to address cpt compatibility Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add UNSERIALIZE flag to address cpt compatibility Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCTLR to be 64-bit wide Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Extend SCTLR to be 64-bit wide Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move RO values from ISA::read to the reset field Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move RO values from ISA::read to the reset field Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Simplify FPSCR writes Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Simplify FPSCR writes Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Remove unnecessary case in ISA::readMiscReg Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Remove unnecessary case in ISA::readMiscReg Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Implement RAZ/WI with raz specifier Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Implement RAZ/WI with raz specifier Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Group self hosted debug writes in ISA switch Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Group self hosted debug writes in ISA switch Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Treat RVC HINT as nops rather than trap Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Fix the fflags issue for fcvt_d_w, fcvt_d_wu, fcvt_d_l fc... Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Refactor RVC decode flow when funct4==0b1001 and op==C2 Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Add missing zbkb instructions Roger Chang (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Add missing zbkb instructions Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: tests: Add '--duplicate-sources' to libgem5 SST build Bobby Bruce (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: tests: Add '--duplicate-sources' to libgem5 SST build Alex Richardson (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove clear32/64 methods Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove clear32/64 methods Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID64 using BitUnions Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID64 using BitUnions Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: VMPIDR_EL2 can be used in secure mode as well Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: VMPIDR_EL2 can be used in secure mode as well Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID64 Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID64 Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID32 Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID32 Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MIDR_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MIDR_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix read redirection for MIDR register Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix read redirection for MIDR register Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move MISCREG init logic from ISA to reset field Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move MISCREG init logic from ISA to reset field Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MPIDR_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MPIDR_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map CTR_EL0 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map CTR_EL0 to AArch32 version Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Generalize SCTLR_RST behaviour Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Generalize SCTLR_RST behaviour Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID32 using BitUnions Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID32 using BitUnions Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Make MISCREGs reset value configurable Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Make MISCREGs reset value configurable Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Replace 0ing of miscRegs with assignment of reset value Giacomo Travaglini (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Replace 0ing of miscRegs with assignment of reset value Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: configs: Add --pmu-{dump,reset}-stats-on to Arm baremetal.py. Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add support to exit the simloop on PMU interrupt Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: misc: [WIP] ADD Vega GPU-FS tests Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: dev: Fix Linux specific includes to be portable Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: gpu-compute: Remove use of 'std::random_shuffle' Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: dev-amdgpu: Add missing 'overrides' Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] v23.0 staging branch to be created on May 24th Bobby Bruce via gem5-dev
  • [gem5-dev] Re: v23.0 staging branch to be created on May 24th Bobby Bruce via gem5-dev
  • [gem5-dev] Re: v23.0 staging branch to be created on May 24th Bobby Bruce via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add support to exit the simloop on PMU control Richard Cooper (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add support to exit the simloop on PMU control Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] Problem on simulating GCN3 GPU: Running DNNMask too slow. 429442672 via gem5-dev
  • [gem5-dev] Problem on simulating GCN3 GPU: Running DNNMark too slow. 429442672 via gem5-dev
  • [gem5-dev] Re: Problem on simulating GCN3 GPU: Running DNNMark too slow. Matt Sinclair via gem5-dev
  • [gem5-dev] ?????? Problem on simulating GCN3 GPU: Running DNNMark too slow. 429442672 via gem5-dev
  • [gem5-dev] Re: Problem on simulating GCN3 GPU: Running DNNMark too slow. Matt Sinclair via gem5-dev
  • [gem5-dev] GEM5-GCN-DNNMark get Invalid filter channel number when running: dnnmark_test_VGG, dnnmark_test_alexnet, dnnmark_test_fwd_conv 429442672 via gem5-dev
  • [gem5-dev] Re: GEM5-GCN-DNNMark get Invalid filter channel number when running: dnnmark_test_VGG, dnnmark_test_alexnet, dnnmark_test_fwd_conv Matt Sinclair via gem5-dev
• [gem5-dev] Changes to stats output Melissa Jost via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: misc: Fix 'unused variable' clang errors with gem5.fast Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [NoOp] Change in gem5/gem5[develop]: cpu-o3: Remove duplicated O3 stats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: cpu: Remove duplicated execute stats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: cpu: Remove duplicate base inst and op stats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu-o3: Use base instructions committed counters in O3CPU Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu-o3: Copy O3 IEW stats to BaseCPU::ExecuteCPUStats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu: Move fetch stats from simple and minor to base Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: cpu: Move commit stats from simple to base cpu Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: cpu: Remove duplicated commit stats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu-o3: Copy general O3 fetch stats to BaseCPU::FetchCPUStats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu: Remove duplicated fetch stats Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: base,arch,mem: Remove {GE}M5_VAR_USED instances Bobby Bruce (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: base,arch,mem: Remove {GE}M5_VAR_USED instances Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] Build failed in Jenkins: nightly #599 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Jenkins build is back to normal : nightly #600 jenkins-no-reply--- via gem5-dev
• [gem5-dev] Build failed in Jenkins: compiler-checks #599 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Jenkins build is back to normal : compiler-checks #600 jenkins-no-reply--- via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: configs,dev-amdgpu: GPUFS MI200/gfx90a support Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: configs,dev-amdgpu: GPUFS MI200/gfx90a support Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: scons: Fix gem5 Python3.11 build. Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: misc: Fix 'unused variable' clang errors with gem5.fast Bobby Bruce (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Partial SVE2 Implementation Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: scons: Fix lex.py for Python3.11 build. Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: scons: Fix gem5 Python3.11 build. Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-riscv: Add RV32 only Zk instruction extensions Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-riscv: seperate RV32 and RV64 Zk extensions Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] Build failed in Jenkins: compiler-checks #593 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Jenkins build is back to normal : compiler-checks #594 jenkins-no-reply--- via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: dev-amdgpu: Remove unused psp_ring_retval integer Melissa Jost (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: dev-amdgpu: Remove unused psp_ring_retval integer Melissa Jost (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: tests: Add GPU-FS checkpoint test to weekly VISHNU RAMADAS (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Update riscv/fs_linux.py script Ayaz Akram (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Update riscv/fs_linux.py script Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: fastmodel: Remove sendFunc Wei-Han Chen (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: fastmodel: Remove sendFunc Wei-Han Chen (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-riscv: Remove Riscv32CPU instance Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: tests: Revert "arch-riscv: add RV32 ADFIMU_Zfh instruction tests" Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm,cpu: Add four Arm SVE2 int instructions Prajwal Rathnakar Hegde (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm,cpu: Add four Arm SVE2 int instructions Prajwal Rathnakar Hegde (Gerrit) via gem5-dev
• [gem5-dev] Build failed in Jenkins: compiler-checks #588 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Build failed in Jenkins: compiler-checks #589 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Build failed in Jenkins: compiler-checks #590 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Build failed in Jenkins: compiler-checks #591 jenkins-no-reply--- via gem5-dev
• [gem5-dev] Build failed in Jenkins: nightly #588 jenkins-no-reply--- via gem5-dev
  • [gem5-dev] Jenkins build is back to normal : nightly #589 jenkins-no-reply--- via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: mem: Fix SW prefetch asynchronous handling Giacomo Travaglini (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: Revert "arch-riscv: add RV32 ADFIMU_Zfh instruction tests" Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Update vega10_kvm.py to add checkpointing instruction VISHNU RAMADAS (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Update vega10_kvm.py to add checkpointing instruction VISHNU RAMADAS (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Add a few MQD attributes to GPUFS checkpoint VISHNU RAMADAS (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Add a few MQD attributes to GPUFS checkpoint VISHNU RAMADAS (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch: Add vector function unit and OpClass enums Roger Chang (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: base: Use the MSB rather than the LSB in AddrRange:removeIntlvBits Nikos Nikoleris (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: base: Update <experimental/filesystem> include Melissa Jost (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: arch-vega: Add decodings for new MI100 VOP2 insts Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: arch-vega: Add decodings for new MI100 VOP2 insts Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Add writeROM method Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Add writeROM method Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: dev-amdgpu: Default MMIO reads when previously written Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: dev-amdgpu: Default MMIO reads when previously written Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: dev-amdgpu: Refactor MMIO interface for SDMA engines Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: dev-amdgpu: Refactor MMIO interface for SDMA engines Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu,configs: Add human readable names for different GPUs Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu,configs: Add human readable names for different GPUs Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [L] Change in gem5/gem5[develop]: dev-amdgpu: Enable more GPUs with device specific registers Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [L] Change in gem5/gem5[develop]: dev-amdgpu: Enable more GPUs with device specific registers Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: stdlib: write device tree after setting up bootloader in ARMBoard Hoa Nguyen (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: stdlib: write device tree after setting up bootloader in ARMBoard Hoa Nguyen (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: cpu: Patch for not building PcCountTracker when ISA is NULL Zhantong Qiu (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: stdlib: Patch to fix restoring with LoopPoint resource Zhantong Qiu (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Add simple check for valid GPU MMIO trace Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Add simple check for valid GPU MMIO trace Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Allow other CPU types in GPUFS Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Allow other CPU types in GPUFS Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Use higher dmesg level for GPUFS Matthew Poremba (Gerrit) via gem5-dev
  • [gem5-dev] [XS] Change in gem5/gem5[develop]: configs: Use higher dmesg level for GPUFS Matthew Poremba (Gerrit) via gem5-dev
• [gem5-dev] [M] Change in gem5/gem5[develop]: configs: Add `--with-pmu` option to the simple Arm FS configs Richard Cooper (Gerrit) via gem5-dev
  • [gem5-dev] [M] Change in gem5/gem5[develop]: configs: Add `--with-pmu` option to the simple Arm FS configs Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: configs: Add baremetal.py option to dump stats on PMU interrupt. Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add option to dump & reset stats on Arm PMU interrupt Richard Cooper (Gerrit) via gem5-dev
• [gem5-dev] Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing?? 429442672 via gem5-dev
  • [gem5-users] Re: Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing？ Matt Sinclair via gem5-users
  • [gem5-dev] Re: Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing？ Matt Sinclair via gem5-dev
  • [gem5-dev] ?????? Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing?? 429442672 via gem5-dev
  • [gem5-dev] Re: Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing？ Matt Sinclair via gem5-dev
  • [gem5-dev] ??????[gem5-users] Re: Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing?? 429442672 via gem5-dev
  • [gem5-dev] ????????????[gem5-users] Re: Hi, i'm new to gem5. is there a way to make simulation for a CPU-GPU heterogeneous computing?? 429442672 via gem5-dev

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