Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/70463?usp=email )
Change subject: arch-arm: Map CTR_EL0 to AArch32 version
......................................................................
arch-arm: Map CTR_EL0 to AArch32 version
Change-Id: Ia3e0cafa1bd2a3054b286e79ac378c895d6910e8
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70463
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
---
M src/arch/arm/regs/misc.cc
1 file changed, 2 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
Richard Cooper: Looks good to me, approved
diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 706716e..a31b6de 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -3681,7 +3681,8 @@
InitReg(MISCREG_CTR_EL0)
.faultRead(EL0, faultCtrEL0)
.faultRead(EL1, HCR_TRAP(tid2))
- .reads(1);
+ .reads(1)
+ .mapsTo(MISCREG_CTR);
InitReg(MISCREG_DCZID_EL0)
.reads(1);
InitReg(MISCREG_VPIDR_EL2)
--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia3e0cafa1bd2a3054b286e79ac378c895d6910e8
Gerrit-Change-Number: 70463
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
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