Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/70566?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: arch-arm: Extend SCTLR to be 64-bit wide
......................................................................
arch-arm: Extend SCTLR to be 64-bit wide
In AArch64 SCTLR_EL1/_EL2/_EL3 is 64-bit wide
Change-Id: I80931f9dd1a57f3132229b84d32a8ab08eee3371
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Richard Cooper <richard.coo...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70566
Tested-by: kokoro <noreply+kok...@google.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
---
M src/arch/arm/regs/misc_types.hh
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
kokoro: Regressions pass
Richard Cooper: Looks good to me, approved
Jason Lowe-Power: Looks good to me, approved
diff --git a/src/arch/arm/regs/misc_types.hh
b/src/arch/arm/regs/misc_types.hh
index e6f7e40..c139f1a 100644
--- a/src/arch/arm/regs/misc_types.hh
+++ b/src/arch/arm/regs/misc_types.hh
@@ -371,7 +371,7 @@
Bitfield<0> ns;
EndBitUnion(SCR)
- BitUnion32(SCTLR)
+ BitUnion64(SCTLR)
Bitfield<31> enia; // ARMv8.3 PAuth
Bitfield<30> enib; // ARMv8.3 PAuth
Bitfield<30> te; // Thumb Exception Enable (AArch32 only)
--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I80931f9dd1a57f3132229b84d32a8ab08eee3371
Gerrit-Change-Number: 70566
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Richard Cooper <richard.coo...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
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