Roger Chang has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/67293?usp=email )
Change subject: arch: Add vector function unit and OpClass enums
......................................................................
arch: Add vector function unit and OpClass enums
These enums are needed for risc-v vector extension
Change-Id: Ia61682c43c89ac2043fb9d1d5c349dfd646fb88d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67293
Tested-by: kokoro <noreply+kok...@google.com>
Maintainer: Bobby Bruce <bbr...@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoangu...@ucdavis.edu>
Reviewed-by: Roger Chang <rogerycch...@google.com>
---
M src/cpu/FuncUnit.py
M src/cpu/op_class.hh
2 files changed, 43 insertions(+), 0 deletions(-)
Approvals:
Hoa Nguyen: Looks good to me, approved
Bobby Bruce: Looks good to me, approved
kokoro: Regressions pass
Roger Chang: Looks good to me, approved
diff --git a/src/cpu/FuncUnit.py b/src/cpu/FuncUnit.py
index 4a2733a..a1050de 100644
--- a/src/cpu/FuncUnit.py
+++ b/src/cpu/FuncUnit.py
@@ -98,6 +98,25 @@
"FloatMemWrite",
"IprAccess",
"InstPrefetch",
+ "VectorUnitStrideLoad",
+ "VectorUnitStrideStore",
+ "VectorUnitStrideMaskLoad",
+ "VectorUnitStrideMaskStore",
+ "VectorStridedLoad",
+ "VectorStridedStore",
+ "VectorIndexedLoad",
+ "VectorIndexedStore",
+ "VectorUnitStrideFaultOnlyFirstLoad",
+ "VectorWholeRegisterLoad",
+ "VectorWholeRegisterStore",
+ "VectorIntegerArith",
+ "VectorFloatArith",
+ "VectorFloatConvert",
+ "VectorIntegerReduce",
+ "VectorFloatReduce",
+ "VectorMisc",
+ "VectorIntegerExtension",
+ "VectorConfig",
]
diff --git a/src/cpu/op_class.hh b/src/cpu/op_class.hh
index 4de018f..94d2794 100644
--- a/src/cpu/op_class.hh
+++ b/src/cpu/op_class.hh
@@ -108,6 +108,30 @@
static const OpClass FloatMemWriteOp = enums::FloatMemWrite;
static const OpClass IprAccessOp = enums::IprAccess;
static const OpClass InstPrefetchOp = enums::InstPrefetch;
+static const OpClass VectorUnitStrideLoadOp = enums::VectorUnitStrideLoad;
+static const OpClass VectorUnitStrideStoreOp =
enums::VectorUnitStrideStore;
+static const OpClass VectorUnitStrideMaskLoadOp
+ = enums::VectorUnitStrideMaskLoad;
+static const OpClass VectorUnitStrideMaskStoreOp
+ = enums::VectorUnitStrideMaskStore;
+static const OpClass VectorStridedLoadOp = enums::VectorStridedLoad;
+static const OpClass VectorStridedStoreOp = enums::VectorStridedStore;
+static const OpClass VectorIndexedLoadOp = enums::VectorIndexedLoad;
+static const OpClass VectorIndexedStoreOp = enums::VectorIndexedStore;
+static const OpClass VectorUnitStrideFaultOnlyFirstLoadOp
+ = enums::VectorUnitStrideFaultOnlyFirstLoad;
+static const OpClass VectorWholeRegisterLoadOp
+ = enums::VectorWholeRegisterLoad;
+static const OpClass VectorWholeRegisterStoreOp
+ = enums::VectorWholeRegisterStore;
+static const OpClass VectorIntegerArithOp = enums::VectorIntegerArith;
+static const OpClass VectorFloatArithOp = enums::VectorFloatArith;
+static const OpClass VectorFloatConvertOp = enums::VectorFloatConvert;
+static const OpClass VectorIntegerReduceOp = enums::VectorIntegerReduce;
+static const OpClass VectorFloatReduceOp = enums::VectorFloatReduce;
+static const OpClass VectorMiscOp = enums::VectorMisc;
+static const OpClass VectorIntegerExtensionOp =
enums::VectorIntegerExtension;
+static const OpClass VectorConfigOp = enums::VectorConfig;
static const OpClass Num_OpClasses = enums::Num_OpClass;
} // namespace gem5
--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia61682c43c89ac2043fb9d1d5c349dfd646fb88d
Gerrit-Change-Number: 67293
Gerrit-PatchSet: 8
Gerrit-Owner: 轩胡 <huxuan0...@gmail.com>
Gerrit-Reviewer: Bobby Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Roger Chang <rogerycch...@google.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-CC: Giacomo Travaglini <giacomo.travagl...@arm.com>
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