Hi Prafulla:
if just one mail is permitted, I prefer to use
"fanyef...@gmail.com".
Best Regards
Fred
-Original Message-
From: Prafulla Wadaskar [mailto:prafu...@marvell.com]
Sent: Thursday, September 24, 2009 12:35 PM
To: Fred Fan; u-boot@lists.denx.de
Cc: Fan YeFeng-R01011
Sub
Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
for storing environment variables.
Signed-off-by: Rohit Hagargundgi
Signed-off-by: Amul Kumar Saha
---
common/env_onenand.c | 10 ++
include/configs/apollon.h |2 ++
2 files changed, 12 insertions(+)
diff --git a/c
This patch adds support for Flex-OneNAND devices.
Signed-off-by: Rohit Hagargundgi
Signed-off-by: Amul Kumar Saha
---
drivers/mtd/onenand/onenand_base.c | 733 +++-
drivers/mtd/onenand/onenand_bbt.c | 14
drivers/mtd/onenand/onenand_uboot.c |4
include/
Add command for changing Flex-OneNAND SLC / MLC boundary.
Also onenand commands work for Flex-OneNAND.
Signed-off-by: Rohit Hagargundgi
Signed-off-by: Amul Kumar Saha
---
common/cmd_onenand.c | 90 +-
include/configs/apollon.h |2 -
2 files
Hi Scott,
Resending the Flex-OneNAND driver support.
It is now a part of the mainline Linux Kernel.
Reference: http://lists.denx.de/pipermail/u-boot/2009-March/048803.html
Following are the patches:-
Patch 1/3: support for Flex-OneNAND devices.
Patch 2/3: for storing environment variables.
Patch
Dear all,
I am following up on a post I made earlier in the week on U-Boot
hanging (infinite looping) in a particular part of
drivers/usb/host/ehci-hcd.c . I also reported that it works for some
hubs and not for others.
I have been attempting to debug this problem and I have found
something of i
> -Original Message-
> From: u-boot-boun...@lists.denx.de
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Fred Fan
> Sent: Wednesday, September 23, 2009 8:17 PM
> To: u-boot@lists.denx.de
> Cc: Fred.Fan
> Subject: [U-Boot] [PATCH] imx51:Add support basic boot code
> of freescale i
> -Original Message-
> From: Wolfgang Denk [mailto:w...@denx.de]
> Sent: Thursday, September 24, 2009 3:38 AM
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik;
> Ben Warren
> Subject: Re: [U-Boot] [PATCH] net: phy: mv88e61xx.c : fixed
> build warn
Kyungmin Park wrote:
> On Wed, Sep 23, 2009 at 9:05 PM, Tom wrote:
>> Minkyu Kang wrote:
>>> Dear Tom
>>>
>>> 2009/9/23 Tom :
Minkyu Kang wrote:
> Adds new board SMDKC100 that uses s5pc100 SoC
>
> Signed-off-by: Minkyu Kang
> Signed-off-by: HeungJun, Kim
> ---
>>
>>
>>>
Kyungmin Park wrote:
> On Wed, Sep 23, 2009 at 7:49 PM, Minkyu Kang wrote:
>> Dear Tom.
>>
>> 2009/9/22 Tom :
>>> Minkyu Kang wrote:
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang
Signed-off-by: Kyungmin Park
---
Changes since v1:
Wolfgang Denk wrote:
> Dear Tom,
>
> In message <4ab8cf0b.5070...@windriver.com> you wrote:
>> I would like to set up a process where I just cherry picked your changes
>> directly from marvell/master.
>
> Please pull in the normal case, don't cherry-pick unless really necessary.
>
>> If I can as
Olof Johansson said the following on 09/24/2009 03:38 AM:
> On Sep 23, 2009, at 7:34 PM, Nishanth Menon wrote:
>
>> Olof Johansson said the following on 09/23/2009 09:43 PM:
>>> On Sep 23, 2009, at 1:39 PM, Tom wrote:
>>>
>>>
Olof Johansson wrote:
> diff --git a/board/overo/overo.c b/
Olof Johansson wrote:
> On Sep 23, 2009, at 7:34 PM, Nishanth Menon wrote:
>
>> Olof Johansson said the following on 09/23/2009 09:43 PM:
>>> On Sep 23, 2009, at 1:39 PM, Tom wrote:
>>>
>>>
Olof Johansson wrote:
> diff --git a/board/overo/overo.c b/board/overo/overo.c
> index dd6
Wolfgang Denk said the following on 09/23/2009 10:51 PM:
> Dear Nishanth Menon,
>
> In message <1253326918-1670-7-git-send-email...@ti.com> you wrote:
>
>> --===1247028818==
>>
>> From: David Brownell
>>
>> Start of SDP3430 support in "mainline"
>> u-boot mainline code
>>
>> Origina
Wolfgang Denk said the following on 09/23/2009 11:04 PM:
> Dear Nishanth Menon,
>
> In message <4ab4fad6.20...@gmail.com> you wrote:
>
>> This patch is need for booting SDP3430 from NOR flash.
>>
>
> There must be some problem elsewhere. It's extremely unlikely that
> just a single bo
Olof Johansson said the following on 09/23/2009 09:43 PM:
> On Sep 23, 2009, at 1:39 PM, Tom wrote:
>
>
>> Olof Johansson wrote:
>>
>>> diff --git a/board/overo/overo.c b/board/overo/overo.c
>>> index dd6d286..7d87e52 100644
>>> --- a/board/overo/overo.c
>>> +++ b/board/overo/overo.c
>>>
On Sep 23, 2009, at 7:34 PM, Nishanth Menon wrote:
> Olof Johansson said the following on 09/23/2009 09:43 PM:
>> On Sep 23, 2009, at 1:39 PM, Tom wrote:
>>
>>
>>> Olof Johansson wrote:
>>>
diff --git a/board/overo/overo.c b/board/overo/overo.c
index dd6d286..7d87e52 100644
--- a/bo
On Wed, Sep 23, 2009 at 7:49 PM, Minkyu Kang wrote:
> Dear Tom.
>
> 2009/9/22 Tom :
>> Minkyu Kang wrote:
>>> This patch includes the onenand driver for s5pc100
>>>
>>> Signed-off-by: Minkyu Kang
>>> Signed-off-by: Kyungmin Park
>>> ---
>>> Changes since v1:
>>> - move samsung_onenand.h to inclu
On Wed, Sep 23, 2009 at 9:05 PM, Tom wrote:
> Minkyu Kang wrote:
>> Dear Tom
>>
>> 2009/9/23 Tom :
>>> Minkyu Kang wrote:
Adds new board SMDKC100 that uses s5pc100 SoC
Signed-off-by: Minkyu Kang
Signed-off-by: HeungJun, Kim
---
>
>
>
+#ifndef CONFIG_ONENAND_IPL
>>>
On Sep 23, 2009, at 4:00 PM, Tom wrote:
> Olof Johansson wrote:
>> Hi,
>> On Sep 23, 2009, at 2:16 PM, Wolfgang Denk wrote:
>>> Dear Olof Johansson,
>>>
>>> In message <1d0f4997-6af4-4bc3-94c3-0817551db...@lixom.net> you
>>> wrote:
>>> ...
> Use the omap gpio interface described in README.o
On Thu, 2009-09-24 at 00:31 +0200, Wolfgang Denk wrote:
> Dear Peter Tyser,
>
> In message <1253550038-16734-1-git-send-email-pty...@xes-inc.com> you wrote:
> > This series attempts to fix relocation to RAM for ppc boards.
> >
> > I split the patches up pretty liberally, let me know if you'd like
Dear Peter Tyser,
In message <1253552673-22299-2-git-send-email-pty...@xes-inc.com> you wrote:
> Signed-off-by: Peter Tyser
> ---
> MAKEALL |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: W
Dear Peter Tyser,
In message <1253552673-22299-1-git-send-email-pty...@xes-inc.com> you wrote:
> This change adds some basic summary information to the MAKEALL script.
> The summary information includes how many boards were compiled, how many
> boards had compile warnings or errors, and which spec
> In message <1253550038-16734-14-git-send-email-pty...@xes-inc.com> you wrote:
> > Now that proper relocation is supported, the reloc_off field is no longer
> > necessary.
> >
> > Note that the location of the standalone application jump table pointer
> > in the global data structure is affected
Dear Peter Tyser,
In message <1253550038-16734-1-git-send-email-pty...@xes-inc.com> you wrote:
> This series attempts to fix relocation to RAM for ppc boards.
>
> I split the patches up pretty liberally, let me know if you'd like
> them organized differently.
>
> I tried to be thorough during th
Dear Peter Tyser,
In message <1253550038-16734-14-git-send-email-pty...@xes-inc.com> you wrote:
> Now that proper relocation is supported, the reloc_off field is no longer
> necessary.
>
> Note that the location of the standalone application jump table pointer
> in the global data structure is af
[Re: [U-Boot] [PATCH 3/8] sbc8548: enable access to second bank of flash] On
23/09/2009 (Wed 22:48) Wolfgang Denk wrote:
> Dear Paul Gortmaker,
>
> In message <4aba81da.8020...@windriver.com> you wrote:
> >
> > I'd considered the line length, but there were many lines in tlb.c
> > that were alre
Dear "Eric Millbrandt",
In message <20090921160101.m47...@coldhaus.com> you wrote:
> Add version environment variable to the galaxy5200 board header file.
>
> Signed-off-by: Eric Millbrandt
> ---
> include/configs/galaxy5200.h |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
Appli
Dear Detlev Zundel,
In message <1253537396-8685-2-git-send-email-...@denx.de> you wrote:
> From: Werner Pfister
>
> Signed-off-by: Werner Pfister
> Signed-off-by: Detlev Zundel
> ---
> include/configs/digsy_mtc.h |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
Applied, thanks.
Dear Detlev Zundel,
In message <1253537396-8685-1-git-send-email-...@denx.de> you wrote:
> From: Werner Pfister
>
> This is needed to correctly start the charging of an attached capacitor
> or battery.
>
> Signed-off-by: Werner Pfister
> Signed-off-by: Detlev Zundel
> ---
> drivers/rtc/ds133
Dear Stefan Roese,
In message <200909231605.39337...@denx.de> you wrote:
> The following changes since commit 3b6a9267f0de7b85d387fa4123d0b58379363447:
> Wolfgang Denk (1):
> board/flagadm/flash.c: fix compile warning
>
> are available in the git repository at:
>
> git://www.denx.de/
Dear Stefan Roese,
In message <200909231605.02544...@denx.de> you wrote:
> The following changes since commit 3b6a9267f0de7b85d387fa4123d0b58379363447:
> Wolfgang Denk (1):
> board/flagadm/flash.c: fix compile warning
>
> are available in the git repository at:
>
> git://www.denx.de/
Dear Kumar Gala,
In message you wrote:
> The following changes since commit 3b6a9267f0de7b85d387fa4123d0b58379363447:
> Wolfgang Denk (1):
> board/flagadm/flash.c: fix compile warning
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-mpc85xx.git master
>
> Ku
Dear Tom,
In message <4ab8cf0b.5070...@windriver.com> you wrote:
>
> I would like to set up a process where I just cherry picked your changes
> directly from marvell/master.
Please pull in the normal case, don't cherry-pick unless really necessary.
> If I can assume what is good in marvell/maste
Dear Prafulla Wadaskar,
In message <1253545099-29437-2-git-send-email-prafu...@marvell.com> you wrote:
>
> following build warning was observed
>
> mv88e61xx.c: In function âmv88e61xx_busychkâ:
Please don't use non-text characters in the commit messages.
(Ben, please edit when applying).
Dear Paul Gortmaker,
In message
<5ad17f25a126b25be24467d1712d30a775a5b494.1253492532.git.paul.gortma...@windriver.com>
you wrote:
> The size of the LB SDRAM on this board is 128MB, spanning CS3
> and CS4. It was previously only being configured for 64MB on
> CS3, since that was what the origina
Dear Fred Fan,
In message <12537172421605-git-send-email-fanyef...@gmail.com> you wrote:
> This patch just supports boot into u-boot from mmc or spi-nor flash.
> It just implements console, iomux and clock. There are no ethernet,
> nor-flash, mmc or other peripheral drivers.
>
> Signed-off-by: Fr
> index 39fdb8e..100dfe1 100644
> --- a/include/asm-ppc/immap_85xx.h
> +++ b/include/asm-ppc/immap_85xx.h
> @@ -16,6 +16,29 @@
> #include
> #include
>
> +typedef struct ccsr_local {
> + u32 ccsrbarh; /* 0x0 - Control Configuration Status Registers
> Base
> Address Register High *
Olof Johansson wrote:
> Hi,
>
> On Sep 23, 2009, at 2:16 PM, Wolfgang Denk wrote:
>
>> Dear Olof Johansson,
>>
>> In message <1d0f4997-6af4-4bc3-94c3-0817551db...@lixom.net> you wrote:
>> ...
Use the omap gpio interface described in README.omap3
>>>
>>> Seriously, this code is a 1:1 replica
Dear Kumar Gala,
In message <19e9b551-f442-4ba2-98a3-c941620e4...@kernel.crashing.org> you wrote:
>
> Dope, posted the wrong version. I agree w/the long lines, not sure
> what to do about it. Move to something like:
>
> typedef struct ccsr_local {
> /* 0x0 - Control Configuration Statu
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities insid
On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms
the core not longer controls the enabling of the timebase. We now need
to enable the boot core's timebase via CCSR register writes.
Signed-off-by: Kumar
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080
Signed-off-by: Kumar Gala
---
cpu/mpc85xx/Makefile|1 +
cpu/m
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address. Also, the target IDs
on CoreNet platforms have been completely re-assigned.
Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet
The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style. Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.
Signed-off-by: Kumar Gala
---
* Renamed pq3_mp_up to plat_mp_up
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform. We reuse the 85xx immap and just add new definitions for
local access and global utils. The global utils is now broken into
global utils, clocking and run control/power management.
The offsets from CCSR for a numbe
On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.
Signed-off-by: Kumar Gala
Signed-off-by: Scott Wood
---
* Added setup_ccsrbar helper to deal with PQ3 vs CoreNet diffs
cpu/mpc85xx/cpu_init_early.c | 72
Dear Paul Gortmaker,
In message <4aba81da.8020...@windriver.com> you wrote:
>
> I'd considered the line length, but there were many lines in tlb.c
> that were already way past 80 char (see directly under the
> comment/* TLB 0 - for temp stack in cache */ ) so I
> decided to be consistent wit
Dear Kumar Gala,
In message <1253380099-27864-7-git-send-email-ga...@kernel.crashing.org> you
wrote:
> The means to determine the core, bus, and DDR frequencies are completely
> new on CoreNet style platforms. Additionally on p4080 we can have
> different frequencies for FMAN and PME IP blocks.
On Sep 23, 2009, at 1:37 PM, Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message <1253380099-27864-1-git-send-email-ga...@kernel.crashing.org
> > you wrote:
>> The p4080 SoC has a significant amount of commonality with the 85xx/
>> PQ3
>> platform. We reuse the 85xx immap and just add new d
Dear Kumar Gala,
In message <1253380099-27864-6-git-send-email-ga...@kernel.crashing.org> you
wrote:
> On CoreNet style platforms the timebase frequency is the bus frequency
> defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms
> the core not longer controls the enabling of t
Dear Kumar Gala,
In message <1253380099-27864-1-git-send-email-ga...@kernel.crashing.org> you
wrote:
> The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
> platform. We reuse the 85xx immap and just add new definitions for
> local access and global utils. The global utils i
Dear Kumar Gala,
In message <1253376008-13225-2-git-send-email-ga...@kernel.crashing.org> you
wrote:
> On CoreNet based platforms the LAW address is split between an high &
> low register and we no longer shift the address. Also, the target IDs
> on CoreNet platforms have been completely re-assi
Dear Kumar Gala,
In message <1253376008-13225-1-git-send-email-ga...@kernel.crashing.org> you
wrote:
> The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
> platform. We reuse the 85xx immap and just add new definitions for
> local access and global utils. The global utils i
Hi,
On Sep 23, 2009, at 2:16 PM, Wolfgang Denk wrote:
> Dear Olof Johansson,
>
> In message <1d0f4997-6af4-4bc3-94c3-0817551db...@lixom.net> you wrote:
> ...
>>> Use the omap gpio interface described in README.omap3
>>
>> Seriously, this code is a 1:1 replica from the evm code. Obviously
>> that
Wolfgang Denk wrote:
> Dear Paul Gortmaker,
>
> In message
> <7d1e5723fdd2d2e1cf51559f876edf17ae8e7a46.1253315004.git.paul.gortma...@windriver.com>
> you wrote:
>> The PCI/PCI-e support for the sbc8548 was based on an earlier
>> version of what the MPC8548CDS board was using, and in its
>> curre
> Anybody have an idea as to what I'm doing wrong? Could there be
> something wrong with my CLK2?
Once again I'm going to answer my own question. The problem WAS with
CLK2 not being properly initialized. I had to do the following to get
everything working:
1. To get BRG1 to use CLK2, made change
Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message <47177dab-3638-4978-bd72-78629adcd...@kernel.crashing.org> you
> wrote:
>> On Sep 18, 2009, at 6:08 PM, Paul Gortmaker wrote:
> ...
>> applied to 85xx.
>
> Argh... So how much time do you allow for code reviews?
>
> I ask you to wait at lea
Dear Paul Gortmaker,
In message
<7d1e5723fdd2d2e1cf51559f876edf17ae8e7a46.1253315004.git.paul.gortma...@windriver.com>
you wrote:
> The PCI/PCI-e support for the sbc8548 was based on an earlier
> version of what the MPC8548CDS board was using, and in its
> current state it won't even compile. T
Dear Kumar Gala,
In message <96e0cbb9-5b6c-40ee-b6bd-703b3d8cc...@kernel.crashing.org> you wrote:
>
> On Sep 18, 2009, at 6:08 PM, Paul Gortmaker wrote:
...
> it would be nice to move this to using IO accessors (out_be32)
Not only nice, but necessary. Thanks for catching this.
Best regards,
Wo
Dear Paul Gortmaker,
In message
<8c4c3a2e238ee8ef67637f499cc3269acbb1bf00.1253315004.git.paul.gortma...@windriver.com>
you wrote:
> The size of the LB SDRAM on this board is 128MB, spanning CS3
> and CS4. It was previously only being configured for 64MB on
> CS3, since that was what the origina
Dear Kumar Gala,
In message <47177dab-3638-4978-bd72-78629adcd...@kernel.crashing.org> you wrote:
>
> On Sep 18, 2009, at 6:08 PM, Paul Gortmaker wrote:
...
> applied to 85xx.
Argh... So how much time do you allow for code reviews?
I ask you to wait at least 3...5 working days, please.
Please
Dear Paul Gortmaker,
In message
<918ca661b391ce156f39e6c8a086ea93d845caea.1253315004.git.paul.gortma...@windriver.com>
you wrote:
> The sbc8548 has a 64MB SODIMM flash module off of CS6 that
> previously wasn't enumerated by u-boot. There were already
> BR6/OR6 settings for it [used by cpu_init
Dear Nishanth Menon,
In message <4ab4fad6.20...@gmail.com> you wrote:
>
> This patch is need for booting SDP3430 from NOR flash.
There must be some problem elsewhere. It's extremely unlikely that
just a single board has this problem; it's much more likely that
there is a bug in the board
Dear Nishanth Menon,
In message <1253326918-1670-2-git-send-email...@ti.com> you wrote:
> Defaults are for infenion DDR timings.
Typo: Infineon.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-821
Dear Nishanth Menon,
In message <1253326918-1670-7-git-send-email...@ti.com> you wrote:
> --===1247028818==
>
> From: David Brownell
>
> Start of SDP3430 support in "mainline"
> u-boot mainline code
>
> Original Patch written by David Brownell
Um... this seems redundant informatio
Dear Olof Johansson,
In message <1d0f4997-6af4-4bc3-94c3-0817551db...@lixom.net> you wrote:
...
> > Use the omap gpio interface described in README.omap3
>
> Seriously, this code is a 1:1 replica from the evm code. Obviously
> that code was good enough to merge.
Isn't this godd? It means that
Dear Niklaus Giger,
In message <1253719369-26565-3-git-send-email-niklaus.gi...@netstal.com> you
wrote:
> Various cleanups for our boards:
> - vxworks_preboot to get clock input right for HCU4/MCU25
> - reboot if SW-install-input is activated
> - clear vxWorks exception msg
> - HCU5: various HW-r
Dear Niklaus Giger,
In message <1253719369-26565-2-git-send-email-niklaus.gi...@netstal.com> you
wrote:
> - CONFIG_SYS_BOOTMAPSZ for 16 instead of 8 MB, moved to common
> - baudrate back to 9600 for backward compatibility
> - HCU4: CONFIG_SYS_ICACHE_SACR_VALUE defined
> - CONFIG_VXWORKS_PREBOOT f
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities insid
On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8). Also on the CoreNet platforms
the core not longer controls the enabling of the timebase. We now need
to enable the boot core's timebase via CCSR register writes.
Signed-off-by: Kumar
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080
Signed-off-by: Kumar Gala
---
cpu/mpc85xx/Makefile|1 +
cpu/m
The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style. Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.
Signed-off-by: Kumar Gala
---
* Renamed pq3_mp_up to plat_mp_up
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address. Also, the target IDs
on CoreNet platforms have been completely re-assigned.
Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform. We reuse the 85xx immap and just add new definitions for
local access and global utils. The global utils is now broken into
global utils, clocking and run control/power management.
The offsets from CCSR for a numbe
On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.
Signed-off-by: Kumar Gala
Signed-off-by: Scott Wood
---
* Added setup_ccsrbar helper to deal with PQ3 vs CoreNet diffs
cpu/mpc85xx/cpu_init_early.c | 72
On Sep 23, 2009, at 1:39 PM, Tom wrote:
> Olof Johansson wrote:
>> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
>> over tftp.
>> Based on the omap3 evm code. I added a new highlevel define for Tobi
>> to avoid having it dependent on CMD_NET (which would seem backward in
>>
Olof Johansson wrote:
> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
> over tftp.
>
> Based on the omap3 evm code. I added a new highlevel define for Tobi
> to avoid having it dependent on CMD_NET (which would seem backward in
> this case).
>
> Signed-off-by: Olof Johansso
Dear Niklaus Giger,
In message <1253719369-26565-1-git-send-email-niklaus.gi...@netstal.com> you
wrote:
> Adds a HCU5 board specific cmd reghcu5 to dump about 140 internal
> register which define the HW configuration. Needed for documentation
> purposes and to compare different settings.
>
> Sig
Dear Peter Tyser,
In message <1253710639.3968.19.ca...@ptyser-laptop> you wrote:
>
> My "fix" to the linker script was to change:
> __bss_start = .;
> into:
> __bss_start = . | 4;
>
> ie, a big hack, but it did work:) I'll take a peek at a more proper
> link script workaround.
32 bit alignment
On Tue, Sep 22, 2009 at 09:43:12PM +0200, Wolfgang Denk wrote:
> Dear Scott Wood,
>
> In message <20090911222349.ga26...@b07421-ec1.am.freescale.net> you wrote:
> > On Mon, Sep 07, 2009 at 12:15:22AM +0100,
> > kevin.morf...@fearnside-systems.co.uk wrote:
> > > This patch re-formats the arm920t s
Jeff Palmer wrote:
> Thank you for your work on the defragmenting udp packets and tftp
> block size updates. They are working well.
>
> It took us a little time to compile/test/update everything to the
> newer version of u-boot but I'm glad we did and the large tftp
> tranfers to africa are ru
Am Mittwoch 23 September 2009 18:49:34 schrieb Stefan Roese:
> Hi Niklaus,
>
> On Wednesday 23 September 2009 17:22:47 Niklaus Giger wrote:
> > Adds a HCU5 board specific cmd reghcu5 to dump about 140 internal
> > register which define the HW configuration. Needed for documentation
> > purposes an
On Tue, Sep 22, 2009 at 08:57:33PM +0200, Wolfgang Denk wrote:
> I'm biased. I understand that you do this because you need it for the
> next patch, which reads the environment from MMC card. But then MMC is
> just one out of many storage devices, and with the same right we would
> have to move the
On Sep 22, 2009, at 3:07 PM, Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message <1253307595-28655-5-git-send-email-ga...@kernel.crashing.org
> > you wrote:
>> The CoreNet platform style of bringing secondary cores out of reset
>> is
>> a bit different that the PQ3 style. Mostly the regist
Hi Niklaus,
On Wednesday 23 September 2009 17:22:49 Niklaus Giger wrote:
> Various cleanups for our boards:
> - vxworks_preboot to get clock input right for HCU4/MCU25
> - reboot if SW-install-input is activated
> - clear vxWorks exception msg
> - HCU5: various HW-registers updated
> - HCU5: 2nd E
Peter Tyser wrote on 23/09/2009 14:57:19:
>
>
> > > I made the same changes recently, but ran into an "issue" that prevented
> > > me from sending the change upstream. Some boards/arches have the bss at
> > > address 0 and later relocate it, unlike every other NULL pointer. If
> > > you don't fi
Hi Niklaus,
On Wednesday 23 September 2009 17:22:47 Niklaus Giger wrote:
> Adds a HCU5 board specific cmd reghcu5 to dump about 140 internal
> register which define the HW configuration. Needed for documentation
> purposes and to compare different settings.
Apart from Peter's comments, I also hav
On Sep 23, 2009, at 12:12 AM, Gao Guanhua wrote:
> The clock-frequency of SD controller comes from different source on
> different platform. We add a clock-frequency property in dts file
> and set the value in u-boot.
> ---
> cpu/mpc85xx/fdt.c |6 ++
> 1 files changed, 6 insertions(+), 0 d
On Sep 22, 2009, at 3:05 PM, Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message <1253307595-28655-3-git-send-email-ga...@kernel.crashing.org
> > you wrote:
>> On CoreNet based platforms the LAW address is split between an high &
>> low register and we no longer shift the address. Also, the
Hi Niklaus,
> +enum REGISTER_TYPE {
> + DCR,/* Directly Accessed DCR's */
> + IDCR1, /* Indirectly Accessed DCR to SDRAM0_CFGADDR
> and SDRAM0_CFGDATA */
> + IDCR2, /* Indirectly Accessed DCR to EBC0_CFGADDR and
> EBC0_CFGDATA */
On Tuesday 22 September 2009 16:41:45 Wolfgang Denk wrote:
> Mike Frysinger wrote:
> > > ...
> > >
> > > > $(obj)u-boot.ldr: $(obj)u-boot
> > > > - $(obj)tools/envcrc --binary > $(obj)env-ldr.o
> > > > + $(CREATE_LDR_ENV)
> > > > $(LDR) -T $(CONFIG_
On Wednesday 23 September 2009 10:23:38 Jeffery Palmer wrote:
> From: biggerbadder...@gmail.com
> > Jeffery Palmer wrote:
> > > I do large transfers via tftp, and since the timeout counter never
> > > resets, they often fail since the failures are counted throughout the
> > > entire transfer. By re
On Tuesday 22 September 2009 16:43:14 Wolfgang Denk wrote:
> Mike Frysinger wrote:
> > > > i saw it as "custom embedding of the environment". the only thing it
> > > > does is enable the envcrc binary. i thought of using
> > > > "CONFIG_ENVCRC", but it seemed a little too short.
> > >
> > > CONFI
On Wednesday 23 September 2009 09:41:26 Andreas Pretzsch wrote:
> In Linux, there is support for a UART on a SPORT, see
> linux-2.6.x/drivers/serial/bfin_sport_uart.[ch].
> It can also be used as console.
>
> In U-Boot, I cannot find similar code, therefore I'd like to ask if
> anybody ported/impl
Various cleanups for our boards:
- vxworks_preboot to get clock input right for HCU4/MCU25
- reboot if SW-install-input is activated
- clear vxWorks exception msg
- HCU5: various HW-registers updated
- HCU5: 2nd Ethernet = SMII, Ethernet PLL Config. = recommended values
- HCU5: PATCH HAB: WRITE PI
- CONFIG_SYS_BOOTMAPSZ for 16 instead of 8 MB, moved to common
- baudrate back to 9600 for backward compatibility
- HCU4: CONFIG_SYS_ICACHE_SACR_VALUE defined
- CONFIG_VXWORKS_PREBOOT for HCU4 and MCU25
- HCU5: Add CPU and OCM POST
Signed-off-by: Niklaus Giger
---
include/configs/hcu4.h
Adds a HCU5 board specific cmd reghcu5 to dump about 140 internal
register which define the HW configuration. Needed for documentation
purposes and to compare different settings.
Signed-off-by: Niklaus Giger
---
board/netstal/hcu5/Makefile |2 +-
board/netstal/hcu5/cmd_reghcu5.c | 283
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
Based on the omap3 evm code. I added a new highlevel define for Tobi
to avoid having it dependent on CMD_NET (which would seem backward in
this case).
Signed-off-by: Olof Johansson
---
This version of the patch fixe
Patch is attached
> Date: Tue, 22 Sep 2009 16:32:37 -0700
> From: biggerbadder...@gmail.com
> To: jefferypal...@hotmail.com
> CC: u-boot@lists.denx.de
> Subject: Re: [U-Boot] tftp packet failure counter reset
>
> Jeffery Palmer wrote:
> > I do large transfers via tftp, and since the timeout coun
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