Dear Kumar Gala,
In message <1253376008-13225-1-git-send-email-ga...@kernel.crashing.org> you
wrote:
> The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
> platform. We reuse the 85xx immap and just add new definitions for
> local access and global utils. The global utils is now broken into
> global utils, clocking and run control/power management.
>
> The offsets from CCSR for a number of blocks have also changed. We
> introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
> platform from the new p4080 platform. We don't use QoirQ as there are
> products (like p2020) that are PQ3 based platforms but have the QoirQ
> name.
>
> Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
...
> +typedef struct ccsr_local {
> + u32 ccsrbarh; /* 0x0 - Control Configuration Status Registers
> Base Address Register High */
> + u32 ccsrbarl; /* 0x4 - Control Configuration Status Registers
> Base Address Register Low */
> + u32 ccsrar; /* 0x8 - Configuration, Control, and Status
> Attribute Register */
Lines too long. Please check globally.
Best regards,
Wolfgang Denk
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