[U-Boot] [PATCH] phy.c: make less verbose - turn printf() into debug()

2011-07-25 Thread Wolfgang Denk
The PHY driver was too verbose and corrupted the boot message display
like this:

...
Net:   TSEC0 connected to Marvell 88ES
TSEC1 connected to Marvell 88ES
TSEC0, TSEC1
...

Turn printf() into debug() so we het the expected output again:

...
Net:   TSEC0, TSEC1
...

Signed-off-by: Wolfgang Denk 
Cc: Kumar Gala 

---
 drivers/net/phy/phy.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index c7edcc0..ce69c19 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -714,7 +714,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int 
addr,
 
phydev->dev = dev;
 
-   printf("%s connected to %s\n", dev->name, phydev->drv->name);
+   debug("%s connected to %s\n", dev->name, phydev->drv->name);
 
return phydev;
 }
-- 
1.7.6

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Re: [U-Boot] [PATCH 47/52] ARM: remove broken "at91sam9261ek" /"at91sam9g10ek" boards

2011-07-25 Thread Hong Xu
Hi Albert,

On 07/18/2011 02:39 PM, Albert ARIBAUD wrote:
> Hi Eric,
>
> Le 18/07/2011 04:52, Hong Xu a écrit :
>  > Hi Reinhard,
>  >
>  > It's a pity to see that some of the AT91 boards are planed to be removed
>  > by Wolfgang.
>  >
>  > Several weeks ago, the patches for SAM9261/9G10 have got Acks from you.
>  > See http://www.mail-archive.com/u-boot@lists.denx.de/msg54829.html
>  > But I don't know why it's not merged upstream.
>  >
>  > For SAM9RL, the V3 patches have been sent long time ago and was pinged.
>  > But no response any longer.
>  >
>  > The similar stories are also applied for SAM9263 and SAM9M10G45.
>  >
>  > We of course need the mainline support for all SAM9 boards in U-Boot.
>  > But it's the time we need your plans/suggestions/NAKs/ACKs to move on.
>  >
>  > Thanks.
>
> Note: I'll naturally defer the decision of what to make with the AT91
> boards to Reinhard, and likewise to other ARM custodians for boards the
> architecture of which falls under their 'jurisdiction'.

Understand. But it looks like Reinhard has bunch of paid work at hand 
and he has his vocation in the near future (He mentioned this in an 
email towards Wolfgang's  [U-Boot] [PATCH 00/52] ARM: remove broken 
boards). We noticed that there are several AT91 fixes in the mailing 
list without any response.

As a suggestion, how about we setup a git branch and collect AT91 
related patches during Reinhard's busy time and vocation time? If yes, 
can we ask for `pull request' from you?

Thanks.

BR,
Eric
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[U-Boot] [PATCH] MPC8xxx: drop redundant boot messages

2011-07-25 Thread Wolfgang Denk
Current code would print RAM size information like this:

DRAM:  DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)

Turn a number of printf()s into debug() to get rid of the redundant
"DDR: " string like this:

DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)

Signed-off-by: Wolfgang Denk 
Cc: Kumar Gala 
---
 arch/powerpc/cpu/mpc85xx/cpu.c|2 +-
 board/freescale/corenet_ds/ddr.c  |2 +-
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |2 +-
 board/freescale/mpc8641hpcn/mpc8641hpcn.c |2 +-
 board/freescale/p2041rdb/ddr.c|2 +-
 board/sbc8641d/sbc8641d.c |2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 53f0887..8ee3b4f 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -358,7 +358,7 @@ phys_size_t initdram(int board_type)
lbc_sdram_init();
 #endif
 
-   puts("DDR: ");
+   debug("DDR: ");
return dram_size;
 }
 #endif /* CONFIG_SYS_RAMBOOT */
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index a184592..b937015 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -256,6 +256,6 @@ phys_size_t initdram(int board_type)
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
 
-   puts("DDR: ");
+   debug("DDR: ");
return dram_size;
 }
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c 
b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 4e4b7c0..8aceddb 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -145,7 +145,7 @@ initdram(int board_type)
 
setup_ddr_bat(dram_size);
 
-   puts(" DDR: ");
+   debug(" DDR: ");
return dram_size;
 }
 
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c 
b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index e3916fc..455569e 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -69,7 +69,7 @@ initdram(int board_type)
 
setup_ddr_bat(dram_size);
 
-   puts("DDR: ");
+   debug("DDR: ");
return dram_size;
 }
 
diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index 46de910..e9c699c 100644
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -110,6 +110,6 @@ phys_size_t initdram(int board_type)
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
 
-   puts("DDR: ");
+   debug("DDR: ");
return dram_size;
 }
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index dd58541..bed8f53 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -63,7 +63,7 @@ phys_size_t initdram (int board_type)
dram_size = fixed_sdram ();
 #endif
 
-   puts ("DDR: ");
+   debug ("DDR: ");
return dram_size;
 }
 
-- 
1.7.6

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[U-Boot] [PATCH] mpc8xxx: lc_common_dimm_params: make less verbose

2011-07-25 Thread Wolfgang Denk
lc_common_dimm_params.c was too verbose and corrupted the boot
message display like this:

...
DRAM:  Detected UDIMM M2U25664DS88C3G-6K
DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
...

Turn printf() into debug() so we het the expected output again:

...
DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)
...

Signed-off-by: Wolfgang Denk 
Cc: Kumar Gala 

---
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c 
b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 8132e68..e66cc05 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -209,11 +209,11 @@ compute_lowest_common_dimm_parameters(const dimm_params_t 
*dimm_params,
if (dimm_params[i].n_ranks) {
if (dimm_params[i].registered_dimm) {
temp1 = 1;
-   printf("Detected RDIMM %s\n",
+   debug("Detected RDIMM %s\n",
dimm_params[i].mpart);
} else {
temp2 = 1;
-   printf("Detected UDIMM %s\n",
+   debug("Detected UDIMM %s\n",
dimm_params[i].mpart);
}
}
-- 
1.7.6

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[U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Wolfgang Denk
Dear Kumar,

I'm seeing the following problem on a MPC8555 board:

Power-on reset works fine:

...
I2C:   ready
DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)
Flash: 64 MiB
L2:256 KB enabled
...

But a soft-reset results in this:

=> reset
...
I2C:   ready
DRAM:  __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)
256 MiB (DDR1, 64-bit, CL=2, ECC off)
Flash: 64 MiB
L2:256 KB already enabled
...


Do you have any idea what this means and how to fix it?

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 1/9 v3] MAINTAINERS: integrator+versatile boards

2011-07-25 Thread Sergei Shtylyov
Hello.

On 23-07-2011 17:37, Linus Walleij wrote:

> - Take maintainership of the unlisted integratorap, and the
>integratorcp boards
> - Orphan the versatile maintained by Peter Pearse, as he has retired
>from ARM

> Cc: Philippe Robin
> Signed-off-by: Linus Walleij
> ---
>   MAINTAINERS |   11 ++-
>   1 files changed, 6 insertions(+), 5 deletions(-)

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6e6affa..49a70cc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -550,6 +550,9 @@ Unknown / orphaned boards:
>
>   EVB64260MPC7xx_74xx
>
> + versatile   ARM926EJ-S
> + versatile   ARM926EJ-S

What's the difference between these? :-)

> @@ -777,11 +780,9 @@ Sandeep Paulraj
>   davinci_dm365evmARM926EJS
>   davinci_dm6467evm   ARM926EJS
>
> -Peter Pearse
> - integratorcpAll current ARM supplied&  supported core modules
> - -see 
> http://www.arm.com/products/DevTools/Hardware_Platforms.html
> - versatile   ARM926EJ-S
> - versatile   ARM926EJ-S
> +Linus Walleij
> + integratorapvarious
> + integratorcpvarious
>
>   Dave Peverley

WBR, Sergei
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Re: [U-Boot] [PATCH 3/9 v3] integratorap: support relocation

2011-07-25 Thread Sergei Shtylyov
Hello.

On 23-07-2011 17:37, Linus Walleij wrote:

> The integrator board was apparently never converted over to support
> relocation until now. After this the integrator u-boot both compiles
> and boots on the Integrator AP.

> Signed-off-by: Linus Walleij
> ---
>   board/armltd/integrator/integrator.c |   14 --
>   1 files changed, 8 insertions(+), 6 deletions(-)

> diff --git a/board/armltd/integrator/integrator.c 
> b/board/armltd/integrator/integrator.c
> index 9bb56b5..a0d8de7 100644
> --- a/board/armltd/integrator/integrator.c
> +++ b/board/armltd/integrator/integrator.c
> @@ -86,14 +86,16 @@ int misc_init_r (void)
>   return (0);
>   }
>
> -/**
> - Routine:
> - Description:
> -**/
> -int dram_init (void)
> +void dram_init_banksize(void)
>   {
>   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> - gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
> +gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

You're using spaces instead of tab here...

WBR, Sergei
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Re: [U-Boot] [PATCH V2 1/2] powerpc/mpc85xx: Add clear_ddr_tlbs function

2011-07-25 Thread Wolfgang Denk
Dear Becky Bruce,

In message <13110329572704-git-send-email-bec...@kernel.crashing.org> you wrote:
> This is useful when we just want to wipe out the TLBs.  There's
> currently a function that resets the ddr tlbs to a different value;
> it is changed to utilize this function.  The new function can be
> used in conjunction with setup_ddr_tlbs() for a board to
> temporarily map/unmap the DDR address range as needed.
> 
> Signed-off-by: Becky Bruce 
> ---
>  arch/powerpc/cpu/mpc85xx/cpu.c |   14 +++---
>  arch/powerpc/cpu/mpc85xx/tlb.c |   29 +
>  arch/powerpc/include/asm/mmu.h |1 +
>  3 files changed, 33 insertions(+), 11 deletions(-)

Tested on TQM8555 / TQM8560.

Tested-by: Wolfgang Denk 

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH V2 2/2] board/tqm85xx: Create and tear down TLB for get_ram_size()

2011-07-25 Thread Wolfgang Denk
Dear Becky Bruce,

In message <13110329582097-git-send-email-bec...@kernel.crashing.org> you wrote:
> We need a TLB entry to call get_ram_size(); the common code
> doesn't create one until *after* fixed_sdram() has determined
> the size.  So we set up tlbs for the max possible size
> and tear them down once we're done with get_ram_size(); the
> common 85xx code will then set up a final set of tlb entries
> for the *actual* detected size of ddr.
> 
> This prevents us from having TLB entries that are larger
> than DDR sitting around for very long, which is not a recommended
> scenario.
> 
> Signed-off-by: Becky Bruce 
> ---
>  board/tqc/tqm85xx/sdram.c |7 +++
>  include/configs/TQM85xx.h |6 ++
>  2 files changed, 13 insertions(+), 0 deletions(-)

Tested on TQM8555 / TQM8560.

Tested-by: Wolfgang Denk 
Acked-by: Wolfgang Denk 

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 1/9 v3] MAINTAINERS: integrator+versatile boards

2011-07-25 Thread Linus Walleij
On Mon, Jul 25, 2011 at 12:44 PM, Sergei Shtylyov  wrote:

>> @@ -550,6 +550,9 @@ Unknown / orphaned boards:
>>
>>        EVB64260        MPC7xx_74xx
>>
>> +       versatile       ARM926EJ-S
>> +       versatile       ARM926EJ-S
>
>   What's the difference between these? :-)

Haha yeah I just moved the lines here. I can repost a v4 with just one
line.

Thanks,
Linus Walleij
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Re: [U-Boot] [PATCH 3/9 v3] integratorap: support relocation

2011-07-25 Thread Linus Walleij
On Mon, Jul 25, 2011 at 12:46 PM, Sergei Shtylyov  wrote:
>> -int dram_init (void)
>> +void dram_init_banksize(void)
>>  {
>>        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>> -       gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
>> +        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>
>   You're using spaces instead of tab here...

Oh man. I'll fix up. I re-ran all patches through checkpatch and this
one seems to be the only one remaining with the problem, luckily.

Linus Walleij
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Re: [U-Boot] [PATCH 3/9 v3] integratorap: support relocation

2011-07-25 Thread Linus Walleij
On Mon, Jul 25, 2011 at 1:22 PM, Linus Walleij  wrote:
> On Mon, Jul 25, 2011 at 12:46 PM, Sergei Shtylyov  
> wrote:
>>> -int dram_init (void)
>>> +void dram_init_banksize(void)
>>>  {
>>>        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>>> -       gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
>>> +        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>>
>>   You're using spaces instead of tab here...
>
> Oh man. I'll fix up. I re-ran all patches through checkpatch and this
> one seems to be the only one remaining with the problem, luckily.

Or well, patch [6/9] fixes the problem.

It's probably better that I squash patch 3 and 6.

This means the whole series need to be rebased again of course,
so I'm resending the whole thing again.

Thanks,
Linus Walleij
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[U-Boot] [PATCH 0/8] integrator patches v4

2011-07-25 Thread Linus Walleij
DETAILED CHANGELOG:

Changes v3 patchset to v4:
- One line for versatile in MAINTAINERS patch 1 instead of two.
- Squashed patch 3 (relocation) and patch 6 (SDRAM size detection).
  The former was introducing a whitespace bug and the latter was
  fixing it, and since both patches are strongly related let's just
  have one.
- NO OTHER CHANGES - resending the series since it gets rebased
  due to the squash of patch 3 and 6.

Changes in patch 1 "MAINTAINERS: integrator+versatile boards":
- First version (unnumbered) just added me as maintainer for the
  integrator AP.
- Second version (v2) also removed Peter Pearse as maintainer of
  integratorcp and versatile since we found out he has retired.
- Third version (v3) added me as maintainer also of integratorcp
  as this was easy to support alongside integratorap.
- Fourth version (v4), i.e. this one, removes a duplicate entry
  for versatile.

Changes in patch 2 (integratorap: make the compile work again):
- Changes from unnumbered (initial) version to version 2 (v2)
  Subject was changed from "integrator: make the compile work again"
  to "integratorap: make the compile work again".
- Changes in later versions: no other changes since initial version.
  This patch is otherwise identical to the initial unnumbered submission.

Changes in patch 3 (integratorap: support relocation):
- Changes from initial (unnumbered) version to v2:
  Subject was changed from "integrator: support relocation"
  to "integratorap: support relocation".
- Changes from v2 to v3: none
- Changes from v3 to v4: this was squashed with patch 6 titled
  "integratorap: fixup SDRAM memory size detection" since this
  patch introduced a whitespace problem that the latter fixed

Changes in patch 4 (integratorap: support the hush shell):
- No changes since initial version, resending since the patch
  series has been rebased.

Changes in patch 5 (integratorap: support some rudimentary commands):
- No changes since initial version, resending since the patch
  series has been rebased.

Changes in patch 6 (integratorap: remove hardcoded 32MB memory cmdline):
- No changes since initial version, resending since the patch
  series has been rebased.

Changes in patch 7 (integratorcp: make the board compile):
- No changes since initial version, resending since the patch
  series has been rebased, included in the patch series as of
  series v3.

Changes in patch 8 (integrator: convert to new build system):
- Changes from inital version to the second version included in the
  v3 version of the series:
  Convert build to use a single configuration file for Integrator
  AP or CP, instead of one file per board.

I hope this is enough of changelog to take determine the mergeability
of each patch, if you need any more information, please tell me!

Linus Walleij (8):
  MAINTAINERS: integrator+versatile boards
  integratorap: make the compile work again
  integratorap: support relocation
  integratorap: support the hush shell
  integratorap: support some rudimentary commands
  integratorap: remove hardcoded 32MB memory cmdline
  integratorcp: make the board compile
  integrator: convert to new build system

 MAINTAINERS |   10 +-
 MAKEALL |   22 ---
 Makefile|   27 
 arch/arm/cpu/arm720t/cpu.c  |5 -
 board/armltd/integrator/integrator.c|   15 +-
 board/armltd/integrator/lowlevel_init.S |2 +-
 board/armltd/integrator/split_by_variant.sh |  220 ---
 boards.cfg  |8 +
 include/configs/integratorap.h  |   21 +++-
 include/configs/integratorcp.h  |8 +
 10 files changed, 48 insertions(+), 290 deletions(-)
 delete mode 100755 board/armltd/integrator/split_by_variant.sh

-- 
1.7.6

Thanks,
Linus Walleij
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[U-Boot] [PATCH 1/8 v4] MAINTAINERS: integrator+versatile boards

2011-07-25 Thread Linus Walleij
- Take maintainership of the unlisted integratorap, and the
  integratorcp boards
- Orphan the versatile maintained by Peter Pearse, as he has retired
  from ARM

Cc: Philippe Robin 
Signed-off-by: Linus Walleij 
---
 MAINTAINERS |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6e6affa..b000595 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -550,6 +550,8 @@ Unknown / orphaned boards:
 
EVB64260MPC7xx_74xx
 
+   versatile   ARM926EJ-S
+
 
 #
 # ARM Systems: #
@@ -777,11 +779,9 @@ Sandeep Paulraj 
davinci_dm365evmARM926EJS
davinci_dm6467evm   ARM926EJS
 
-Peter Pearse 
-   integratorcpAll current ARM supplied & supported core modules
-   -see 
http://www.arm.com/products/DevTools/Hardware_Platforms.html
-   versatile   ARM926EJ-S
-   versatile   ARM926EJ-S
+Linus Walleij 
+   integratorapvarious
+   integratorcpvarious
 
 Dave Peverley 
 
-- 
1.7.6

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[U-Boot] [PATCH 2/8 v4] integratorap: make the compile work again

2011-07-25 Thread Linus Walleij
The integratorap/cp config for u-boot was outdated and would not
even compile, so fix the obvious missing bits for it to start
building. After this "make ap920t_config/make all" starts working
again.

Signed-off-by: Linus Walleij 
---
 board/armltd/integrator/lowlevel_init.S |2 +-
 include/configs/integratorap.h  |6 ++
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/board/armltd/integrator/lowlevel_init.S 
b/board/armltd/integrator/lowlevel_init.S
index ab9589c..6f55bb5 100644
--- a/board/armltd/integrator/lowlevel_init.S
+++ b/board/armltd/integrator/lowlevel_init.S
@@ -199,7 +199,7 @@ cm_remap:
 
/* Now 0x is writeable, replace the vectors */
ldr r0, =_start /* r0 <- start of vectors   */
-   ldr r2, =_armboot_start /* r2 <- past vectors   */
+   ldr r2, =_TEXT_BASE /* r2 <- past vectors   */
sub r1,r1,r1/* destination 0x   */
 
 copy_vec:
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 32ff193..8b41885 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -120,6 +120,12 @@
 #define CONFIG_NR_DRAM_BANKS   1   /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1   0x  /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE  0x0200  /* 32 MB */
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
+   CONFIG_SYS_INIT_RAM_SIZE - \
+   GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_FLASH_BASE  0x2400
 
-- 
1.7.6

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[U-Boot] [PATCH 3/8 v4] integratorap: support relocation

2011-07-25 Thread Linus Walleij
The integrator board was apparently never converted over to support
relocation until now. After this the integrator u-boot both compiles
and boots on the Integrator AP.

This also fixes the SDRAM memory size detection.

Signed-off-by: Linus Walleij 
---
 board/armltd/integrator/integrator.c |   15 +++
 include/configs/integratorap.h   |2 +-
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/board/armltd/integrator/integrator.c 
b/board/armltd/integrator/integrator.c
index 9bb56b5..c8d2bc7 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -86,15 +86,9 @@ int misc_init_r (void)
return (0);
 }
 
-/**
- Routine:
- Description:
-**/
 int dram_init (void)
 {
-   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-   gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
-
+   gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 #ifdef CONFIG_CM_SPD_DETECT
{
 extern void dram_query(void);
@@ -118,8 +112,13 @@ extern void dram_query(void);
 */
sdram_shift  = ((cm_reg_sdram & 0x001C)/4)%4;
gd->bd->bi_dram[0].size  = 0x0100 << sdram_shift;
-
+   gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+   0x0100 << sdram_shift);
}
+#else
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+   gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+   PHYS_SDRAM_1_SIZE);
 #endif /* CM_SPD_DETECT */
 
return 0;
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 8b41885..1650c03 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -47,7 +47,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_CM_INIT 1
 #define CONFIG_CM_REMAP1
-#undef CONFIG_CM_SPD_DETECT
+#define CONFIG_CM_SPD_DETECT
 
 /*
  * Size of malloc() pool
-- 
1.7.6

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[U-Boot] [PATCH 4/8 v4] integratorap: support the hush shell

2011-07-25 Thread Linus Walleij
Give us some kind of sane shell environment so the bootloader can
be used.

Signed-off-by: Linus Walleij 
---
 include/configs/integratorap.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 1650c03..2754f67 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -94,7 +94,9 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP/* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT  "Integrator-AP # "  /* Monitor Command 
Prompt   */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "# "
 #define CONFIG_SYS_CBSIZE  256 /* Console I/O Buffer Size  */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-- 
1.7.6

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[U-Boot] [PATCH 5/8 v4] integratorap: support some rudimentary commands

2011-07-25 Thread Linus Walleij
This adds support for a subset of the default commands for the
Integrator, however since the card does not have Ethernet (unless
you plug in a PCI card) we can not use the default command set.

Signed-off-by: Linus Walleij 
---
 include/configs/integratorap.h |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 2754f67..90f21e8 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -81,9 +81,15 @@
  * Command line configuration.
  */
 
+
 #define CONFIG_CMD_IMI
 #define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTD
 #define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMLS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
 
 
 #define CONFIG_BOOTDELAY   2
-- 
1.7.6

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[U-Boot] [PATCH 6/8 v4] integratorap: remove hardcoded 32MB memory cmdline

2011-07-25 Thread Linus Walleij
The default configuration for the Integrator AP forces memory to be
32 MB on the command line to the kernel, while we have perfect
information and detection of the actual memory size in the ATAGs.
Delete the confusion.

Signed-off-by: Linus Walleij 
---
 include/configs/integratorap.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 90f21e8..2318ad3 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -93,7 +93,7 @@
 
 
 #define CONFIG_BOOTDELAY   2
-#define CONFIG_BOOTARGS"root=/dev/mtdblock0 mem=32M 
console=ttyAM0 console=tty"
+#define CONFIG_BOOTARGS"root=/dev/mtdblock0 console=ttyAM0 
console=tty"
 #define CONFIG_BOOTCOMMAND ""
 
 /*
-- 
1.7.6

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[U-Boot] [PATCH 7/8 v4] integratorcp: make the board compile

2011-07-25 Thread Linus Walleij
This defines the requires CONFIG_SYS_* variables to make the
Integrator CP board compile.

Signed-off-by: Linus Walleij 
---
 include/configs/integratorcp.h |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 2c8ca2d..b0486df 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -140,6 +140,12 @@ SIB at Block62 End Block62 address 0x24f8
 #define CONFIG_NR_DRAM_BANKS   1   /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1   0x  /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE  0x0800  /* 128 MB */
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
+   CONFIG_SYS_INIT_RAM_SIZE - \
+   GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
 
 /*---
  * FLASH and environment organization
-- 
1.7.6

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[U-Boot] [PATCH 8/8 v4] integrator: convert to new build system

2011-07-25 Thread Linus Walleij
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be supported
they are easy to add.

We delete all the old cruft in Makefile and MAKEALL that was
working around the old way of building boards. We create a
unique config file per board to satisfy the build system, but
they are just oneliners that include the existing
integratorap.h and integratorcp.h configs.

Signed-off-by: Linus Walleij 
---
 MAKEALL |   22 ---
 Makefile|   27 
 arch/arm/cpu/arm720t/cpu.c  |5 -
 board/armltd/integrator/split_by_variant.sh |  220 ---
 boards.cfg  |8 +
 include/configs/integratorap.h  |3 +
 include/configs/integratorcp.h  |2 +
 7 files changed, 13 insertions(+), 274 deletions(-)
 delete mode 100755 board/armltd/integrator/split_by_variant.sh

diff --git a/MAKEALL b/MAKEALL
index 4adaeb8..0292809 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -303,14 +303,11 @@ LIST_SA="$(boards_by_cpu sa1100)"
 #
 
 LIST_ARM7="\
-   ap7 \
-   ap720t  \
armadillo   \
B2  \
ep7312  \
evb4510 \
impa7   \
-   integratorap\
lpc2292sodimm   \
modnet50\
SMN42   \
@@ -322,17 +319,7 @@ LIST_ARM7="\
 
 LIST_ARM9="\
a320evb \
-   ap920t  \
-   ap922_XA10  \
-   ap926ejs\
-   ap946es \
-   ap966   \
aspenite\
-   cp920t  \
-   cp922_XA10  \
-   cp926ejs\
-   cp946es \
-   cp966   \
da830evm\
da850evm\
edb9301 \
@@ -391,18 +378,9 @@ LIST_ARM9="\
 "
 
 #
-## ARM10 Systems
-#
-LIST_ARM10="   \
-   integratorcp\
-   cp1026  \
-"
-
-#
 ## ARM11 Systems
 #
 LIST_ARM11="   \
-   cp1136  \
omap2420h4  \
apollon \
imx31_litekit   \
diff --git a/Makefile b/Makefile
index e56fa02..7dc0cf7 100644
--- a/Makefile
+++ b/Makefile
@@ -892,32 +892,6 @@ TNY_A9260_config   :   unconfig
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91
 
-
-## ARM Integrator boards - see doc/README-integrator for more info.
-integratorap_config\
-ap_config  \
-ap966_config   \
-ap922_config   \
-ap922_XA10_config  \
-ap7_config \
-ap720t_config  \
-ap920t_config  \
-ap926ejs_config\
-ap946es_config: unconfig
-   @board/armltd/integrator/split_by_variant.sh ap $@
-
-integratorcp_config\
-cp_config  \
-cp920t_config  \
-cp926ejs_config\
-cp946es_config \
-cp1136_config  \
-cp966_config   \
-cp922_config   \
-cp922_XA10_config  \
-cp1026_config: unconfig
-   @board/armltd/integrator/split_by_variant.sh cp $@
-
 xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst 
_cs_autoboot,,$(subst _config,,$1
 
 omap1610inn_config \
@@ -1073,7 +1047,6 @@ clean:
   $(obj)board/matrix_vision/*/bootscript.img \
   $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin}  \
   $(obj)board/voiceblue/eeprom   \
-  $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds  \
   $(obj)u-boot.lds   \
   $(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index 88c71bf..ff992aa 100644
--- a/arch/arm/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
@@ -82,9 +82,4 @@ static void cache_flush (void)
 
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
 }
-#elif defined(CONFIG_INTEGRATOR) && def

Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Stefan Roese
Hi Mike,

On Thursday 21 July 2011 17:06:03 Mike Williams wrote:
> This code has been changed to read the CPU speed information from the
> CPR registers rather than the bootstrap registers. This is useful when
> changing the clock speed to something other than the default on boot.

Thanks. Unfortunately this patch introduces compile errors for 460SX boards 
(e.g. redwood):

[stefan@kubuntu u-boot-ppc4xx (master)]$ ./MAKEALL redwood
Configuring for redwood board...
speed.c: In function 'get_sys_info':
speed.c:339: error: 'PLLD_FWDVA_MASK' undeclared (first use in this function)
speed.c:339: error: (Each undeclared identifier is reported only once
speed.c:339: error: for each function it appears in.)
speed.c:340: error: 'PLLD_FWDVB_MASK' undeclared (first use in this function)
speed.c:341: error: 'PLLD_FBDV_MASK' undeclared (first use in this function)
speed.c:344: error: 'OPBDV_MASK' undeclared (first use in this function)
speed.c:348: error: 'PERDV_MASK' undeclared (first use in this function)
speed.c:351: error: 'CPR0_PLBED' undeclared (first use in this function)
speed.c:352: error: 'PLBEDDV_MASK' undeclared (first use in this function)
speed.c:357: error: 'PLLC_FBSEL_MASK' undeclared (first use in this function)
make[1]: *** [speed.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
make: *** Waiting for unfinished jobs

Could you please check, if the 460SX has the same registers and bits as 
460EX/GT and extend its header as well?

Thanks.

Best regards,
Stefan

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[U-Boot] [PATCH] 85xx: enable FDT support for STX SSA board

2011-07-25 Thread Wolfgang Denk
We also have to shift TEXT_BASE to accomodate for the additional
code size.

Signed-off-by: Wolfgang Denk 
Cc: Kumar Gala 

---
 board/stx/stxssa/stxssa.c |8 
 include/configs/stxssa.h  |7 ++-
 2 files changed, 14 insertions(+), 1 deletions(-)

diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c
index 83ffcd2..c78538d 100644
--- a/board/stx/stxssa/stxssa.c
+++ b/board/stx/stxssa/stxssa.c
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -247,6 +248,13 @@ reset_phy(void)
 #endif
 }
 
+#ifdef CONFIG_OF_BOARD_SETUP
+void ft_board_setup (void *blob, bd_t *bd)
+{
+   ft_cpu_setup (blob, bd);
+}
+#endif /* CONFIG_OF_BOARD_SETUP */
+
 int
 board_early_init_f(void)
 {
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index d5dd94f..141da26 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -43,7 +43,7 @@
 #define CONFIG_STXSSA  1   /* Silicon Tx GPPP SSA board specific*/
 #define CONFIG_MPC8560 1
 
-#defineCONFIG_SYS_TEXT_BASE0xFFFC
+#defineCONFIG_SYS_TEXT_BASE0xFFF8
 
 #define CONFIG_PCI /* PCI ethernet support */
 #define CONFIG_TSEC_ENET   /* tsec ethernet support*/
@@ -194,6 +194,11 @@
 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT   1
+#define CONFIG_OF_BOARD_SETUP  1
+#define CONFIG_OF_STDOUT_VIA_ALIAS 1
+
 /*
  * I2C
  */
-- 
1.7.6

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[U-Boot] [RFC PATCH] POST: add test before execution of post_run to avoid unneeded run

2011-07-25 Thread Valentin Longchamp
Some boards have the environment variables defined in a slow EEPROM. post_run
accesses these environment variables to define which tests have to be run (in
post_get_flags). This is very slow before the code relocation on some boards
with a slow I2C EEPROM for environement variables.

This patch adds a check at the beginning of post_run to avoid to run
post_get_flags (which may be slow on some boards for the above reason) for some
given POST flags if no tests are defined with these flags (for instance, no need
to run POST tests with POST_ROM if no tests for POST_ROM are defined).

Signed-off-by: Valentin Longchamp 
cc: Holger Brunck 
cc: Wolfgang Denk 
---
 post/post.c |   15 +++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/post/post.c b/post/post.c
index 1b7f2aa..d97f330 100644
--- a/post/post.c
+++ b/post/post.c
@@ -169,6 +169,18 @@ static void post_bootmode_test_off (void)
post_word_store (word);
 }
 
+static int post_test_defined(int flags)
+{
+   int i;
+   int run_flags = flags & ~(POST_RAM | POST_ROM);
+
+   for (i = 0; i < post_list_size; i++)
+   if (post_list[i].flags & run_flags)
+   return 1;
+
+   return 0;
+}
+
 static void post_get_flags (int *test_flags)
 {
int  flag[] = {  POST_POWERON,   POST_NORMAL,   POST_SLOWTEST,
@@ -301,6 +313,9 @@ int post_run (char *name, int flags)
unsigned int i;
int test_flags[POST_MAX_NUMBER];
 
+   if (!post_test_defined(flags))
+   return 0;
+
post_get_flags (test_flags);
 
if (name == NULL) {
-- 
1.7.1

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Re: [U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Kumar Gala

On Jul 25, 2011, at 3:18 AM, Wolfgang Denk wrote:

> Dear Kumar,
> 
> I'm seeing the following problem on a MPC8555 board:
> 
> Power-on reset works fine:
> 
> ...
> I2C:   ready
> DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)
> Flash: 64 MiB
> L2:256 KB enabled
> ...
> 
> But a soft-reset results in this:
> 
> => reset
> ...
> I2C:   ready
> DRAM:  __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)
> 256 MiB (DDR1, 64-bit, CL=2, ECC off)
> Flash: 64 MiB
> L2:256 KB already enabled
> ...
> 
> 
> Do you have any idea what this means and how to fix it?

On this board what is 'reset' really doing?  I have a theory but would be 
helpful to understand what's happening.

Can you also send me the full boot log (i'm looking at another bug that might 
show up on this board).

- k
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Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Mike Williams
Stefan,

On Mon, Jul 25, 2011 at 7:55 AM, Stefan Roese  wrote:
> Hi Mike,
>
> On Thursday 21 July 2011 17:06:03 Mike Williams wrote:
>> This code has been changed to read the CPU speed information from the
>> CPR registers rather than the bootstrap registers. This is useful when
>> changing the clock speed to something other than the default on boot.
>
> Thanks. Unfortunately this patch introduces compile errors for 460SX boards
> (e.g. redwood):
>
> [stefan@kubuntu u-boot-ppc4xx (master)]$ ./MAKEALL redwood
> Configuring for redwood board...
> speed.c: In function 'get_sys_info':
> speed.c:339: error: 'PLLD_FWDVA_MASK' undeclared (first use in this function)
> speed.c:339: error: (Each undeclared identifier is reported only once
> speed.c:339: error: for each function it appears in.)
> speed.c:340: error: 'PLLD_FWDVB_MASK' undeclared (first use in this function)
> speed.c:341: error: 'PLLD_FBDV_MASK' undeclared (first use in this function)
> speed.c:344: error: 'OPBDV_MASK' undeclared (first use in this function)
> speed.c:348: error: 'PERDV_MASK' undeclared (first use in this function)
> speed.c:351: error: 'CPR0_PLBED' undeclared (first use in this function)
> speed.c:352: error: 'PLBEDDV_MASK' undeclared (first use in this function)
> speed.c:357: error: 'PLLC_FBSEL_MASK' undeclared (first use in this function)
> make[1]: *** [speed.o] Error 1
> make[1]: *** Waiting for unfinished jobs
> make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
> make: *** Waiting for unfinished jobs
>
> Could you please check, if the 460SX has the same registers and bits as
> 460EX/GT and extend its header as well?

I forgot about the SX. Unfortunately, it looks like the SX has a
significantly different clocking system than the EX/GT. For instance,
it has two PLLs, different available dividers, etc. Additionally, I
don't have an SX board to test with. Perhaps I should save the old
code path for that board?

Let me know what you think.

Mike
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[U-Boot] preloader_console_init()

2011-07-25 Thread Simon Schwarz
Hi Aneesh,

I'am nearly done with OMAP3 - I think I can release the patch today.

I have just one problem left:
You implemented preloader_console_init() in omap-common to call 
setup_clocks_for_console(). This is a OMAP4 specific call - OMAP3 only 
has per_clocks_init() - which inits a bunch of clocks.

Can you change the preloader_console_init()-function that it requires 
that the UART already has a clock and move your 
setup_clocks_for_console() out of the function?

Regards & Thanks
Simon
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Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Stefan Roese
Mike,

[Added Marri from APM to CC]

On Monday 25 July 2011 16:42:14 Mike Williams wrote:
> > (first use in this function) make[1]: *** [speed.o] Error 1
> > make[1]: *** Waiting for unfinished jobs
> > make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2
> > make: *** Waiting for unfinished jobs
> > 
> > Could you please check, if the 460SX has the same registers and bits as
> > 460EX/GT and extend its header as well?
> 
> I forgot about the SX. Unfortunately, it looks like the SX has a
> significantly different clocking system than the EX/GT. For instance,
> it has two PLLs, different available dividers, etc. Additionally, I
> don't have an SX board to test with. Perhaps I should save the old
> code path for that board?
> 
> Let me know what you think.

I also don't have access to an 460SX board. And yes, perhaps its best to split 
the code now (460EX/GT vs. 460SX).

Marri, what do you think? Perhaps you could test the resulting code on an SX 
board?

Thanks,
Stefan

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DENX Software Engineering GmbH,  MD: Wolfgang Denk & Detlev Zundel
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Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de
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[U-Boot] openrd_ultimate GigEth ports not working

2011-07-25 Thread Alex Zeffertt
Hi list,

I've just bought an OpenRD Ultimate board and I've managed to get u-boot
running on it.  I am building it like this, using the latest u-boot GIT
repo:

 make mrproper CROSS_COMPILE=arm-none-linux-gnueabi-
 make openrd_ultimate_config CROSS_COMPILE=arm-none-linux-gnueabi-
 make u-boot.kwb CROSS_COMPILE=arm-none-linux-gnueabi-

and then I burn the .kwb file into the flash using openocd.

Unfortunately I cannot get the Gig Eth ports to work in u-boot at the
moment.  When I run the following at the command prompt the console just
hangs and I have to reboot:

Marvell>> setenv ipaddr 192.168.1.1
Marvell>> ping 192.168.1.30
 ... board hangs ...

Has anybody else seen this issue?

Thanks in advance for any help you can give.

Alex
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[U-Boot] openrd_ultimate GigEth ports not working

2011-07-25 Thread Ralph Metzler
Alex Zeffertt writes:
 > and then I burn the .kwb file into the flash using openocd.
 > 
 > Unfortunately I cannot get the Gig Eth ports to work in u-boot at the
 > moment.  When I run the following at the command prompt the console just
 > hangs and I have to reboot:
 > 
 > Marvell>> setenv ipaddr 192.168.1.1
 > Marvell>> ping 192.168.1.30
 >  ... board hangs ...
 > 
 > Has anybody else seen this issue?

I see something similar with the Seagate Dockstar (also Kirkwood) when
using dhcp. It also hangs. I did not test ping.
The 2011.06 snapshot works fine.  

-Ralph
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[U-Boot] (no subject)

2011-07-25 Thread Western Union®

You have a transfer of £1,000,000.00. from Western Union® For more information
(Contact This Office Email: western.uni...@w.cn) Mr.Frank Ban


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Re: [U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Wolfgang Denk
Dear Kumar Gala,

In message  you wrote:
> 
> > DRAM:  __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=3D0)
> > 256 MiB (DDR1, 64-bit, CL=3D2, ECC off)
...
> On this board what is 'reset' really doing?  I have a theory but would
> be helpful to understand what's happening.

This is a MPC8555 based board:

CPU:   8555E, Version: 1.1, (0x80790011)
Core:  Unknown, Version: 2.0, (0x80200020)

THe do_reset() code is supposed to be the one from
"arch/powerpc/cpu/mpc85xx/cpu.c"

Side note: rebooting Linux doesn't work either - it just hangs the
board in Linux v3.0 and any earlier version I can still compile with
my Fedora15 based host, i.e. down to around 2.6.32 or so.

> Can you also send me the full boot log (i'm looking at another bug that
> might show up on this board).

Will do as PM.

Thanks.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
The most difficult thing in the world is to know how to  do  a  thing
and to watch someone else doing it wrong, without commenting.
-- T.H. White
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Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Wolfgang Denk
Dear Stefan,

In message <201107251711.21381...@denx.de> you wrote:
> 
> I also don't have access to an 460SX board. And yes, perhaps its best to 
> split 
> the code now (460EX/GT vs. 460SX).
> 
> Marri, what do you think? Perhaps you could test the resulting code on an SX 
> board?

It appears the Redwood board is unmaintained.  No updates for this
board have ever been posted since the initial addition more than 3
years ago, nor is there any board maintainer registered.

I suggest we simply drop support for the unmaintained processor
and remove the respective board code from the tree.


Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Generally speaking, there are other ways to accomplish whatever it is
that you think you need ...   - Doug Gwyn
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[U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support

2011-07-25 Thread Simon Schwarz
This patch series adds a NAND SPL to OMAP3 and the devkit8000 board.

I tried to clean-up the mess of the former patches as good as possible.

Note that rebasing this patch on the patches mentioned below renders Patch 1/5  
 
of the old series obsolete. Most other patches have heavy changes.

I noted in the commit messages to which V1-patches the new ones are close.

I was not able to send these patches in reply-to because there is no anccesstor 
 
in V2 for every patch in V1 - I hope the solution I used is ok.

This is based on the following patches:
- New SPL framework
- OMAP4 SPL
Both are already in u-boot-ti repo.

Simon Schwarz (5):
  omap3: Configure RAM bank 0 if in SPL
  omap-common: add nand spl support
  nand spl: add NAND Library to new SPL
  omap3: new SPL structure support
  devkit8000: Add nand-spl support for new SPL

 arch/arm/cpu/armv7/omap-common/spl.c|   43 +
 arch/arm/cpu/armv7/omap3/board.c|   36 +-
 arch/arm/cpu/armv7/omap3/lowlevel_init.S|5 ++
 arch/arm/cpu/armv7/omap3/sdrc.c |   30 +++-
 arch/arm/include/asm/arch-omap3/mem.h   |   36 ++
 arch/arm/include/asm/arch-omap3/sys_proto.h |1 +
 arch/arm/include/asm/omap_common.h  |1 +
 board/timll/devkit8000/devkit8000.c |2 +-
 doc/README.SPL  |2 +
 drivers/mtd/nand/Makefile   |6 ++-
 drivers/mtd/nand/omap_gpmc.c|   69 +++
 include/configs/devkit8000.h|   46 ++
 include/nand.h  |3 +
 spl/Makefile|2 +
 14 files changed, 277 insertions(+), 5 deletions(-)

-- 
1.7.4.1

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[U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL

2011-07-25 Thread Simon Schwarz
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h

---
V1 changes:
ADD Settings for Micron RAM

V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD

Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V

This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)

Signed-off-by: Simon Schwarz 
---
 arch/arm/cpu/armv7/omap3/sdrc.c   |   30 ++-
 arch/arm/include/asm/arch-omap3/mem.h |   36 +
 2 files changed, 65 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
  * Copyright (C) 2004-2010
  * Texas Instruments Incorporated - http://www.ti.com/
  *
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz 
+ *
  * Author :
  * Vaibhav Hiremath 
  *
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x2);
}
 
+#ifdef CONFIG_SPL_BUILD
+   /* If we use a SPL there is no x-loader nor config header so we have
+* to do the job ourselfs
+*/
+   if (cs == CS0) {
+   sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+   /* General SDRC config */
+   writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+   writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+   /* AC timings */
+   writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+   writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+   /* Initialize */
+   writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+   writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+   writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+   writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+   writel(V_MR, &sdrc_base->cs[cs].mr);
+   }
+#endif /* CONFIG_SPL_BUILD */
+
/*
 * SDRC timings are set up by x-load or config header
 * We don't need to redo them here.
 * Older x-loads configure only CS0
 * configure CS1 to handle this ommission
 */
-   if (cs) {
+   if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
 
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD  0x1
+#define MICRON_B32NOT160x1
+#define MICRON_BANKALLOCATION  0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY   0x1
+#define MICRON_CASWIDTH0x5
+#define MICRON_RASWIDTH0x2
+#define MICRON_LOCKSTATUS  0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+   (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+   (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+   (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+   (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL  0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL0x3
+#define MICRON_WBST0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+   (MICRON_SIL << 3) | (MICRON_BL))
+
 /*
  * NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
  *   ACTIMA
@@ -171,10 +198,15 @@ enum {
 #define V_ACTIMA_165 INFINEON_V_ACTIMA_165
 #define V_ACTIMB_165 INFINEON_V_ACTIMB_165
 #endif
+
 #ifdef CONFIG_OMAP3_MICRON_DDR
 #define V_ACTIMA_165 MICRON_V_ACTIMA_165
 #define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICR

[U-Boot] [PATCH V2 2/5] omap-common: add nand spl support

2011-07-25 Thread Simon Schwarz
Add NAND support for the new SPL structure.

---
This patch didn't exist before V2!

V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.

Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V

Signed-off-by: Simon Schwarz 
---
 arch/arm/cpu/armv7/omap-common/spl.c |   43 ++
 arch/arm/include/asm/omap_common.h   |2 +
 include/nand.h   |3 ++
 3 files changed, 48 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..3a0093d 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header 
*header)
}
 }
 
+#ifdef CONFIG_SPL_MMC_SUPPORT
 static void mmc_load_image_raw(struct mmc *mmc)
 {
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
 }
+#endif /* CONFIG_SPL_MMC_SUPPORT */
 
+#ifdef CONFIG_SPL_MMC_SUPPORT
 static void mmc_load_image_fat(struct mmc *mmc)
 {
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
 }
+#endif /* CONFIG_SPL_MMC_SUPPORT */
 
+#ifdef CONFIG_SPL_MMC_SUPPORT
 static void mmc_load_image(void)
 {
struct mmc *mmc;
@@ -206,6 +212,26 @@ static void mmc_load_image(void)
hang();
}
 }
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+   gpmc_init();
+   nand_init();
+   nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, 
CONFIG_SYS_NAND_U_BOOT_SIZE,
+   (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+   nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+   (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+   (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+   parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
 
 void jump_to_image_no_args(void)
 {
@@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+   case BOOT_DEVICE_NAND:
+   nand_load_image();
+   break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +292,9 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
 
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init();  /* serial communications setup */
 
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +305,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
 }
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   debug("resetting cpu...");
+   reset_cpu(0);
+
+   return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index d3cb857..ee45a33 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,8 @@ void preloader_console_init(void);
 #defineMMCSD_MODE_UNDEFINED0
 #define MMCSD_MODE_RAW 1
 #define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW   3
+#define NAND_MODE_SW   4
 
 u32 omap_boot_device(void);
 u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..084c017 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
 int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
 int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
 
+void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
+
 #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
 void board_nand_select_device(struct nand_chip *nand, int chip);
 #endif
@@ -148,3 +150,4 @@ __attribute__((noreturn)) void nand_boot(void

[U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL

2011-07-25 Thread Simon Schwarz
Insert some NAND driver sources into NAND SPL library.

---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready

V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to  omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL

Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V

This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1

Signed-off-by: Simon Schwarz 
---
 doc/README.SPL   |2 +
 drivers/mtd/nand/Makefile|6 +++-
 drivers/mtd/nand/omap_gpmc.c |   69 ++
 spl/Makefile |2 +
 4 files changed, 78 insertions(+), 1 deletions(-)

diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
 CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
 CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
 CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..cdc9a14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
 LIB:= $(obj)libnand.o
 
 ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+else
 COBJS-y += nand.o
 COBJS-y += nand_base.o
 COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
 COBJS-y += nand_ids.o
 COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
 
 COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
 COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..ee4d13e 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, 
int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
 }
 
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+   return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd:MTD device structure
+ * @buf:buffer to store date
+ * @len:number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+   int i;
+   struct nand_chip *chip = mtd->priv;
+   u32 *p = (u32 *) buf;
+   len >>= 2;
+
+   for (i = 0; i < len; i++)
+   p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd:MTD device structure
+ * @buf:buffer to store date
+ * @len:number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+   int i;
+   struct nand_chip *chip = mtd->priv;
+
+   for (i = 0; i < len; i++)
+   buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
 /*
  * omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
  *   GPMC controller
@@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t 
mode)
}
 }
 
+
+#ifndef CONFIG_SPL_BUILD
 /*
  * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
  * The default is to come up on s/w ecc
@@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
 
nand->options &= ~NAND_OWN_BUFFERS;
 }
+#endif /* CONFIG_SPL_BUILD */
 
 /*
  * Board-specific NAND initialization. The following members of the
@@ -338,7 +390,24 @@ int board_nand_init(struct nand_chip *nand)
 
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+   nand->ecc.mode = NAND_ECC_HW;
+   nand->ecc.layout = &hw_nand_oob;
+   nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+   nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;

[U-Boot] [PATCH V2 4/5] omap3: new SPL structure support

2011-07-25 Thread Simon Schwarz
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
---
V1 changes:
ADD support for early console output in SPL

V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it

Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V

This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1

Signed-off-by: Simon Schwarz 
---
 arch/arm/cpu/armv7/omap3/board.c|   36 +-
 arch/arm/cpu/armv7/omap3/lowlevel_init.S|5 +++
 arch/arm/include/asm/arch-omap3/sys_proto.h |1 +
 arch/arm/include/asm/omap_common.h  |3 +-
 4 files changed, 41 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2f6d01c 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Declarations */
 extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
 
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+   return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+   return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
 /**
  * Routine: delay
  * Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
 
per_clocks_enable();
 
+#ifdef CONFIG_SPL_BUILD
+   preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
 }
@@ -245,7 +272,7 @@ void abort(void)
 {
 }
 
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
 /**
  * OMAP3 specific command to switch between NAND HW and SW ecc
  */
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc 
algorithm"
 );
 
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
 
 #ifdef CONFIG_DISPLAY_BOARDINFO
 /**
@@ -402,3 +429,8 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
 }
 #endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+   sprintf(omap_rev_string, "OMAP3, sorry revision detection 
unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S 
b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
 _TEXT_BASE:
.word   CONFIG_SYS_TEXT_BASE/* sdram load addr from config.mk */
 
+.global save_boot_params
+save_boot_params:
+   #warning "Please implement save_boot_params for OMAP3"
+   bx lr
+
 .global omap3_gp_romcode_call
 omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h 
b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
 void dieid_num_r(void);
 void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
 void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
 #endif
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index ee45a33..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,8 +49,7 @@ void preloader_console_init(void);
 #defineMMCSD_MODE_UNDEFINED0
 #define MMCSD_MODE_RAW 1
 #define MMCSD_MODE_FAT 2
-#define NAND_MODE_HW   3
-#define NAND_MODE_SW   4
+#define NAND_MODE_HW_ECC   3
 
 u32 omap_boot_device(void);
 u32 omap_boot_mode(void);
-- 
1.7.4.1

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[U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL

2011-07-25 Thread Simon Schwarz
Add NAND SPL support to the devkit8000 config

---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config

V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic

Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V

This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)

Signed-off-by: Simon Schwarz 
---
 board/timll/devkit8000/devkit8000.c |2 +-
 include/configs/devkit8000.h|   46 +++
 2 files changed, 47 insertions(+), 1 deletions(-)

diff --git a/board/timll/devkit8000/devkit8000.c 
b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
 }
 
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
 /*
  * Routine: board_eth_init
  * Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..46c1e3d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
 
CONFIG_SYS_INIT_RAM_SIZE - \
 
GENERATED_GBL_DATA_SIZE)
 
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START  0x4020
+#define CONFIG_SYS_SRAM_SIZE   0x  /*64 kB*/
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT
$(CPUDIR)/omap-common/u-boot-spl.lds
+
+#define CONFIG_SPL_TEXT_BASE   0x4020 
/*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE0xB400  /* 45 K */
+#define CONFIG_SPL_STACK   LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR  0x8000 
/*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE0x8
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE  2048
+#define CONFIG_SYS_NAND_OOBSIZE64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+   
10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE512
+#define CONFIG_SYS_NAND_ECCBYTES   3
+
+#define CONFIG_SYS_NAND_ECCSTEPS   (CONFIG_SYS_NAND_PAGE_SIZE / \
+   
CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL   (CONFIG_SYS_NAND_ECCBYTES * \
+   
CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS0x8
+#define CONFIG_SYS_NAND_U_BOOT_SIZE0x20
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
 #endif /* __CONFIG_H */
-- 
1.7.4.1

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Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Mike Williams
Wolfgang,

On Mon, Jul 25, 2011 at 2:05 PM, Wolfgang Denk  wrote:
> Dear Stefan,
>
> In message <201107251711.21381...@denx.de> you wrote:
>>
>> I also don't have access to an 460SX board. And yes, perhaps its best to 
>> split
>> the code now (460EX/GT vs. 460SX).
>>
>> Marri, what do you think? Perhaps you could test the resulting code on an SX
>> board?
>
> It appears the Redwood board is unmaintained.  No updates for this
> board have ever been posted since the initial addition more than 3
> years ago, nor is there any board maintainer registered.
>
> I suggest we simply drop support for the unmaintained processor
> and remove the respective board code from the tree.
>
>
> Best regards,
>
> Wolfgang Denk

I know that the SX variant is actively maintained on the Linux PPC
mailing list, perhaps we just need to find a maintainer for the SX in
u-boot? If the old code path was working for them, it wouldn't be any
real work for me to keep it.

Thanks,
Mike
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Re: [U-Boot] [PATCH] ppc460: read get_sys_info from CPR registers instead of STRP registers

2011-07-25 Thread Wolfgang Denk
Dear Mike,

In message  
you wrote:
> 
> On Mon, Jul 25, 2011 at 2:05 PM, Wolfgang Denk  wrote:
...
> > It appears the Redwood board is unmaintained. =A0No updates for this
> > board have ever been posted since the initial addition more than 3
> > years ago, nor is there any board maintainer registered.
> >
> > I suggest we simply drop support for the unmaintained processor
> > and remove the respective board code from the tree.
...
> I know that the SX variant is actively maintained on the Linux PPC
> mailing list, perhaps we just need to find a maintainer for the SX in
> u-boot? If the old code path was working for them, it wouldn't be any
> real work for me to keep it.

If there is anybody interested in keeping the 460SX code in mainline,
he can (and should) speak now or forever hold your peace.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Bei genauerem Hinsehen ist die  Arbeit  weniger  langweilig  als  das
Vergnügen.  -- Charles Baudelaire
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Re: [U-Boot] U-BOOT TFTP

2011-07-25 Thread simran gill

Hello all,
I really appreciate all of your replies and sorry for not being responsive for 
sometime. But I am glad to say that I was able to flash new u-boot along with 
fman ucode and rcw. I am using p4080DS dev board from freescale and the rcw is 
important in terms of which ports to be enabled upon boot. I ran into all of 
these problems because the ltib version I was using was not compatible with my 
version of the board. Wish I knew this earlier but there was no way for me to 
find this out. Neways all is up and running and thanks once again for providing 
all the help. 
Sincerely,Simran

Date: Thu, 21 Jul 2011 10:24:07 +
Subject: Re: [U-Boot] U-BOOT TFTP
From: vickylinu...@gmail.com
To: simrangill...@hotmail.com
CC: u-boot@lists.denx.de


Hello simran



The things u have to do is check your network connectivity between board
 and target .If it is not working after that, make a clean  u-boot 
compilation again with basic configuration(no confusing)  of your board 
header file and port again.





Regards

Vignesh Rajendran




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Re: [U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Wolfgang Denk
Dear Kumar,

In message <20110725175756.d2bd8138e...@gemini.denx.de> I wrote:
> 
> This is a MPC8555 based board:
> 
>   CPU:   8555E, Version: 1.1, (0x80790011)
>   Core:  Unknown, Version: 2.0, (0x80200020)
> 
> THe do_reset() code is supposed to be the one from
> "arch/powerpc/cpu/mpc85xx/cpu.c"

The same (both the "Core: Unknown" and the "__fsl_ddr_set_lawbar:
ERROR" issues) happens on the same board equipped with a MPC8541
processor:

CPU:   8541E, Version: 1.1, (0x807a0011)
Core:  Unknown, Version: 2.0, (0x80200020)

Note that old versions of U-Boot (like 1.3.0-rc2-g72e55d03 :-)
used to print here:

CPU:   8541, Version: 1.1, (0x807a0011)
Core:  E500, Version: 2.0, (0x80200020)


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
>  Is there a way to determine Yesterday's date using Unix utilities?
 echo "what is yesterday's date?" | /bin/mail root
 -- Randal L. Schwartz in 
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Re: [U-Boot] [GIT pull] Please pull u-boot-mpc85xx

2011-07-25 Thread Wolfgang Denk
Dear Kumar Gala,

In message  you 
wrote:
> The following changes since commit 74fac70084bb040342fafc3b0d2ef50fbe35646f:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-mmc (2011-07-19 22:27:07 
> +0200)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-mpc85xx.git master
> 
> Becky Bruce (2):
>   powerpc/mpc85xx: Add clear_ddr_tlbs function
>   board/tqm85xx: Create and tear down TLB for get_ram_size()
> 
> Timur Tabi (2):
>   powerpc/85xx: add support the ePAPR "phandle" property
>   fman: insert the Fman firmware into the device tree
> 
>  arch/powerpc/cpu/mpc85xx/cpu.c |   14 +---
>  arch/powerpc/cpu/mpc85xx/fdt.c |  119 
> 
>  arch/powerpc/cpu/mpc85xx/portals.c |6 +-
>  arch/powerpc/cpu/mpc85xx/tlb.c |   29 +
>  arch/powerpc/include/asm/mmu.h |1 +
>  board/tqc/tqm85xx/sdram.c  |7 ++
>  include/configs/TQM85xx.h  |6 ++
>  include/configs/corenet_ds.h   |8 +--
>  8 files changed, 171 insertions(+), 19 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH v3] autostart: unify duplicated logic into the bootm code

2011-07-25 Thread Wolfgang Denk
Dear Mike Frysinger,

In message <1307317382-22108-1-git-send-email-vap...@gentoo.org> you wrote:
> Rather than having a bunch of random commands handle autostart behavior,
> unify the logic in a single place.  This also fixes building of these
> different commands when bootm is disabled.
> 
> Acked-by: Matthew McClintock 
> Acked-by: Scott Wood 
> Signed-off-by: Mike Frysinger 
> ---
> v3
>   - fix unused warnings arising from variables no longer being used
> 
>  common/cmd_bootm.c |   15 +++
>  common/cmd_fdc.c   |   16 +---
>  common/cmd_fdos.c  |   11 +--
>  common/cmd_ide.c   |   15 +--
>  common/cmd_nand.c  |   16 ++--
>  common/cmd_net.c   |   13 ++---
>  common/cmd_scsi.c  |   11 +--
>  common/cmd_usb.c   |   13 ++---
>  include/command.h  |8 
>  9 files changed, 33 insertions(+), 85 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Uncontrolled power will turn even saints into savages. And we can all
be counted on to live down to our lowest impulses.
-- Parmen, "Plato's Stepchildren", stardate 5784.3
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Re: [U-Boot] [PATCH] net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabled

2011-07-25 Thread Wolfgang Denk
Dear Mike Frysinger,

In message <1307027978-13418-1-git-send-email-vap...@gentoo.org> you wrote:
> The ctrl variable is only used when autoneg support is disabled, so only
> declare it under those conditions to avoid an unused variable warning.
> 
> Signed-off-by: Mike Frysinger 
> ---
>  drivers/net/designware.c |4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
"No proper program contains  an  indication  which  as  an  operator-
applied  occurrence  identifies an operator-defining occurrence which
as an indication-applied occurrence identifies an indication-defining
occurrence different from the one identified by the given  indication
as an indication-applied occurrence."   - ALGOL 68 Report
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Re: [U-Boot] [PATCH] net: designware: fix uninitialized phy_addr usage

2011-07-25 Thread Wolfgang Denk
Dear Mike Frysinger,

In message <1307027978-13418-2-git-send-email-vap...@gentoo.org> you wrote:
> When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable never
> gets initialized causes random behavior at runtime and a gcc warning.  So
> set it by default to the stored phy address.
> 
> Signed-off-by: Mike Frysinger 
> ---
>  drivers/net/designware.c |2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)

Applied (with minimal changes to the commit message which is missing
a 'which" or so), thanks.

Best regards,

Wolfgang Denk

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I see that Microsoft's campaign  to  destroy  all  knowledge  of  any
operating   environment   but  its  own  environment-of-the-year  has
succeeded in creating a generation of users who don't understand  the
concept of a shell...
-- L. Peter Deutsch in 
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[U-Boot] [PATCH 2/2] powerpc/85xx: relocate CCSR before creating the initial RAM area

2011-07-25 Thread Timur Tabi
Before main memory (DDR) is initialized, the on-chip L1 cache is used as a
memory area for the stack and the global data (gd_t) structure.  This is
called the initial RAM area, or initram.  The L1 cache is locked and the TLBs
point to a non-existent address (so that there's no chance it will overlap
main memory or any device).  The L1 cache is also configured not to write
out to memory or the L2 cache, so everything stays in the L1 cache.

One of the things we might do while running out of initram is relocate CCSR.
On reset, CCSR is typically located at some high 32-bit address, like
0xfe00, and this may not be the best place for CCSR.  For example, on
36-bit systems, CCSR is relocated to 0xffe00, near the top of 36-bit
memory space.

On some future Freescale SOCs, the L1 cache will be forced to write to the
backing store, so we can no longer have the TLBs point to non-existent address.
Instead, we will point the TLBs to an unused area in CCSR.  In order for this
technique to work, CCSR needs to be relocated before the initram memory is
enabled.

Unlike the original CCSR relocation code in cpu_init_early_f(), the TLBs
we create now for relocating CCSR are deleted after the relocation is finished.
cpu_init_early_f() will still need to create a TLB for CCSR (at the new
location) for normal U-Boot purposes.  This is done to keep the impact to
existing U-Boot code minimal and to better isolate the CCSR relocation code.

Signed-off-by: Timur Tabi 
---
 arch/powerpc/cpu/mpc85xx/cpu_init_early.c |   58 ---
 arch/powerpc/cpu/mpc85xx/start.S  |  234 +
 2 files changed, 234 insertions(+), 58 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 32aa94b..64eda94 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -24,51 +24,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
-#ifdef CONFIG_FSL_CORENET
-static void setup_ccsrbar(void)
-{
-   u32 temp;
-   volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000);
-   volatile ccsr_local_t *ccm;
-
-   /*
-* We can't call set_law() because we haven't moved
-* CCSR yet.
-*/
-   ccm = (void *)ccsr_virt;
-
-   out_be32(&ccm->law[0].lawbarh,
-   (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32);
-   out_be32(&ccm->law[0].lawbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS);
-   out_be32(&ccm->law[0].lawar,
-   LAW_EN | (0x1e << 20) | LAW_SIZE_4K);
-
-   in_be32((u32 *)(ccsr_virt + 0));
-   in_be32((u32 *)(ccsr_virt + 1));
-   isync();
-
-   ccm = (void *)CONFIG_SYS_CCSRBAR;
-   /* Now use the temporary LAW to move CCSR */
-   out_be32(&ccm->ccsrbarh, (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32);
-   out_be32(&ccm->ccsrbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS);
-   out_be32(&ccm->ccsrar, CCSRAR_C);
-   temp = in_be32(&ccm->ccsrar);
-   disable_law(0);
-}
-#else
-static void setup_ccsrbar(void)
-{
-   u32 temp;
-   volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000);
-
-   temp = in_be32(ccsr_virt);
-   out_be32(ccsr_virt, CONFIG_SYS_CCSRBAR_PHYS >> 12);
-   temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR);
-}
-#endif
-#endif
-
 /* We run cpu_init_early_f in AS = 1 */
 void cpu_init_early_f(void)
 {
@@ -93,19 +48,6 @@ void cpu_init_early_f(void)
 
write_tlb(mas0, mas1, mas2, mas3, mas7);
 
-   /* set up CCSR if we want it moved */
-#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
-   mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(1);
-   /* mas1 is the same as above */
-   mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0x1000, MAS2_I|MAS2_G);
-   mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, MAS3_SW|MAS3_SR);
-   mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_DEFAULT);
-
-   write_tlb(mas0, mas1, mas2, mas3, mas7);
-
-   setup_ccsrbar();
-#endif
-
init_laws();
invalidate_tlb(0);
init_tlbs();
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 5777493..c9cf8fb 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -284,6 +284,240 @@ _start_e500:
 
 #endif /* CONFIG_MPC8569 */
 
+/*
+ * Relocate CCSR, if necessary.  We relocate CCSR if (obviously) the default
+ * location is not where we want it.  This typically happens on a 36-bit
+ * system, where we want to move CCSR to near the top of 36-bit address space.
+ *
+ * To move CCSR, we create two temporary TLBs, one for the old location, and
+ * another for the new location.  On CoreNet systems, we also need to create
+ * a special, temporary LAW.
+ *
+ * As a general rule, TLB0 is used for short-term TLBs, and TLB1 is used for
+ * long-term TLBs, so we use TLB0 here.
+ */
+#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS)
+
+#if !defined(CONFIG_SYS_CCSRBA

[U-Boot] [PATCH 1/2] powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros

2011-07-25 Thread Timur Tabi
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.

CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file.  Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.

CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.

Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot).  All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.

README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.

Signed-off-by: Timur Tabi 
---
 README|   37 ++
 arch/powerpc/include/asm/config_mpc85xx.h |   39 
 include/configs/MPC8536DS.h   |   16 +
 include/configs/MPC8540ADS.h  |   10 +-
 include/configs/MPC8541CDS.h  |9 +-
 include/configs/MPC8544DS.h   |9 +-
 include/configs/MPC8548CDS.h  |9 +-
 include/configs/MPC8555CDS.h  |9 +-
 include/configs/MPC8560ADS.h  |   10 +-
 include/configs/MPC8568MDS.h  |9 +-
 include/configs/MPC8569MDS.h  |   14 +---
 include/configs/MPC8572DS.h   |   16 +
 include/configs/P1022DS.h |   13 +---
 include/configs/P1023RDS.h|9 -
 include/configs/P1_P2_RDB.h   |   18 +--
 include/configs/P2020DS.h |   13 +---
 include/configs/P2041RDB.h|   14 
 include/configs/SBC8540.h |   14 
 include/configs/TQM85xx.h |   15 ++---
 include/configs/corenet_ds.h  |   13 
 include/configs/mpq101.h  |   16 +
 include/configs/sbc8548.h |9 +-
 include/configs/sbc8560.h |   14 
 include/configs/socrates.h|9 +-
 include/configs/stxgp3.h  |7 +---
 include/configs/stxssa.h  |8 ++---
 include/configs/xpedite520x.h |   10 +-
 include/configs/xpedite537x.h |   10 +-
 include/configs/xpedite550x.h |   10 +-
 include/mpc85xx.h |   47 +
 30 files changed, 159 insertions(+), 277 deletions(-)

diff --git a/README b/README
index 294b39e..d47ebc1 100644
--- a/README
+++ b/README
@@ -2785,6 +2785,43 @@ Low Level (hardware related) configuration options:
and RPXsuper) to be able to adjust the position of
the IMMR register after a reset.
 
+- CONFIG_SYS_CCSRBAR_DEFAULT:
+   Default (power-on reset) physical address of CCSR on Freescale
+   PowerPC SOCs.
+
+- CONFIG_SYS_CCSRBAR:
+   Virtual address of CCSR.  On a 32-bit build, this is typically
+   the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
+
+   CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
+   for cross-platform code that uses that macro instead.
+
+- CONFIG_SYS_CCSRBAR_PHYS:
+   Physical address of CCSR.  CCSR can be relocated to a new
+   physical address, if desired.  In this case, this macro should
+   be set to that address.  Otherwise, it should be set to the
+   same value as CONFIG_SYS_CCSRBAR_DEFAULT.  For example, CCSR
+   is typically relocated on 36-bit builds.  It is recommended
+   that this macro be defined via the _HIGH and _LOW macros:
+
+   #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
+   * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
+
+- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
+   Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS.  This value is typically
+   either 0 (32-bit build) or 0xF (36-bit build).  This macro is
+   used in assembly code, so it must not contain typecasts or
+   integer size suffixes (e.g. "ULL").
+
+- CONFIG_SYS_CCSRBAR_PHYS_LOW:
+   Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS.  This macro is
+   used in assembly code, so it must not contain typecasts or
+   integer size suffixes (e.g. "ULL").
+
+- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
+  

Re: [U-Boot] [PATCH v3 5/7] common: add run_command2 for running simple or hush commands

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309364719-16219-6-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> Signed-off-by: Jason Hobbs 
> ---
> changes in v2:
> - whitespace correction
...
> --- a/common/main.c
> +++ b/common/main.c
> @@ -333,12 +333,7 @@ void main_loop (void)
>   int prev = disable_ctrlc(1);/* disable Control C checking */
>  # endif
>  
> -# ifndef CONFIG_SYS_HUSH_PARSER
> - run_command (p, 0);
> -# else
> - parse_string_outer(p, FLAG_PARSE_SEMICOLON |
> - FLAG_EXIT_FROM_LOOP);
> -# endif
> + run_command2(p, 0);

Indentation seems wrong here - it should be one TAB more to the right?

> +int run_command2(const char *cmd, int flag)
> +{
> +#ifndef CONFIG_SYS_HUSH_PARSER
> + if (run_command(cmd, flag) == -1)
> + return 1;
> +#else
> + if (parse_string_outer(cmd,
> + FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP) != 0)
> + return 1;
> +#endif
> + return 0;
> +}

Can we make this inline [in the normal (non-menu) case], please?

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v3 6/7] Add pxecfg command

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309364719-16219-7-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> Add pxecfg command, which is intended to mimic PXELINUX functionality.
> 'pxecfg get' uses tftp to retrieve a file based on UUID, MAC address or
> IP address. 'pxecfg boot' interprets the contents of PXELINUX config
> like file to boot using a specific initrd, kernel and kernel command
> line.
> 
> This patch also adds a README.pxecfg file - see it for more details on
> the pxecfg command.

After thinking a long while about this, I came to the conclusion that
my initial feeling that "pxecfg" is ugly was actually correct.  Please
let's call this simply "pxe" as I already suggested in my initial
feedback.


Another general comment:  you are adding tons of completely
undocumented, uncommented code here.

This is not acceptable.  Please provide sufficient comments so that
the average engineer has a chance to understand what the code is
(supposed to be) doing without spending needless effords.



> +static char *from_env(char *envvar)
> +{
> + char *ret;
> +
> + ret = getenv(envvar);
> +
> + if (!ret)
> + printf("missing environment variable: %s\n", envvar);
> +
> + return ret;
> +}

I don't like this. It just blows up the code and shifts error handling
from the place where it happens.  In the result, you will have to
check return codes on several function call levels.  I recommend to
drop this function.

> +/*
> + * Returns the ethaddr environment variable formated with -'s instead of :'s
> + */
> +static void format_mac_pxecfg(char **outbuf)

void?

> + char *p, *ethaddr;
> +
> + *outbuf = NULL;

This is redundant, please omit.

> + ethaddr = from_env("ethaddr");
> +
> + if (!ethaddr)
> + return;

It makes little sense to check for errors, to report errors, and then
to continue as if nothing happened.

> + *outbuf = strdup(ethaddr);

Can we please al;locate the buffer in the caller, and do without this?
This is only good for memory leaks.

> +/*
> + * Returns the directory the file specified in the bootfile env variable is
> + * in.
> + */
> +static char *get_bootfile_path(void)
> +{
> + char *bootfile, *bootfile_path, *last_slash;
> + size_t path_len;
> +
> + bootfile = from_env("bootfile");
> +
> + if (!bootfile)
> + return NULL;
> +
> + last_slash = strrchr(bootfile, '/');
> +
> + if (last_slash == NULL)
> + return NULL;

This looks unnecessarily stringent to me.  Why can we not accept a
plain file name [we can always use "./" if we need a path for the
directory] ?

> + if (path_len > MAX_TFTP_PATH_LEN) {
> + printf("Base path too long (%s%s)\n",
> + bootfile_path ? bootfile_path : "",
> + file_path);

Indentation is one level only.  Please fix globally.

> + if (bootfile_path)
> + free(bootfile_path);
> +
> + return -ENAMETOOLONG;

All this dynamically allocated strings just blow up the code.  Can we
try to do without?

> + printf("Retreiving file: %s\n", relfile);

Typo: s/ei/ie/

> + if (do_tftpb(NULL, 0, 3, tftp_argv)) {
> + printf("File not found\n");
> + return -ENOENT;

Does TFTP not already print an error message?

> +static int get_pxecfg_file(char *file_path, void *file_addr)
> +{
> + unsigned long config_file_size;
> + int err;
> +
> + err = get_relfile(file_path, file_addr);
> +
> + if (err < 0)
> + return err;
> +
> + config_file_size = simple_strtoul(getenv("filesize"), NULL, 16);
> + *(char *)(file_addr + config_file_size) = '\0';

What exactly are you doing here?

And what happens when getenv() should return NULL?

> +static int get_pxelinux_path(char *file, void *pxecfg_addr)
> +{
> + size_t base_len = strlen("pxelinux.cfg/");
> + char path[MAX_TFTP_PATH_LEN+1];
> +
> + if (base_len + strlen(file) > MAX_TFTP_PATH_LEN) {
> + printf("path too long, skipping\n");
> + return -ENAMETOOLONG;

In such cases it would be helpful to know _which_ exact path was too
long, so please include this information in the error messages.
Please check and fix globally.

...
> +struct pxecfg_label *label_create(void)
> +{
> + struct pxecfg_label *label;
> +
> + label = malloc(sizeof *label);

You allocate space for a pointer only, but it appears you want a fuill
struct here?

> + if (!label)
> + return NULL;
> +
> + label->name = NULL;
> + label->kernel = NULL;
> + label->append = NULL;
> + label->initrd = NULL;
> + label->localboot = 0;
> + label->attempted = 0;

Please use:

memset(label, 0, sizeof(label));

instead.

> + if (label->append)
> + setenv("bootargs", label->append);

I dislike that code is messing with bootargs, completely overwriting
any user settings.   Maybe you should just append i

Re: [U-Boot] [PATCH v3 1/7] Add generic, reusable menu code

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309364719-16219-2-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> This will be used first by the pxecfg code, but is intended to be
> generic and reusable for other jobs in U-boot.
> 
> Signed-off-by: Jason Hobbs 
> ---
> changes in v2:
>  - new in v2
> 
> changes in v3:
>  - move timeout support to later patch
>  - fix NULL case bug in menu_item_key_match
>  - consistently use 'item_key' instead of 'key'
>  - move default/prompt logic into menu code
>  - consistently return int for error propagation
>  - change option setting functions to menu_create paramaters
>  - add README.menu
> 
>  common/Makefile |1 +
>  common/menu.c   |  266 
> +++
>  doc/README.menu |  158 
>  include/menu.h  |   30 ++
>  4 files changed, 455 insertions(+), 0 deletions(-)
>  create mode 100644 common/menu.c
>  create mode 100644 doc/README.menu
>  create mode 100644 include/menu.h

I am happy that you provide documentation in doc/README.menu, but I
really dislike that the code itself is basicly uncommented. It is a
major pain to have to switch between the README and the source files
when trying to understand the code.

Please add sufficient comments to the code to make it readable.

Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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they are mentally mutilated beyond hope of regeneration.   - Dijkstra
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Re: [U-Boot] [PATCH v3 2/7] cosmetic, main: clean up declarations of abortboot

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309364719-16219-3-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> Remove an unneeded prototype declaration from the top of main.c,
> and use plain inline instead of __inline__ to please checkpatch.
> 
> Signed-off-by: Jason Hobbs 
> ---
> changes in v3:
>  - new in v3
> 
>  common/main.c |8 ++--
>  1 files changed, 2 insertions(+), 6 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Blast medicine anyway!  We've learned to tie into every organ in the
human body but one.  The brain!  The brain is what life is all about.
-- McCoy, "The Menagerie", stardate 3012.4
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Re: [U-Boot] [PATCH v3 4/7] cosmetic, main: correct indentation/spacing issues

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309364719-16219-5-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> Signed-off-by: Jason Hobbs 
> ---
> changes in v2:
> - new in v2
> 
>  common/main.c |   12 ++--
>  1 files changed, 6 insertions(+), 6 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
C++ was an interesting and valuable experiment, but we've learned its
lessons and it's time to move on.
- Peter Curran in 
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Re: [U-Boot] [PATCH v3 1/3] lib: add uuid_str_to_bin for use with bootp and PXE uuid

2011-07-25 Thread Wolfgang Denk
Dear "Jason Hobbs",

In message <1309366710-17400-2-git-send-email-jason.ho...@calxeda.com> you 
wrote:
> Signed-off-by: Jason Hobbs 
...
> +void uuid_str_to_bin(const char *uuid, unsigned char *out)
> +{
> + uint16_t tmp16;
> + uint32_t tmp32;
> + uint64_t tmp64;
> +
> + if (!uuid || !out)
> + return;
> +
> + tmp32 = cpu_to_le32(simple_strtoul(uuid, NULL, 16));
> + memcpy(out, &tmp32, 4);
> +
> + tmp16 = cpu_to_le16(simple_strtoul(uuid + 9, NULL, 16));
> + memcpy(out + 4, &tmp16, 2);
> +
> + tmp16 = cpu_to_le16(simple_strtoul(uuid + 14, NULL, 16));
> + memcpy(out + 6, &tmp16, 2);
> +
> + tmp16 = cpu_to_be16(simple_strtoul(uuid + 19, NULL, 16));
> + memcpy(out + 8, &tmp16, 2);
> +
> + tmp64 = cpu_to_be64(simple_strtoull(uuid + 24, NULL, 16));
> + memcpy(out + 10, (char *)&tmp64 + 2, 6);
> +}

I asked this before, and I repeat my question: Should we not add at
least basic error checking?  Like verifying that the input string is
actually long enough for what we are doing here?

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v3] andes_spi: add andes_spi interface

2011-07-25 Thread Wolfgang Denk
Dear Macpaul Lin,

In message <1303718498-20740-1-git-send-email-macp...@andestech.com> you wrote:
> andes_spi is an spi interface developed by Andes Tech.
> 
> Signed-off-by: Macpaul Lin 
> Cc: Wolfgang Denk 
> Cc: Mike Frysinger 
> ---
> Changes for v2:
>   - Replace redundant length checking by min(len, 4).
>   - Remove redundant debug marco.
>   - Replace reading register in debug() by local variable.
>   - Add Baud rate setup code (APB register) according to datasheet.
> Changes for v3:
>   - Add comment to explain why the hardware doesn't allow changing
> frequency.
>   - Remove unnecessary varible initialization to zero.
>   - Refine the loop of data writing.
> 
>  drivers/spi/Makefile|1 +
>  drivers/spi/andes_spi.c |  302 
> +++
>  drivers/spi/andes_spi.h |  128 
>  3 files changed, 431 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/spi/andes_spi.c
>  create mode 100644 drivers/spi/andes_spi.h

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] post, memory test: add memory_post_test() to include file

2011-07-25 Thread Wolfgang Denk
Dear Heiko Schocher,

In message <1306909447-19603-3-git-send-email...@denx.de> you wrote:
> This include is needed, if this memory test is used "outside"
> from post code, for example booting with nand_spl, and using
> this memory test before copying u-boot code to RAM and jumping
> to it.
> 
> Signed-off-by: Heiko Schocher 
> ---
>  include/post.h |1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [Patch] For bug in UBIFS function ubifs_finddir

2011-07-25 Thread Wolfgang Denk
Dear Rod Boyce,

In message <4dfc750f.7050...@teamboyce.co.uk> you wrote:
> 
> Free private_data member element before freeing file structure.  This
> was causing malloc to crash.  Also remove unnecessary variable
> assigments after file structure was free'd.
> 
> Signed-off-by: Rod Boyce 

Changes have been requested for your patch.

Do you think you will find time to submit a fixed version any time
soon?

Thanks in advance.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 2/2] ext2: Simplify partial sector access logic

2011-07-25 Thread Wolfgang Denk
Dear Anton Staaf,

In message  
you wrote:
> Just checking, will this will make it into the next release?

I'm still waiting for a resubmit of patch 1/2 as requested by Detlev:

06/30 Detlev Zundel  Re: [U-Boot] [PATCH 1/2] ext2: Fix checkpatch 
violations
 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102360


Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 3/5] scsi/ahci: ata id little endian fix

2011-07-25 Thread Wolfgang Denk
Dear Rob Herring,

In message <1308692003-2488-4-git-send-email-robherri...@gmail.com> you wrote:
> From: Rob Herring 
> 
> The ata id string always needs swapping, not just on BE machines.
> 
> Signed-off-by: Rob Herring 
> Cc: Wolfgang Denk 
> ---
>  drivers/block/ahci.c |2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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feel and that's all. It's how the girl feels too. Don't press. If the
girl feels anything for you at all, you'll know.
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Re: [U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Kumar Gala

On Jul 25, 2011, at 2:28 PM, Wolfgang Denk wrote:

> Dear Kumar,
> 
> In message <20110725175756.d2bd8138e...@gemini.denx.de> I wrote:
>> 
>> This is a MPC8555 based board:
>> 
>>  CPU:   8555E, Version: 1.1, (0x80790011)
>>  Core:  Unknown, Version: 2.0, (0x80200020)
>> 
>> THe do_reset() code is supposed to be the one from
>> "arch/powerpc/cpu/mpc85xx/cpu.c"
> 
> The same (both the "Core: Unknown" and the "__fsl_ddr_set_lawbar:
> ERROR" issues) happens on the same board equipped with a MPC8541
> processor:
> 
>   CPU:   8541E, Version: 1.1, (0x807a0011)
>   Core:  Unknown, Version: 2.0, (0x80200020)
> 
> Note that old versions of U-Boot (like 1.3.0-rc2-g72e55d03 :-)
> used to print here:
> 
>   CPU:   8541, Version: 1.1, (0x807a0011)
>   Core:  E500, Version: 2.0, (0x80200020)
> 
> 
> Best regards,
> 
> Wolfgang Denk


Yeah, the 'unknown' issue was the other bug I was looking at ;)

- k
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Re: [U-Boot] [PATCH v3] scsi/ahci: add support for non-PCI controllers

2011-07-25 Thread Wolfgang Denk
Dear Rob Herring,

In message <1310004816-18266-1-git-send-email-robherri...@gmail.com> you wrote:
> From: Rob Herring 
> 
> Add support for AHCI controllers that are not PCI based.
> 
> Signed-off-by: Rob Herring 
> Cc: Wolfgang Denk 
> ---
> changes in v2:
> - fix checkpatch.pl warnings/errors
> - fix label indentation
> - simplify "sizeof(hd_driveid_t *) * AHCI_MAX_PORTS" to "sizeof(ataid)"
> - Add function prototypes for ahci_init and scsi_scan
> 
> changes in v3:
> - Introduce CONFIG_SCSI_AHCI_PLAT and replace CONFIG_PCI with it in 
>   ahci.c
> - Make no SCSI_DEV_ID and SCSI_VEND_ID only okay if CONFIG_SCSI_AHCI_PLAT
>   is defined.
> - fix checkpatch.pl warnings/errors (again...)
> 
>  common/cmd_scsi.c|5 ++-
>  drivers/block/ahci.c |   70 -
>  include/ahci.h   |4 +++
>  include/scsi.h   |1 +
>  4 files changed, 70 insertions(+), 10 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 2/2] ext2: Simplify partial sector access logic

2011-07-25 Thread Anton Staaf
How odd, I have the thread where I sent out the second version of the
patch and even have Detlev's Ack to it (the u-boot list is in the list
of recipients), but it isn't reflected on gmane or the u-boot list
archives.  I'll send it again and keep an eye on the list.

Thanks,
Anton

On Mon, Jul 25, 2011 at 3:03 PM, Wolfgang Denk  wrote:
> Dear Anton Staaf,
>
> In message 
>  you 
> wrote:
>> Just checking, will this will make it into the next release?
>
> I'm still waiting for a resubmit of patch 1/2 as requested by Detlev:
>
> 06/30 Detlev Zundel      Re: [U-Boot] [PATCH 1/2] ext2: Fix checkpatch 
> violations
>             http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102360
>
>
> Best regards,
>
> Wolfgang Denk
>
> --
> DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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> point is ... the point is ... the point is we've been not experienced
> for a lot longer than you. We've got  a  lot  of  experience  of  not
> having any experience."           - Terry Pratchett, _Witches Abroad_
>
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Re: [U-Boot] [PATCH V2] memcpy/memmove: Do not copy to same address

2011-07-25 Thread Wolfgang Denk
Dear Matthias Weisser,

In message <1306141435-24001-1-git-send-email-weiss...@arcor.de> you wrote:
> In some cases (e.g. bootm with a elf payload which is already at the right
> position) there is a in place copy of data to the same address. Catching this
> saves some ms while booting.
> 
> Signed-off-by: Matthias Weisser 
> ---
> Changes since V1:
>   - Made subject more informative
>   - Removed the optimization from bcopy as bcopy is not used anywhere
>   
>  lib/string.c |6 ++
>  1 files changed, 6 insertions(+), 0 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH V3] Fix: if using crc32 command watchdog timed out

2011-07-25 Thread Wolfgang Denk
Dear Jens Scharsig,

In message <4e23d6c2.7070...@bus-elektronik.de> you wrote:
> * Fix: if using crc32 command watchdog timed out
> * change function call crc32(..) to the watchdog-safe variant
>   crc_32_wd(..) to support watchdog reset
> 
> 
> Signed-off-by: Jens Scharsig 
> ---
>  common/cmd_mem.c |4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] Problem with PCI Express connecting 2 MPC8544

2011-07-25 Thread Swarthout Edward L-SWARTHOU
From: sardamaxima
> 
> In the first processor (configured as RC) I get the following 
...
> ...PCIE LTSSM=0x16, Negotiated link width=1

Good.

>Scanning PCI bus 01
> PCIE1 on bus 00 - 01 

... 
 
>  In the second processor (configured as EP) I get the 
> following output:
> "
> ...
>pci_init_board: devdisr=708, io_sel=2, host_agent=5
> 
>PCIE1 connected to Slot2 as End Point (base address e000a000)
> Scanning PCI bus 00
>  PCI Scan: Found Bus 0, Device 1, Function 0
> 00  01  1957  0033  0b20  00
> ...
> "
>  Here i am using an old version of u-boot (1.3.0-rc3). 

Since this is an old u-boot, it might not be setting CFG_READY.
If this is not set, the end point won't be seen.

Check PEX_CFG_READY with: "pci d 0.0 4b0 1"

-Ed
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Re: [U-Boot] __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=0)

2011-07-25 Thread Kumar Gala

On Jul 25, 2011, at 12:57 PM, Wolfgang Denk wrote:

> Dear Kumar Gala,
> 
> In message  you 
> wrote:
>> 
>>> DRAM:  __fsl_ddr_set_lawbar: ERROR (ctrl #0, intrlv=3D0)
>>> 256 MiB (DDR1, 64-bit, CL=3D2, ECC off)
> ...
>> On this board what is 'reset' really doing?  I have a theory but would
>> be helpful to understand what's happening.
> 
> This is a MPC8555 based board:
> 
>   CPU:   8555E, Version: 1.1, (0x80790011)
>   Core:  Unknown, Version: 2.0, (0x80200020)
> 
> THe do_reset() code is supposed to be the one from
> "arch/powerpc/cpu/mpc85xx/cpu.c"
> 
> Side note: rebooting Linux doesn't work either - it just hangs the
> board in Linux v3.0 and any earlier version I can still compile with
> my Fedora15 based host, i.e. down to around 2.6.32 or so.
> 
>> Can you also send me the full boot log (i'm looking at another bug that
>> might show up on this board).
> 
> Will do as PM.

Do you know if this board has any real reset on a FPGA or CPLD or something 
like that.

The problem on the 8555/8541 is the reset you are trigger is just a core reset 
and not one of the full SoC.  If there is a board level means I would suggest 
trying to utilize it instead.  If not this might be painful & problematic as 
you'll have to slowly make sure we are 'resetting' each SoC block properly.

- k
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Re: [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL

2011-07-25 Thread Andreas Bießmann
Dear Simon,

Am 25.07.2011 um 20:05 schrieb Simon Schwarz:

> Insert some NAND driver sources into NAND SPL library.
> 
> ---
> V1 changes:
> CHG Default to HW ecc in SPL build
> ADD nand_read_buf16 function, read buffer
> ADD omap_dev_ready function, indicte if chip is ready
> 
> V2 changes:
> DEL GPMC_WAIT0_PIN_ACTIVE define
> CHG omap_dev_ready() renamed to  omap_spl_dev_ready(), does not use the
>   GPMC_WAIT0_PIN_ACTIVE-define anymore
> CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
> ADD omap_spl_read_buf, 8x buf read function
> ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
> CHG cosmetic
> CHG nand_base and nand_bbt aren't needed for SPL anymore
> CHG omap_nand_switch_ecc is not compiled for SPL
> ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to 
> README.SPL
> 
> Transition from V1 to V2 also includes that this patch is now based on
>   - the new SPL layout by Aneesh V and Daniel Schwierzeck
>   - the OMAP4 SPL patches by Aneesh V
> 
> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND 
> support
> to omap_gpmc driver"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
> 
> Signed-off-by: Simon Schwarz 
> ---
> doc/README.SPL   |2 +
> drivers/mtd/nand/Makefile|6 +++-
> drivers/mtd/nand/omap_gpmc.c |   69 ++
> spl/Makefile |2 +
> 4 files changed, 78 insertions(+), 1 deletions(-)



> --- a/drivers/mtd/nand/omap_gpmc.c
> +++ b/drivers/mtd/nand/omap_gpmc.c
> @@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, 
> int32_t cmd,
>   writeb(cmd, this->IO_ADDR_W);
> }



> @@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, 
> int32_t mode)
>   }
> }
> 
> +

This single line is unnecessary.

> +#ifndef CONFIG_SPL_BUILD
> /*
>  * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
>  * The default is to come up on s/w ecc
> @@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
> 

regards

Andreas Bießmann
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Re: [U-Boot] [RESEND PATCH] gpio:samsung s5p_ suffix add for GPIO functions

2011-07-25 Thread Minkyu Kang
Dear Lukasz Majewski,

On 19 July 2011 03:05, Mike Frysinger  wrote:
> On Fri, Jul 15, 2011 at 06:16, Lukasz Majewski wrote:
>> This change is driven by need of general gpio_* functions,
>> which as their parameter are accepting the GPIO pin number, NOT
>> block and pin.
>
> Acked-by: Mike Frysinger 
> -mike

applied to u-boot-samsung

Thanks
Minkyu Kang
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Re: [U-Boot] [PATCH v3 1/2] ARMV7: Add support for Samsung ORIGEN board

2011-07-25 Thread Minkyu Kang
Dear Chander Kashyap,

On 18 July 2011 19:19, Chander Kashyap  wrote:
> Origen board is based upon S5PV310 SoC which is similiar to
> S5PC210 SoC.
>
> Signed-off-by: Chander Kashyap 
> ---
>  Changes for v2:
>        - None
>  Changes for v3:
>        - Board entry added Alphabetically in boards.cfg
>        - Used get_Ram_size function to calculate ram size
>
>  MAINTAINERS                          |    1 +
>  board/samsung/origen/Makefile        |   46 
>  board/samsung/origen/lowlevel_init.S |  464 
> ++
>  board/samsung/origen/mem_setup.S     |  359 ++
>  board/samsung/origen/origen.c        |  106 
>  boards.cfg                           |    1 +
>  include/configs/origen.h             |  164 
>  7 files changed, 1141 insertions(+), 0 deletions(-)
>  create mode 100644 board/samsung/origen/Makefile
>  create mode 100644 board/samsung/origen/lowlevel_init.S
>  create mode 100644 board/samsung/origen/mem_setup.S
>  create mode 100644 board/samsung/origen/origen.c
>  create mode 100644 include/configs/origen.h
>

Looks OK.
But, your patch failed to apply.

error: patch failed: MAINTAINERS:703
error: MAINTAINERS: patch does not apply
Patch failed at 0001 ARMV7: Add support for Samsung ORIGEN board

please rebase your patch.

and need one change.
Please see below link  and apply it.
http://git.denx.de/?p=u-boot/u-boot-samsung.git;a=commitdiff;h=095ae309787f242067d122d98a7025b4136aadc0

Thanks
Minkyu Kang.
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Re: [U-Boot] [PATCH] arm: lib: memcpy: Do not copy to same address

2011-07-25 Thread Matthias Weißer
Dear Albert

Am 23.05.2011 11:49, schrieb Albert ARIBAUD:
> Le 23/05/2011 11:30, Alexander Holler a écrit :
>> Am 23.05.2011 11:06, schrieb Matthias Weisser:
>>> In some cases (e.g. bootm with a elf payload which is already at the right
>>> position) there is a in place copy of data to the same address. Catching 
>>> this
>>> saves some ms while booting.
>>>
>>> Signed-off-by: Matthias Weisser
>>> ---
>>> arch/arm/lib/memcpy.S |3 +++
>>> 1 files changed, 3 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
>>> index 3b5aeec..f655256 100644
>>> --- a/arch/arm/lib/memcpy.S
>>> +++ b/arch/arm/lib/memcpy.S
>>> @@ -60,6 +60,9 @@
>>> .globl memcpy
>>> memcpy:
>>>
>>> +   cmp r0, r1
>>> +   moveq   pc, lr
>>> +
>>> enter   r4, lr
>>>
>>> subsr2, r2, #4
>>
>> The standard clearly say to both memory regions should not overlap when
>> memcpy() is used, so I would say this is the wrong place to fix that.
>
> I think the intent here is not to enforce the standard but to handle an
> actual, and degenerate, copy request in the most efficient manner, and
> in that respect, the patch does its job.

Can this patch go in or do I need to change anything? I really would 
like to see it in mainline.

Regards,
Matthias
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Re: [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support

2011-07-25 Thread Andreas Bießmann
Dear Simon,

Am 25.07.2011 um 20:05 schrieb Simon Schwarz:

> Add NAND support for the new SPL structure.
> 
> ---
> This patch didn't exist before V2!
> 
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
>   header
> CHG cosmetic
> ADD do_reset() implementation for omap-common spl
> ADD nand_copy_image to nand.h
> ADD CPP barriers for mmc and nand support. The parts depending on library
>   support are only compiled if the respective library is included.
> 
> Transition from V1 to V2 also includes that this patch is now based on
>   - the new SPL layout by Aneesh V and Daniel Schwierzeck
>   - the OMAP4 SPL patches by Aneesh V
> 
> Signed-off-by: Simon Schwarz 
> ---
> arch/arm/cpu/armv7/omap-common/spl.c |   43 ++
> arch/arm/include/asm/omap_common.h   |2 +
> include/nand.h   |3 ++
> 3 files changed, 48 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
> b/arch/arm/cpu/armv7/omap-common/spl.c
> index d177652..3a0093d 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -26,6 +26,7 @@
> #include 
> #include 
> #include 
> +#include 
> #include 
> #include 
> #include 
> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header 
> *header)
>   }
> }
> 
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_raw(struct mmc *mmc)
> {
>   u32 image_size_sectors, err;
> @@ -140,7 +142,9 @@ end:
>   hang();
>   }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> 
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_fat(struct mmc *mmc)
> {
>   s32 err;
> @@ -173,7 +177,9 @@ end:
>   hang();
>   }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> 
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image(void)
> {
>   struct mmc *mmc;
> @@ -206,6 +212,26 @@ static void mmc_load_image(void)
>   hang();
>   }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> +
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void)
> +{
> + gpmc_init();
> + nand_init();
> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, 
> CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
> +}
> +#endif /* CONFIG_SPL_NAND_SUPPORT */
> 
> void jump_to_image_no_args(void)
> {
> @@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
>   boot_device = omap_boot_device();
>   debug("boot device - %d\n", boot_device);
>   switch (boot_device) {
> +#ifdef CONFIG_SPL_MMC_SUPPORT
>   case BOOT_DEVICE_MMC1:
>   case BOOT_DEVICE_MMC2:
>   mmc_load_image();
>   break;
> +#endif
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> + case BOOT_DEVICE_NAND:
> + nand_load_image();
> + break;
> +#endif
>   default:
>   printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
>   hang();
> @@ -259,7 +292,9 @@ void preloader_console_init(void)
>   gd->flags |= GD_FLG_RELOC;
>   gd->baudrate = CONFIG_BAUDRATE;
> 
> +#ifndef CONFIG_OMAP34XX

Well .. that was discussed with Aneesh in another mail. I prefer Aneesh decides 
how the interface should be:
 a) OMAP3 provides setup_clocks_for_console() and remove the UART stuff from 
per_clocks_enable()
 b) remove setup_clocks_for_console() here and require preloader_console_init() 
to have the clocks enabled before

>   setup_clocks_for_console();
> +#endif
>   serial_init();  /* serial communications setup */
> 
>   /* Avoid a second "U-Boot" coming from this string */
> @@ -270,3 +305,11 @@ void preloader_console_init(void)
>   omap_rev_string(rev_string_buffer);
>   printf("Texas Instruments %s\n", rev_string_buffer);
> }

Some comment would be useful why this is here .. 

> +
> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> +{
> + debug("resetting cpu...");
> + reset_cpu(0);
> +
> + return 0;
> +}
> diff --git a/arch/arm/include/asm/omap_common.h 
> b/arch/arm/include/asm/omap_common.h
> index d3cb857..ee45a33 100644
> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -49,6 +49,8 @@ void preloader_console_init(void);
> #define   MMCSD_MODE_UNDEFINED0
> #define MMCSD_MODE_RAW1
> #define MMCSD_MODE_FAT2
> +#define NAND_MODE_HW 3
> +#define NAND_MODE_SW 4

Shouldn't that 

Re: [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support

2011-07-25 Thread Andreas Bießmann
Dear Simon,

Am 25.07.2011 um 20:05 schrieb Simon Schwarz:

> Support for the new spl structure. Using the interface defined by Aneesh V for
> OMAP4
> ---
> V1 changes:
> ADD support for early console output in SPL
> 
> V2 changes:
> ADD include omap_common.h in board.c
> ADD implement new omap common interface omap_boot_device, omap_boot_mode and
>   omap_rev_string (very basic)
> CHG cosmetic
> CHG Don't add ecc switch command in SPL
> ADD save_boot_params stump with warning to implement it
> 
> Transition from V1 to V2 also includes that this patch is now based on
>   - the new SPL layout by Aneesh V and Daniel Schwierzeck
>   - the OMAP4 SPL patches by Aneesh V
> 
> This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
> support nand_spl boot"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
> 
> Signed-off-by: Simon Schwarz 
> ---
> arch/arm/cpu/armv7/omap3/board.c|   36 +-
> arch/arm/cpu/armv7/omap3/lowlevel_init.S|5 +++
> arch/arm/include/asm/arch-omap3/sys_proto.h |1 +
> arch/arm/include/asm/omap_common.h  |3 +-
> 4 files changed, 41 insertions(+), 4 deletions(-)



> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -49,8 +49,7 @@ void preloader_console_init(void);
> #define   MMCSD_MODE_UNDEFINED0
> #define MMCSD_MODE_RAW1
> #define MMCSD_MODE_FAT2
> -#define NAND_MODE_HW 3
> -#define NAND_MODE_SW 4
> +#define NAND_MODE_HW_ECC 3

Well ... just choose this naming in Patch 2/5 ... and also change NAND_MODE_SW

> u32 omap_boot_device(void);
> u32 omap_boot_mode(void);
> -- 
> 1.7.4.1

regards

Andreas Bießmann
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Re: [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL

2011-07-25 Thread Andreas Bießmann
Dear Simon,

Am 25.07.2011 um 20:05 schrieb Simon Schwarz:

> Add NAND SPL support to the devkit8000 config
> 
> ---
> V1 changes:
> ADD devkit8000_nand to board.cfg
> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
> ADD config ecc, SRAM, SPL to board config
> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
> 
> V2 changes:
> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND 
> and
>   CONFIG_SPL_LDSCRIPT to board config
> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
>   expect u-boot and where to load it.
> ADD some barrier to not build board_eth_init in SPL
> DEL no changes to board.cfg
> DEL everything used the old nand_spl layout (Makefile, linker script,
>   spl-devkit8000.c)
> CHG cosmetic
> 
> Transition from V1 to V2 also includes that this patch is now based on
>   - the new SPL layout by Aneesh V and Daniel Schwierzeck
>   - the OMAP4 SPL patches by Aneesh V
> 
> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
> support"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
> 
> Signed-off-by: Simon Schwarz 

Put your SoB before the first '---'!

> ---
> board/timll/devkit8000/devkit8000.c |2 +-
> include/configs/devkit8000.h|   46 +++
> 2 files changed, 47 insertions(+), 1 deletions(-)
> 
> diff --git a/board/timll/devkit8000/devkit8000.c 
> b/board/timll/devkit8000/devkit8000.c
> index 95afaaa..9b53742 100644
> --- a/board/timll/devkit8000/devkit8000.c
> +++ b/board/timll/devkit8000/devkit8000.c
> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
>   MUX_DEVKIT8000();
> }
> 
> -#ifdef CONFIG_DRIVER_DM9000
> +#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
> /*
>  * Routine: board_eth_init
>  * Description: Setting up the Ethernet hardware.
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 125c690..46c1e3d 100644
> --- a/include/configs/devkit8000.h
> +++ b/include/configs/devkit8000.h
> @@ -307,4 +307,50 @@
>
> CONFIG_SYS_INIT_RAM_SIZE - \
>
> GENERATED_GBL_DATA_SIZE)
> 
> +/* SRAM config */
> +#define CONFIG_SYS_SRAM_START  0x4020
> +#define CONFIG_SYS_SRAM_SIZE   0x  /*64 kB*/

64 kB is (64 << 10) which is 0x1!
0x is 64 kB - 1

> +
> +/* Defines for SPL */
> +#define CONFIG_SPL
> +
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBDISK_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_POWER_SUPPORT
> +#define CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SPL_LDSCRIPT  
> $(CPUDIR)/omap-common/u-boot-spl.lds
> +
> +#define CONFIG_SPL_TEXT_BASE 0x4020 
> /*CONFIG_SYS_SRAM_START*/
> +#define CONFIG_SPL_MAX_SIZE  0xB400  /* 45 K */

This is correct

> +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
> +
> +#define CONFIG_SPL_BSS_START_ADDR0x8000 
> /*CONFIG_SYS_SDRAM_BASE*/
> +#define CONFIG_SPL_BSS_MAX_SIZE  0x8
> +
> +/* NAND boot config */
> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
> +#define CONFIG_SYS_NAND_PAGE_SIZE  2048
> +#define CONFIG_SYS_NAND_OOBSIZE64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
> +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> + 
> 10, 11, 12, 13}
> +
> +#define CONFIG_SYS_NAND_ECCSIZE512
> +#define CONFIG_SYS_NAND_ECCBYTES   3
> +
> +#define CONFIG_SYS_NAND_ECCSTEPS   (CONFIG_SYS_NAND_PAGE_SIZE / \
> + 
> CONFIG_SYS_NAND_ECCSIZE)
> +#define CONFIG_SYS_NAND_ECCTOTAL   (CONFIG_SYS_NAND_ECCBYTES * \
> + 
> CONFIG_SYS_NAND_ECCSTEPS)
> +
> +#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
> +
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS  0x8
> +#define CONFIG_SYS_NAND_U_BOOT_SIZE  0x20
> +#define CONFIG_SYS_NAND_U_BOOT_DST   CONFIG_SYS_TEXT_BASE
> +
> #endif /* __CONFIG_H */
> -- 
> 1.7.4.1

regards

Andreas Bießmann

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Re: [U-Boot] [PATCH v3 1/2] ARMV7: Add support for Samsung ORIGEN board

2011-07-25 Thread Igor Grinberg
On 07/18/11 13:19, Chander Kashyap wrote:

> Origen board is based upon S5PV310 SoC which is similiar to
> S5PC210 SoC.
>
> Signed-off-by: Chander Kashyap 
> ---
>  Changes for v2:
>   - None
>  Changes for v3:
>   - Board entry added Alphabetically in boards.cfg
>   - Used get_Ram_size function to calculate ram size

[...]

> diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
> new file mode 100644
> index 000..6dd1709
> --- /dev/null
> +++ b/board/samsung/origen/origen.c

[...]

> +
> +int board_init(void)
> +{
> + gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE;
> + gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE;
> +
> + gd->bd->bi_arch_number = MACH_TYPE_ORIGEN;

This should be done in the board config file.
Please, see the CONFIG_MACH_TYPE in the U-Boot documentation (README file).

[...]

> diff --git a/include/configs/origen.h b/include/configs/origen.h
> new file mode 100644
> index 000..441b311
> --- /dev/null
> +++ b/include/configs/origen.h

[...]

> +/* MACH_TYPE_ORIGEN macro will be removed once added to mach-types */
> +#define MACH_TYPE_ORIGEN 3455

#define CONFIG_MACH_TYPEMACH_TYPE_ORIGEN


-- 
Regards,
Igor.

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