From: sardamaxima > > In the first processor (configured as RC) I get the following ... > ...PCIE LTSSM=0x16, Negotiated link width=1
Good. > Scanning PCI bus 01 > PCIE1 on bus 00 - 01 ... > In the second processor (configured as EP) I get the > following output: > " > ... > pci_init_board: devdisr=7000008, io_sel=2, host_agent=5 > > PCIE1 connected to Slot2 as End Point (base address e000a000) > Scanning PCI bus 00 > PCI Scan: Found Bus 0, Device 1, Function 0 > 00 01 1957 0033 0b20 00 > ... > " > Here i am using an old version of u-boot (1.3.0-rc3). Since this is an old u-boot, it might not be setting CFG_READY. If this is not set, the end point won't be seen. Check PEX_CFG_READY with: "pci d 0.0 4b0 1" -Ed _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
