Hi, all
I'm a little confused on NAND read operation.
According to NAND character, NAND flash is read page by page, which mean's once
you read, at least you should read data with page size (such as 512Bytes)
But the nand_read_byte() is implemented as following: static u_char
nand_read_byte(s
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Dear Wolfgang,
Could you pull from the master branch at git://git.denx.de/u-boot-sh.git ?
Best regards,
Nobuhiro
The following changes since commit f2b4bc04d6aed6be712d236dab48ac4c4da22cbf:
Wolfgang Denk (1):
Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash
are available
Dear Scott,
> Why do you need to write to the buffer in the NAND SPL? I don't think you
> need read_byte either.
Yes, we don't use nand_read_byte() and nand_write_buf(), it's just
copy from drivers/mtd/nand/s3c64xx.c.
BR.
Hui.
___
U-Boot mailing list
Hi Ben,
> Next time please remember your signed-off-by line.
OK, thanks.
BR.
Hui.
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U-Boot@lists.denx.de
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> 2009/10/29 Hui.Tang :
>> This patch add a S3C2410-based new board GEC2410.
>> Signed-off-by: Hui.Tang
>> ---
>> Makefile |7 +
>> board/gec/gec2410/Makefile| 51
>> board/gec/gec2410/config.mk | 32 +++
>> board/gec/gec2410/flash.
Dear Hui.Tang
2009/10/29 Hui.Tang :
>
> This patch add a S3C2410-based new board GEC2410.
> Signed-off-by: Hui.Tang
> ---
> Makefile | 7 +
> board/gec/gec2410/Makefile | 51
> board/gec/gec2410/config.mk | 32 +++
> board/gec/gec2410
There was the point that did not use write macro.
Change to write macro.
Signed-off-by: Nobuhiro Iwamatsu
---
board/espt/lowlevel_init.S | 10 +-
1 files changed, 1 insertions(+), 9 deletions(-)
diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S
index 7d5d72e..7f0686
32bit mode of sh7785lcr board have 'pcrel too far'' err with lastest
SH toolchain.
This patch fix this.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Takashi Yoshii
---
board/renesas/sh7785lcr/lowlevel_init.S | 107 +++
1 files changed, 53 insertions(+), 54 deleti
On Thu, Oct 29, 2009 at 09:05:59PM +0800, Hui.Tang wrote:
> +# PAD_TO used to generate a 4kByte binary needed for the combined image
> +# -> PAD_TO = TEXT_BASE + 4096
> +PAD_TO := $(shell expr $$[$(TEXT_BASE) + 4096])
Wasn't there a thread about this construct causing problems in certain
env
On Thu, Oct 29, 2009 at 05:12:14PM +0800, Hui.Tang wrote:
> add missing functios nand_read_byte(), nand_write_buf(), nand_read_buf()
> for CONFIG_NAND_SPL config, also set nand->select_chip = NULL, since in
> nand_boot() we will check it to do a select_chip action.
Why do you need to write to the
On Thu, 29 Oct 2009 15:38:18 +
Nick Thompson wrote:
> +int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins)
> +{
> + int i;
> +
> + for (i = 0; i < n_pins; i++) {
> + int value = pins[i].value;
> + int field = pins[i].field;
> +
> +
alan A. A wrote:
> Hi,
>
> when i try to build u-boot 1.3.2, i get the following error:
>
>
> make[1]: Leaving directory
> `/home/ctech/ppc/package/usr/src/u-boot-1.3.2/board/CT/lx411s'
> UNDEF_SYM=`ppc_4xx-objdump -x lib_generic/libgeneric.a
> board/CT/lx411s/liblx411s.a cpu/ppc4xx/libppc4
Hi,
when i try to build u-boot 1.3.2, i get the following error:
make[1]: Leaving directory
`/home/ctech/ppc/package/usr/src/u-boot-1.3.2/board/CT/lx411s'
UNDEF_SYM=`ppc_4xx-objdump -x lib_generic/libgeneric.a
board/CT/lx411s/liblx411s.a cpu/ppc4xx/libppc4xx.a lib_ppc/libppc.a
fs/cramfs/l
On Fri, Oct 30, 2009 at 2:42 AM, Detlev Zundel wrote:
> Hi Graeme,
>
>
> [...]
>
+#ifdef CONFIG_X86
+#define uart_writeb(x,y) outb(x,(ulong)y)
+#define uart_readb(y)inb((ulong)y)
+#else
+#define uart_writeb(x,y) writeb(x,y)
+#define uart_readb(y) r
On Thu, 29 Oct 2009 19:30:44 +0530
Sandeep Gopalpet wrote:
> Moved the mdio regs out of the tsec structure,and
> provided different offsets for tsec base and mdio
> base so that provision for etsec2.0 can be provided.
>
> This patch helps in providing the support for etsec2.0
> In etsec2.0, the
Stefan Roese wrote:
> On Thursday 29 October 2009 16:34:43 Remy Bohmer wrote:
>>> No MAKEALL arm regressions.
>>> pushed to arm/next.
>> Did you notice this is a bug fix?
>> Shouldn't it go in this release?
>
> Yes, I would recommend to push this into this release as well.
>
This is fine with m
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.
Signed-off-by: Stefan Roese
---
board/amcc/bamboo/bambo
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.
Signed-off-by: Stefan Roese
---
board/amcc/canyonl
This patch fixes a problem only seen very occasionally on Canyonlands.
The NOR flash interface (CFI driver) doesn't work reliably in all cases.
Erasing and/or programming sometimes doesn't work. Sometimes with
an error message, like "flash not erased" when trying to program an
area that should have
Hello Hui,
Hui.Tang wrote:
> cs8900_get_enetaddr() call get_reg_init_bus(), which will use dev->priv in
> CONFIG_CS8900_BUS16 config, so we should assign dev->priv before using it.
>
> ---
> drivers/net/cs8900.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drive
wolfg...@leila.ping.de (Wolfgang Wegner) wrote on 29/10/2009 16:44:55:
>
> Hi,
>
> although I have to leave for now, just some questions to see if
> there is anything I understood correctly until now...
>
> - in the PPC startup (assembly) files, the section .got2 is explicitely
> created using ST
On Wed, Oct 28, 2009 at 03:27:26AM -0400, Mike Frysinger wrote:
> On Tuesday 27 October 2009 15:34:10 Scott Wood wrote:
> > On Mon, Oct 26, 2009 at 07:57:50PM -0400, Mike Frysinger wrote:
> > > perhaps it would make more sense to create a HOSTCOMPILE/HOSTLINK (or
> > > whatever) variable so this ki
U-boot must be linked to the correct startup address in
flash so that global data acceses work before relocation to
RAM.
This patch demonstrates the changes needed in common
code needed to run from any link address.
With these changes and a few asm insn in start.S
I can link my u-boot to address 0
Accessing global data before relocation needs
special handling if link address != load address.
Use LINK_OFF to calculate the difference.
---
common/cmd_nvedit.c |2 ++
common/console.c | 12 +---
common/env_common.c |2 +-
cpu/mpc83xx/cpu.c
This is the most complex change. Keep this
one as a separate commit for now.
---
common/env_flash.c | 65 +++
1 files changed, 39 insertions(+), 26 deletions(-)
diff --git a/common/env_flash.c b/common/env_flash.c
index b860c48..64882d2 100644
---
The FSL_CORENET platforms use a completely different means to determine
which PCIe port is enabled as well as if its a host or agent/end-point.
Signed-off-by: Kumar Gala
---
cpu/mpc8xxx/pci_cfg.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc8xxx/pci_cfg.c b/c
s-paul...@ti.com wrote:
> From: Sandeep Paulraj
>
> Void function was returning 0 in the m41t94 rtc driver.
> This makes it similar to m41t62 rtc driver.
>
> Signed-off-by: Sandeep Paulraj
> ---
> drivers/rtc/m41t94.c |1 -
> 1 files changed, 0 insertions(+), 1 deletions(-)
>
> diff --git
Hi,
although I have to leave for now, just some questions to see if
there is anything I understood correctly until now...
- in the PPC startup (assembly) files, the section .got2 is explicitely
created using START_GOT etc.
- .got2 contains some vital pointers (vectors) as well as data
pointer
wolfg...@leila.ping.de (Wolfgang Wegner) wrote on 29/10/2009 16:00:04:
>
> On Thu, Oct 29, 2009 at 03:22:24PM +0100, Joakim Tjernlund wrote:
> >
> > It seems like you don't have any relocation data as both __got2_entries and
> > __fixup_entries are zero. Something seems broken in general, perhaps y
Hi Graeme,
[...]
>>> +#ifdef CONFIG_X86
>>> +#define uart_writeb(x,y) outb(x,(ulong)y)
>>> +#define uart_readb(y)inb((ulong)y)
>>> +#else
>>> +#define uart_writeb(x,y) writeb(x,y)
>>> +#define uart_readb(y) readb(y)
>>> +#endif
>>
>> Why do you need a specific variant for X86
On Thursday 29 October 2009 16:34:43 Remy Bohmer wrote:
> > No MAKEALL arm regressions.
> > pushed to arm/next.
>
> Did you notice this is a bug fix?
> Shouldn't it go in this release?
Yes, I would recommend to push this into this release as well.
Cheers,
Stefan
--
DENX Software Engineering Gm
Davinci: add a pin multiplexer configuration API.
Creates a method allowing pin settings to be logically grouped into data
structure arrays and provids an API to configure the PINMUX settings to
enable the relevant pin functions.
Signed-off-by: Nick Thompson
---
Applies to: u-boot-ti
The PINMUX
Hi Tom,
> No MAKEALL arm regressions.
> pushed to arm/next.
Did you notice this is a bug fix?
Shouldn't it go in this release?
Remy
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Wolfgang Denk wrote:
> Dear Tom,
>
> In message <4ae99f40.4000...@windriver.com> you wrote:
>>> By the way, the AT91RM9200.h. has hundreds of style problems.
>>> This requires a complete revision of the AT91RM9200.h.
>>> I can try this, but will take a while and I can't test other
>>> RM9200 boar
Remy Bohmer wrote:
> Hi Tom,
>
Looking at the Linux ARM
version, the basic difference seems to be the header
"include/asm-arm/unaligned.h" which includes this file. The Linux
version of "unaligned.h" does *not* include "access_ok.h" at all. It
includes "le_byteshift.h" and
On Thu, Oct 29, 2009 at 03:22:24PM +0100, Joakim Tjernlund wrote:
>
> It seems like you don't have any relocation data as both __got2_entries and
> __fixup_entries are zero. Something seems broken in general, perhaps your
> linker script
> is bust?
I took board/freescale/m5373evb/u-boot.lds with
Dear Tom,
In message <4ae99f40.4000...@windriver.com> you wrote:
>
> > By the way, the AT91RM9200.h. has hundreds of style problems.
> > This requires a complete revision of the AT91RM9200.h.
> > I can try this, but will take a while and I can't test other
> > RM9200 boards.
>
> Please limit you
Hi Tom,
>>> Looking at the Linux ARM
>>> version, the basic difference seems to be the header
>>> "include/asm-arm/unaligned.h" which includes this file. The Linux
>>> version of "unaligned.h" does *not* include "access_ok.h" at all. It
>>> includes "le_byteshift.h" and "be_byteshift.h" instead. A
Remy Bohmer wrote:
> Hi,
>
> 2009/10/29 Stefan Roese :
>> Hi Remy,
>>
>> On Wednesday 28 October 2009 22:13:38 Remy Bohmer wrote:
>>> The current generic code for handling unaligned access assumes that
>>> the processor can properly handle unaligned accesses itself.
>>> This is at least not the ca
wolfg...@leila.ping.de (Wolfgang Wegner) wrote on 29/10/2009 14:41:00:
>
> Dear Joakim Tjernlund,
>
> On Thu, Oct 29, 2009 at 02:08:05PM +0100, Joakim Tjernlund wrote:
> >
> > Just to avoid any misunderstandings, the GOT does not hold offsets, it holds
> > absolute addresses. These addresses gets a
Jens Scharsig wrote:
> Dear Wolfgang Denk
>> Dear Jens Scharsig,
>>
>
>> This is close. Of course we should drop the AT91_REG and use standard
>> types instead, and "PIO_OER" is not a logal variable name either
>> because it's all-capitals. So this entry should rather look like this:
>>
>> .
Dear Joakim Tjernlund,
On Thu, Oct 29, 2009 at 02:08:05PM +0100, Joakim Tjernlund wrote:
>
> Just to avoid any misunderstandings, the GOT does not hold offsets, it holds
> absolute addresses. These addresses gets adjusted with an offset when you
> relocate.
thank you, I already understood this.
Dear Wolfgang Denk
> Dear Jens Scharsig,
>
> This is close. Of course we should drop the AT91_REG and use standard
> types instead, and "PIO_OER" is not a logal variable name either
> because it's all-capitals. So this entry should rather look like this:
>
> ...
> u32 pio_oer;
>
Signed-off-by: Remy Bohmer
---
common/cmd_bootm.c |2 +-
include/image.h|2 --
2 files changed, 1 insertion(+), 3 deletions(-)
Index: u-boot-git-28102009/common/cmd_bootm.c
===
--- u-boot-git-28102009.orig/common/cmd_boo
hi list,
i have a mpc8260 based VME board, running 1.3.3 u-boot (yes i know
old, will try to upgrade as soon as possible). The board has trouble
negotiating its ethernet (FCC) duplex mode. Sometimes it negotiates
full, sometimes half duplex. If the board negotiates full duplex it
has trouble to
This patch add a S3C2410-based new board GEC2410.
Signed-off-by: Hui.Tang
---
Makefile |7 +
board/gec/gec2410/Makefile| 51
board/gec/gec2410/config.mk | 32 +++
board/gec/gec2410/flash.c | 433
>
> Dear Wolfgang Wegner,
>
> In message <20091029082113.ge3...@leila.ping.de> you wrote:
> >
> > Now I recognized that commit 6385b28116f775da4771b768ba9bf93c3aaaf26e
> > removed FPGA relocation, which of course breaks FPGA code for my
> > Coldfire board.
>
> This is an out-of-tree port, right? If
Hi,
this is just to let you knwo that we now again have an active "next"
branch which is waiting for pull requests from the custodians.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groeben
Dear Remy,
In message <3efb10970910290435y67cd1c37q6152e58de0267...@mail.gmail.com> you
wrote:
>
> > NAK. This code is in no way dependent on the Power architecture, so
> > CONFIG_PPC is definitly the wrong thing to check for.
>
> Well, in include/image.h, line 223 this is listed:
...
>
> So,
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet
---
include/asm-ppc/immap_83xx.h |2 +-
include/asm-ppc/immap_85xx.h |6 +-
include/asm-ppc/i
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved t
Dear Wolfgang Denk,
On Thu, Oct 29, 2009 at 12:00:00PM +0100, Wolfgang Denk wrote:
> Dear Wolfgang Wegner,
>
> In message <20091029082113.ge3...@leila.ping.de> you wrote:
> >
> > Now I recognized that commit 6385b28116f775da4771b768ba9bf93c3aaaf26e
> > removed FPGA relocation, which of course br
Thanks for the information... this means less work form me... at least
for this day.
ciao
luigi
On Thu, Oct 29, 2009 at 11:36 AM, Wolfgang Denk wrote:
> Dear Jens Gehrlein,
>
> In message <4ae94201.8000...@tqs.de> you wrote:
>>
>> Seems that the value is about a tenth of the core frequency.
>>
>-Original Message-
>From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>Sent: Wednesday, October 28, 2009 8:27 PM
>To: Kumar Gopalpet-B05799
>Cc: Phillips Kim-R1AAHA; u-boot@lists.denx.de
>Subject: Re: [U-Boot] [PATCH v3 1/2] NET: Move MDIO regs out
>of TSEC Space
>
>
>On Oct 28, 200
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Ed Swarthout
> Sent: Thursday, October 29, 2009 12:59 PM
> > +++ b/board/freescale/mpc8572ds/mpc8572ds.c
> > @@ -199,7 +199,7 @@ void pci_init_board(void)
> > first_free_busno = fsl_pci_init_port(&pci_info[num++],
> > -
The asm-arm/unaligned.h includes linux/unaligned/access_ok.h
This file is unsafe to be used on ARM, since it does an unaligned memory
accesses which fails on ARM.
Lookin at Linux the basic difference seems to be the header
"include/asm-arm/unaligned.h". The Linux version of "unaligned.h"
does *not
>-Original Message-
>From: Phillips Kim-R1AAHA
>Sent: Thursday, October 29, 2009 1:36 AM
>To: Kumar Gopalpet-B05799
>Cc: u-boot@lists.denx.de
>Subject: Re: [PATCH v3 1/2] NET: Move MDIO regs out of TSEC Space
>
>On Wed, 28 Oct 2009 14:19:18 +0530
>Sandeep Gopalpet wrote:
>
>> Moved the
Hi Wolfgang,
2009/10/29 Wolfgang Denk :
> Dear Remy Bohmer,
>
> please pay a little more attention to the commit subjects (here:
> s/beng/being/, please); also, make sure the subject is short enough
> for a commit message title line.
OK.
>>
>> +#if defined(CONFIG_PPC)
>>
Hi,
2009/10/29 Stefan Roese :
> Hi Remy,
>
> On Wednesday 28 October 2009 22:13:38 Remy Bohmer wrote:
>> The current generic code for handling unaligned access assumes that
>> the processor can properly handle unaligned accesses itself.
>> This is at least not the case for ARM, which results in ru
Dear Wolfgang Wegner,
In message <20091029082113.ge3...@leila.ping.de> you wrote:
>
> Now I recognized that commit 6385b28116f775da4771b768ba9bf93c3aaaf26e
> removed FPGA relocation, which of course breaks FPGA code for my
> Coldfire board.
This is an out-of-tree port, right? If your code had be
Dear Remy Bohmer,
please pay a little more attention to the commit subjects (here:
s/beng/being/, please); also, make sure the subject is short enough
for a commit message title line.
In message <1256764421-27799-7-git-send-email-li...@bohmer.net> you wrote:
> Signed-off-by: Remy Bohmer
> ---
>
Dear Jens Scharsig,
In message <4ae946e7.4050...@bus-elektronik.de> you wrote:
>
> If I understand you correctly now?
> The train goes in the opposite direction.
>
> in the AT91RM9200.h
>
> a port is defined as
>
> typedef struct _AT91S_PIO
> {
> ...
> AT91_REG PIO_OER;
Dear Jens Gehrlein,
In message <4ae94201.8000...@tqs.de> you wrote:
>
> Seems that the value is about a tenth of the core frequency.
> I observed similar on TQM8548. Although I know, that the value
> is bogus (as the name tells), do you know the reason, why it
> isn't the core frequency?
Please
Hi Stefan,
I have did the same.
Thanks for all infomation given so far.
Regards,
Prakash
On Thu, Oct 29, 2009 at 12:51 PM, Stefan Roese wrote:
> Hi Prakash,
>
> On Thursday 29 October 2009 07:24:25 prakash bedge wrote:
> > Can you please send me the patch details to fixup the CFI query related
Hello javier,
javier Martin wrote:
>> Hmm.. there is a driver/i2c/mxc_i2c.c driver for i.mx31, maybe the
>> i.mx27 is similiar to this? Can you check this?
>
> Yes, I2C registers are the same in both chips. The only things that I
> must change are:
> - i2c clock management.
> - i2c base addresses
> Hmm.. there is a driver/i2c/mxc_i2c.c driver for i.mx31, maybe the
> i.mx27 is similiar to this? Can you check this?
Yes, I2C registers are the same in both chips. The only things that I
must change are:
- i2c clock management.
- i2c base addresses.
My current approach is trying to make this dr
Hello javier,
javier Martin wrote:
>> If you need two different hardware interfaces, there
>> is an approach, see:
>>
>> http://git.denx.de/?p=u-boot/u-boot-i2c.git;a=shortlog;h=refs/heads/multibus_v2
>>
>> I ported (hopefully all) hardware i2c drivers to this new approach,
>> but didn;t find the
> If you need two different hardware interfaces, there
> is an approach, see:
>
> http://git.denx.de/?p=u-boot/u-boot-i2c.git;a=shortlog;h=refs/heads/multibus_v2
>
> I ported (hopefully all) hardware i2c drivers to this new approach,
> but didn;t find the time to test this again from scratch, I jus
Hello javier,
javier Martin wrote:
> I read a discussion about this subject in the past but it didn't
> arrive to a conclusion. What would be necessary for supporting two I2C
> interfaces? Maybe an i2c command that supports changing active
> interface or something similar?
What do you mean with t
add missing functios nand_read_byte(), nand_write_buf(), nand_read_buf() for
CONFIG_NAND_SPL config, also set nand->select_chip = NULL, since in nand_boot()
we will check it to do a select_chip action.
---
drivers/mtd/nand/s3c2410_nand.c | 39 +--
1 files ch
cs8900_get_enetaddr() call get_reg_init_bus(), which will use dev->priv in
CONFIG_CS8900_BUS16 config, so we should assign dev->priv before using it.
---
drivers/net/cs8900.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c
ind
I read a discussion about this subject in the past but it didn't
arrive to a conclusion. What would be necessary for supporting two I2C
interfaces? Maybe an i2c command that supports changing active
interface or something similar?
--
Javier Martin
Vista Silicon S.L.
CDTUC - FASE C - Oficina S-34
> -Original Message-
> From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net]
> Sent: Thursday, October 29, 2009 1:41 PM
> To: U-Boot ML; Prafulla Wadaskar; Wolfgang Denk
> Subject: [PATCH v2 2/2]: arm:kirkwood: Add hardware watchdog
> support for Marvell Kirkwood boards
>
> Init
> -Original Message-
> From: Simon Kagstrom [mailto:simon.kagst...@netinsight.net]
> Sent: Thursday, October 29, 2009 1:39 PM
> To: U-Boot ML; Prafulla Wadaskar; Wolfgang Denk
> Subject: [PATCH v2 1/2]: common: Add a watchdog CLI command
>
> A watchdog command to enable the watchdog wi
Hi,
I am using U-Boot on a Coldfire to load FPGA code (Xilinx Spartan3
and Altera Cyclone2, currently) and am just trying to update my code
base to current U-Boot for finally sending patches.
Now I recognized that commit 6385b28116f775da4771b768ba9bf93c3aaaf26e
removed FPGA relocation, which of c
Initialize by calling the generic API watchdog_enable() with the number
of seconds for the watchdog to timeout. It's not possible to disable the
watchdog once it's on.
Signed-off-by: Simon Kagstrom
---
ChangeLog:
v2:
* Remove watchdog_disable()
* Add check to see that the maximum time
A watchdog command to enable the watchdog with a timeout from the CLI
can sometimes be useful. Add that. This also adds a common API for
enabling watchdogs. The API is simple:
int watchdog_enable(unsigned int timeout);
the timeout range vary depending on hardware, and the driver should
re
Hi!
These two patches add a generic watchdog CLI command and a driver for
the watchdog on Marvell Kirkwood that uses it.
The command usage is
watchdog - Watchdog commands
Usage:
watchdog - start the watchdog with `timeout' seconds timeout
ChangeLog:
v2: Adapt according to comments
Hi all,
U-Boot-v2 now has its own list on infradead.org. If you are interested
in U-Boot-v2 development please subscribe here:
http://lists.infradead.org/mailman/listinfo/u-boot-v2
So as of now all v2 related topics should go over this list.
Thanks
Sascha
--
Pengutronix e.K.
Some boards like Freescale imx27-ipcam and Vista Silicon
imx27_visstrim_m10 have 25MHz clocks connected to 26MHz input.
This patch allows this value to be specified from the board
configuration file in the same way as it is done with 32KHz clock.
It does not break any existing board since its def
Dear Wolfgang Denk
>> writel(AT91C_PA23_TXD2, AT91C_PIOA_OER);
>>
>> is the most correct way.
>
> "most correct way" are big words. No, this is not "correct" at all.
>
> The whole set of address / offset definitions in
> include/asm-arm/arch-at91rm9200/AT91RM9200.h should be turned into a C
> st
Vivek Mahajan freescale.com> writes:
> * Supported in fsl_pci_init_port() after adding pcie_ep as a param
> * Mods in 85xx based board specific pci init after this change
>
> Signed-off-by: Vivek Mahajan freescale.com>
> board/freescale/mpc8572ds/mpc8572ds.c |6 +++---
> drivers/pci/fsl_p
Sometimes, inside NetLoop, eth_halt() is called before eth_init() has
been called. This is harmless except for free() calls to pointers
which have not been allocated yet.
This patch initializes those pointers to NULL and allocates them only
the first time. This way we can get rid of free calls in
Hi Prakash,
On Thursday 29 October 2009 07:24:25 prakash bedge wrote:
> Can you please send me the patch details to fixup the CFI query related bug
> for M29W128GH?
I did send you the patch in my last mail. You just need to add this code to a
board specific file, e.g. board/board_name/board_name.
Hi Kumar,
Kumar Gala schrieb:
> On Oct 27, 2009, at 10:29 AM, Luigi 'Comio' Mantellini wrote:
>
>> Hi All,
>>
>> I'm working on a stripped-down mpc8541 board (that has just
>> a serian and twe enets).
>> I have an issue on delay calibration. In fact at boot time, I see the
>> following linux prin
This patch fixes erroneous access to the ethernet PHY which broke the driver.
1. Selector field in the auto-negotiation register must be 0x1 for
using 802.3, not 0x0 which is reseved.
2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not
0x0 fixed address.
This has been tes
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