On Wed, Apr 12, 2017 at 11:33:12PM -0700, Kenneth Graunke wrote:
> I introduced this when cleaning up this code. libdrm_intel was fine.
> While passing NULL to free() is a common pattern...passing NULL to
> unmap seems pretty bad.
Yup, that was my first thought as well, arriving here with a NULL
Reviewed-by: Lionel Landwerlin
On 12/04/17 23:33, Kenneth Graunke wrote:
I introduced this when cleaning up this code. libdrm_intel was fine.
While passing NULL to free() is a common pattern...passing NULL to
unmap seems pretty bad. You really ought to know whether you have
a buffer or not.
Reviewed-by: Lionel Landwerlin
On 12/04/17 23:33, Kenneth Graunke wrote:
Starting positions >= 32 are not part of the header, rather than >.
Caught by Coverity, which found that "bits <<= field->start" may shift
by 32, which has undefined behavior.
CID: 1404968
---
src/intel/common/gen_deco
On Wed, Apr 12, 2017 at 11:33:13PM -0700, Kenneth Graunke wrote:
> If ret is 0, we return. If ret is not 0, we return. This is dead.
>
> CID: 1405013 (Structurally dead code (UNREACHABLE))
Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_bufmgr.c | 4 +---
> 1 file changed
Starting positions >= 32 are not part of the header, rather than >.
Caught by Coverity, which found that "bits <<= field->start" may shift
by 32, which has undefined behavior.
CID: 1404968
---
src/intel/common/gen_decoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/
I introduced this when cleaning up this code. libdrm_intel was fine.
While passing NULL to free() is a common pattern...passing NULL to
unmap seems pretty bad. You really ought to know whether you have
a buffer or not. So, we could add an assert. Not sure whether
that's better. This takes the
If ret is 0, we return. If ret is not 0, we return. This is dead.
CID: 1405013 (Structurally dead code (UNREACHABLE))
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
b/src/mesa/drivers/dri/
2017-04-13 13:45 GMT+08:00 Matthew Mondazzi :
> More relevant ISA constants put in place of chipset compares. This helps
> better display which features are available to card than previous chipset
> compares, making future development easier continue with.
>
> Signed-off-by: Matthew Mondazzi
> -
On Thu, Apr 13, 2017 at 1:45 AM, Matthew Mondazzi wrote:
> More relevant ISA constants put in place of chipset compares. This helps
> better display which features are available to card than previous chipset
> compares, making future development easier continue with.
>
> Signed-off-by: Matthew M
More relevant ISA constants put in place of chipset compares. This helps better
display which features are available to card than previous chipset compares,
making future development easier continue with.
Signed-off-by: Matthew Mondazzi
---
.../drivers/nouveau/codegen/nv50_ir_driver.h |
Thanks.
Reviewed-by: Timothy Arceri
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Looks good to me.
Reviewed-by: Timothy Arceri
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From: Dave Airlie
The addrlib import meant we'd return after we attempted
to setup the no stencil bits for an S8_UINT, now we break
and use the stencil level info when creating stencil DB
info.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_device.c | 8
src/
From: Dave Airlie
This is ported from radeonsi, and avoids the bug in the
addrlib code. This should probably be something addrlib
does for us, but for now this fixes the regression without
changing addrlib and aligns us with radeonsi.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_image.c
On 13/04/17 03:15 AM, Francisco Jerez wrote:
> Michel Dänzer writes:
>
>> From: Michel Dänzer
>>
>> clang::LangAS::Offset is gone, the behaviour is as if it was 0.
>> Signed-off-by: Michel Dänzer
>> ---
>> src/gallium/state_trackers/clover/llvm/codegen/common.cpp | 5 -
>> 1 file changed,
Reviewed-by: Edward O'Callaghan
On 04/13/2017 01:56 AM, Marek Olšák wrote:
> Reviewed-by: Marek Olšák
>
> Marek
>
> On Wed, Apr 12, 2017 at 12:44 PM, Nicolai Hähnle wrote:
>> From: Nicolai Hähnle
>>
>> ---
>> src/gallium/drivers/radeon/r600_buffer_common.c | 18 --
>> 1 file
On 04/12/2017 05:42 PM, Timothy Arceri wrote:
We also move _mesa_update_array_format() into the caller.
This gets these functions ready for KHR_no_error support.
---
src/mesa/main/varray.c | 68 +++---
1 file changed, 43 insertions(+), 25 deletions(
On 04/12/2017 05:42 PM, Timothy Arceri wrote:
This will help us split array validation from array update.
---
src/mesa/main/varray.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 65734
On 04/12/2017 05:42 PM, Timothy Arceri wrote:
This will be used for adding KHR_no_error support.
---
src/mesa/main/varray.c | 55 +-
1 file changed, 41 insertions(+), 14 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
i
On 04/12/2017 05:42 PM, Timothy Arceri wrote:
---
src/mesa/main/context.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h
index 9704a96..ccb5463 100644
--- a/src/mesa/main/context.h
+++ b/src/mesa/main/context.h
@@ -317,20 +317,27 @@
Acked-by: Edward O'Callaghan
On 04/13/2017 07:20 AM, Bas Nieuwenhuizen wrote:
> timestamp and pipeline_statistics only do something on begin & end,
> so they don't need any action.
>
> Occlusion queries only do something to enable/disable and that
> register is set nowhere else so that doesn't n
https://bugs.freedesktop.org/show_bug.cgi?id=97524
--- Comment #18 from Timothy Arceri ---
Fix tested and sent to list:
https://patchwork.freedesktop.org/patch/150080/
New piglit test:
https://patchwork.freedesktop.org/patch/150079/
--
You are receiving this mail because:
You are the assigne
From: Timothy Arceri
Currently we were only making sure types were the same within a
single stage. This looks to have regressed with 953a0af8e3f73.
https://bugs.freedesktop.org/show_bug.cgi?id=97524
---
src/mesa/drivers/dri/i965/brw_link.cpp | 1 +
src/mesa/main/uniform_query.cpp
On 2017.04.12 at 20:45 +0100, Emil Velikov wrote:
> On 12 April 2017 at 20:34, Constantine Kharlamov wrote:
>
> >> I suspect this breaks because r600 more often fails to
> >> compile some shaders,
> >> and the hw requires a fragment shader and we use the empty one as a
> >> fallback in that case.
On 2017.04.10 at 22:48 +0200, Marek Olšák wrote:
> Pushed the series, thanks!
>
> Marek
>
> On Mon, Apr 10, 2017 at 10:04 PM, Constantine Kharlamov
> wrote:
> > The idea is taken from radeonsi. The code mostly was already checking for
> > null
> > pixel shader, so little checks had to be added.
2017-04-13 2:25 GMT+08:00 Jason Ekstrand :
> On Wed, Apr 12, 2017 at 6:14 AM, Boyan Ding wrote:
>>
>> This fixes the following error when using ARB_shader_clock on i965:
>> vec1 32 ssa_0 = intrinsic shader_clock () () ()
>> intrinsic store_var (ssa_0) (clock_retval) (3) /* wrmask=x
Removed unnecessary and probably wrong PIPE_BIND_SCANOUT and PIPE_BIND_SHARED
flags in favor of check on single PIPE_BIND_DISPLAY_TARGET flag.
Reference llvmpipe change
---
src/gallium/drivers/swr/swr_screen.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/d
The context now contains SIMD vectors which must be aligned (specifically
samplePositions in the rastState in the derived state). Failure to align
can result in segv crash on unaligned memory access in vector
instructions.
---
src/gallium/drivers/swr/swr_context.cpp | 7 +--
1 file changed,
---
src/mesa/main/varray.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 3f61608..89a0984 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -1782,29 +1782,31 @@ _mesa_PrimitiveRestartI
This will help us split array validation from array update.
---
src/mesa/main/varray.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 65734df..353a614 100644
--- a/src/mesa/main/varray.c
++
---
src/mesa/vbo/vbo_exec_array.c | 158 +++---
1 file changed, 104 insertions(+), 54 deletions(-)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 6e3cd5a..d85c7ad 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vb
These checks do not generate any errors. Move them so we can add
KHR_no_error support and still make sure we do these checks.
---
src/mesa/main/api_validate.c | 43 +
src/mesa/vbo/vbo_exec_array.c | 106 ++
2 files changed, 108 insertions(+
---
src/mesa/vbo/vbo_exec_array.c | 41 +++--
1 file changed, 31 insertions(+), 10 deletions(-)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 9452c65..6e3cd5a 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_e
The only caller we don't update is update_arrays(), we leave that to the
following commit.
---
src/mesa/main/varray.c | 136 ++---
1 file changed, 73 insertions(+), 63 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index f84b6
---
src/mesa/main/varray.c | 352 +
1 file changed, 236 insertions(+), 116 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 8d8da83..3f61608 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -315,21 +
---
src/mesa/main/uniform_query.cpp | 76 -
1 file changed, 53 insertions(+), 23 deletions(-)
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index e613898..7aa035a 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/m
We also move _mesa_update_array_format() into the caller.
This gets these functions ready for KHR_no_error support.
---
src/mesa/main/varray.c | 68 +++---
1 file changed, 43 insertions(+), 25 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa
---
src/mesa/main/context.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h
index 9704a96..ccb5463 100644
--- a/src/mesa/main/context.h
+++ b/src/mesa/main/context.h
@@ -317,20 +317,27 @@ _mesa_is_gles31(const struct gl_context *ctx)
/*
This series adds some initial support for the KHR_no_error.
For now it can only be enabled with the MESA_NO_ERROR environment
variable. To start with I've added support to some of the api
calls that were taking a long time (or where caled often) in
the Civ6 benchmark.
I haven't been able to meas
This will be used for adding KHR_no_error support.
---
src/mesa/main/varray.c | 55 +-
1 file changed, 41 insertions(+), 14 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 233dc0d..65734df 100644
--- a/src/mesa/main/v
---
src/mesa/main/getstring.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/mesa/main/getstring.c b/src/mesa/main/getstring.c
index 6e90511..5da405d 100644
--- a/src/mesa/main/getstring.c
+++ b/src/mesa/main/getstring.c
@@ -297,17 +297,28 @@ invalid_pname:
*
* Returns __
---
src/mesa/main/extensions_table.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index d11cb0f..dc735c5 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -296,20 +296,21 @@ EXT(IBM_tex
---
docs/envvars.html | 3 +++
src/mesa/main/context.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index 6537365..0f321da 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -39,20 +39,23 @@ sometimes be useful for debugging end-user is
Any more thoughts on this?
I would really appreciate feedback from more contributors.
Best Regards.
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https://bugs.freedesktop.org/show_bug.cgi?id=100668
Bug ID: 100668
Summary: No pixel formats with WGL_SWAP_UNDEFINED_ARB &&
WGL_DOUBLE_BUFFER_ARB=true
Product: Mesa
Version: 17.0
Hardware: x86 (IA32)
OS: Win
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> The command is really operating on a Queue not a command buffer and the
> nearest object to that with an allocator is VkDevice.
>
> Cc: "17.0"
> ---
> src/intel/vulkan/anv_batch_chain.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
>
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> This just stubs things out. Real external semaphore support will come
> with VK_KHX_external_semaphore_fd.
> ---
> src/intel/vulkan/anv_device.c | 4
> src/intel/vulkan/anv_entrypoints_gen.py | 1 +
> src/intel/vulkan/anv_queue.c
On Mon 13 Mar 2017, Jason Ekstrand wrote:
> It's just a dummy for now, but we'll flesh it out as needed for external
> semaphores.
> ---
> src/intel/vulkan/anv_private.h | 28
> src/intel/vulkan/anv_queue.c | 32 ++--
> 2 files changed, 54
Signed-off-by: Elie Tournier
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 30f2c37695..fce377eed0 100644
--- a/src/mesa/drivers/dri/i965/intel_
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 +-
src/compiler/nir/nir_lower_double_ops.c | 593
src/intel/compiler/brw_nir.c| 3 +-
3 files changed, 597 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/ni
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 ++-
src/compiler/nir/nir_lower_double_ops.c | 24
src/intel/compiler/brw_nir.c| 3 ++-
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir.h b/src/
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 ++-
src/compiler/nir/nir_lower_double_ops.c | 45 +
src/intel/compiler/brw_nir.c| 3 ++-
3 files changed, 49 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 ++-
src/compiler/nir/nir_lower_double_ops.c | 43 +
src/intel/compiler/brw_nir.c| 3 ++-
3 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 ++-
src/compiler/nir/nir_lower_double_ops.c | 33 +
src/intel/compiler/brw_nir.c| 3 ++-
3 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 +-
src/compiler/nir/nir_lower_double_ops.c | 138
src/intel/compiler/brw_nir.c| 3 +-
3 files changed, 142 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/ni
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 +-
src/compiler/nir/nir_lower_double_ops.c | 68 +
src/intel/compiler/brw_nir.c| 3 +-
3 files changed, 72 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir.h
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 ++-
src/compiler/nir/nir_lower_double_ops.c | 20
src/intel/compiler/brw_nir.c| 3 ++-
3 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir.h b/src/comp
Signed-off-by: Elie Tournier
---
src/compiler/nir/nir.h | 3 +-
src/compiler/nir/nir_lower_double_ops.c | 749
src/intel/compiler/brw_nir.c| 3 +-
3 files changed, 753 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/ni
I've got this series on my laptop for too long so I send it even if it's still
in progress.
The goal of this work is to enable ARB_gpu_shader_fp64 on gen6.
Most of the algorithms come from "Berkeley SoftFloat" [1].
You can find a branch on my github [2].
So far we have:
Patches 1-5 seems to do th
On Mon 10 Apr 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match t
On 31/03/17 16:17, Jason Ekstrand wrote:
Cc: "13.0 17.0"
---
src/intel/vulkan/genX_cmd_buffer.c | 12
1 file changed, 12 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 1ce549a..b5297f4 100644
--- a/src/intel/vulkan/genX_
This is only relevant with 0 attachments. In that case we do nothing
on subpass switch already, and the pipeline is the authoritative
source of the number of samples, so this shouldn't change anything.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_device.c | 2 +-
1 file changed, 1 in
Most trace points happen after an operation, so add a trace point
at the start of the command buffer.
Furthermore, add one after a CmdUpdateBuffer using CP_DMA as that
didn't emit one yet.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 1 +
src/amd/vulkan/radv_meta_buf
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_meta_buffer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/amd/vulkan/radv_meta_buffer.c
b/src/amd/vulkan/radv_meta_buffer.c
index 1e94f3b5866..cfa0b9320e2 100644
--- a/src/amd/vulkan/radv_meta_buffer.c
+++ b/src/amd/vulkan/r
On Tue, Apr 11, 2017 at 07:54:23AM -0700, Jason Ekstrand wrote:
> The Vulkan driver was originally written under the assumption that
> VK_ATTACHMENT_UNUSED was basically just for depth-stencil attachments.
> However, the way things fell together, VK_ATTACHMENT_UNUSED can be used
> anywhere in the s
On Wed, Apr 12, 2017 at 10:45:58AM -0700, Jason Ekstrand wrote:
> On Fri, Apr 7, 2017 at 9:52 AM, Rafael Antognolli
>
> wrote:
>
> We need to emit BLEND_STATE, which size is 1 + 2 * nr_draw_buffers
> dwords (on gen8+), but the BLEND_STATE struct length is always 17. By
> marking it s
On 12/04/17 12:57, Jason Ekstrand wrote:
On Wed, Apr 12, 2017 at 12:25 PM, Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
On 31/03/17 16:17, Jason Ekstrand wrote:
Cc: "13.0 17.0" mailto:mesa-sta...@lists.freedesktop.org>>
---
src/intel/vulkan/anv
timestamp and pipeline_statistics only do something on begin & end,
so they don't need any action.
Occlusion queries only do something to enable/disable and that
register is set nowhere else so that doesn't need extra support either.
(We technically should fix it to update the reg with the number
On Wed, Apr 12, 2017 at 11:12:31AM -0700, Jason Ekstrand wrote:
> This patch is based on the work that's already been on the list for some
> time to implement VK_KHX_external_semaphore. The difference here is that
> this patch makes us able to use the new DRM syncobj API cooked up by Dave
> Airlie
On 12.04.2017 23:03, Markus Trippelsdorf wrote:
> On 2017.04.12 at 20:45 +0100, Emil Velikov wrote:
>> On 12 April 2017 at 20:34, Constantine Kharlamov wrote:
>>
I suspect this breaks because r600 more often fails to
compile some shaders,
and the hw requires a fragment shader and we
On 13 April 2017 at 06:03, Markus Trippelsdorf wrote:
> On 2017.04.12 at 20:45 +0100, Emil Velikov wrote:
>> On 12 April 2017 at 20:34, Constantine Kharlamov wrote:
>>
>> >> I suspect this breaks because r600 more often fails to
>> >> compile some shaders,
>> >> and the hw requires a fragment sha
On Wed, Apr 12, 2017 at 12:25 PM, Lionel Landwerlin <
lionel.g.landwer...@intel.com> wrote:
> On 31/03/17 16:17, Jason Ekstrand wrote:
>
>> Cc: "13.0 17.0"
>> ---
>> src/intel/vulkan/anv_blorp.c | 5 +
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/src/intel/vulkan/anv_blorp.c b/src
On 12 April 2017 at 20:34, Constantine Kharlamov wrote:
>> I suspect this breaks because r600 more often fails to
>> compile some shaders,
>> and the hw requires a fragment shader and we use the empty one as a
>> fallback in that case.
>
> Ok, that wasn't obvious, I running the system with the pa
On 12.04.2017 22:21, Dave Airlie wrote:
> On 13 April 2017 at 03:39, Constantine Kharlamov wrote:
>> On 12.04.2017 18:53, Marek Olšák wrote:
>>> On Wed, Apr 12, 2017 at 4:44 PM, Markus Trippelsdorf
>>> wrote:
On 2017.04.10 at 22:48 +0200, Marek Olšák wrote:
> Pushed the series, thanks!
On 31/03/17 16:17, Jason Ekstrand wrote:
Cc: "13.0 17.0"
---
src/intel/vulkan/anv_blorp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 72a468a..f26f5e5 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulka
On 13 April 2017 at 03:39, Constantine Kharlamov wrote:
> On 12.04.2017 18:53, Marek Olšák wrote:
>> On Wed, Apr 12, 2017 at 4:44 PM, Markus Trippelsdorf
>> wrote:
>>> On 2017.04.10 at 22:48 +0200, Marek Olšák wrote:
Pushed the series, thanks!
Marek
On Mon, Apr 10, 2017 a
Thanks. Pushed.
On Wed, Apr 12, 2017 at 10:20 AM, Alex Smith
wrote:
> According to the Vulkan spec, VkPipelineInputAssemblyStateCreateInfo's
> primitiveRestartEnable flag should only apply to indexed draws, however
> it was being enabled regardless of the type of draw. This could cause
> problems
Michel Dänzer writes:
> From: Michel Dänzer
>
> clang::LangAS::Offset is gone, the behaviour is as if it was 0.
> Signed-off-by: Michel Dänzer
> ---
> src/gallium/state_trackers/clover/llvm/codegen/common.cpp | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/gall
On Wed, Apr 12, 2017 at 6:14 AM, Boyan Ding wrote:
> This fixes the following error when using ARB_shader_clock on i965:
> vec1 32 ssa_0 = intrinsic shader_clock () () ()
> intrinsic store_var (ssa_0) (clock_retval) (3) /* wrmask=xy */
> error: src->ssa->num_components == num_comp
This patch is based on the work that's already been on the list for some
time to implement VK_KHX_external_semaphore. The difference here is that
this patch makes us able to use the new DRM syncobj API cooked up by Dave
Airlie. This patch seems to work ok assuming a Kernel API I cooked up that
ha
Quoting Jose Fonseca (2017-04-12 10:38:11)
> Dylan, Nirbheek,
>
> Thanks for the info.
>
> I made a bit more progress.
>
> One newbie question: what's your workflow to update a wrap patch? Can we
> prototype changes locally without tarballing the patch?
Yes, you can just update the meson.build
Hi Jose,
On Wed, Apr 12, 2017 at 11:08 PM, Jose Fonseca wrote:
> One newbie question: what's your workflow to update a wrap patch? Can we
> prototype changes locally without tarballing the patch?
>
Any changes you make in subproject directories will be kept as-is;
Meson only initializes them an
This patch is based on the work that's already been on the list for some
time to implement VK_KHX_external_semaphore. The difference here is that
this patch makes us able to use the new DRM syncobj API cooked up by Dave
Airlie. This patch seems to work ok assuming a Kernel API I cooked up that
ha
On Fri, Apr 7, 2017 at 9:52 AM, Rafael Antognolli <
rafael.antogno...@intel.com> wrote:
> We need to emit BLEND_STATE, which size is 1 + 2 * nr_draw_buffers
> dwords (on gen8+), but the BLEND_STATE struct length is always 17. By
> marking it size 1, which is actually the size of the struct minus t
On 12.04.2017 18:53, Marek Olšák wrote:
> On Wed, Apr 12, 2017 at 4:44 PM, Markus Trippelsdorf
> wrote:
>> On 2017.04.10 at 22:48 +0200, Marek Olšák wrote:
>>> Pushed the series, thanks!
>>>
>>> Marek
>>>
>>> On Mon, Apr 10, 2017 at 10:04 PM, Constantine Kharlamov
>>> wrote:
The idea is take
Dylan, Nirbheek,
Thanks for the info.
I made a bit more progress.
One newbie question: what's your workflow to update a wrap patch? Can we
prototype changes locally without tarballing the patch?
One request: would it be possible to update the compiler args for both c and
c++ with a single st
On Sun, Apr 09, 2017 at 08:18:07PM +0100, Lionel Landwerlin wrote:
> On 09/04/17 17:23, Jason Ekstrand wrote:
> >
> >
> > On April 9, 2017 8:48:31 AM Lionel Landwerlin
> > wrote:
> >
> > > I have one suggestion at the bottom of the patch, otherwise :
> > >
> > > Reviewed-by: Lionel Landwerlin
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 11, 2017 at 3:05 AM, Timothy Arceri wrote:
> Might helper reduce cpu for some apps that use sso.
> ---
> src/mesa/state_tracker/st_atom.h | 6 +-
> src/mesa/state_tracker/st_atom_list.h| 8 ++-
> src/mesa/state_tracker/st_atom_sampler.c
For the series:
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 11, 2017 at 10:05 PM, Brian Paul wrote:
> A few functions related to FBOs/renderbuffers should only be used with
> window-system buffers, not user-created FBOs. Assert for that.
> Add additional comments. No piglit regressions.
> ---
On Tue, Apr 11, 2017 at 7:06 PM, Samuel Pitoiset
wrote:
>
>
> On 04/11/2017 06:58 PM, Ilia Mirkin wrote:
>>
>> On Tue, Apr 11, 2017 at 12:48 PM, Samuel Pitoiset
>> wrote:
>>>
>>> This is required for the following GLSL bits.
>>>
>>> Signed-off-by: Samuel Pitoiset
>>> ---
>>> src/mesa/main/exte
Reviewed-by: Marek Olšák
Marek
On Wed, Apr 12, 2017 at 12:44 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> src/gallium/drivers/radeon/r600_buffer_common.c | 18 --
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_
Reviewed-by: Marek Olšák
Marek
On Wed, Apr 12, 2017 at 5:52 PM, Rob Clark wrote:
> These can operate on MEMORY[], in addition to BUFFER[] and IMAGE[]
>
> Signed-off-by: Rob Clark
> ---
> src/gallium/docs/source/tgsi.rst | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --
On Wed, Apr 12, 2017 at 4:44 PM, Markus Trippelsdorf
wrote:
> On 2017.04.10 at 22:48 +0200, Marek Olšák wrote:
>> Pushed the series, thanks!
>>
>> Marek
>>
>> On Mon, Apr 10, 2017 at 10:04 PM, Constantine Kharlamov
>> wrote:
>> > The idea is taken from radeonsi. The code mostly was already checki
These can operate on MEMORY[], in addition to BUFFER[] and IMAGE[]
Signed-off-by: Rob Clark
---
src/gallium/docs/source/tgsi.rst | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index 05b06ce..2da2bb6 10
On Wed, Apr 12, 2017 at 2:47 AM, Juan A. Suarez Romero
wrote:
> Reviewed-by: Juan A. Suarez Romero
>
Is this patch sufficient to fix the bug you were seeing yesterday?
> On Tue, 2017-04-11 at 11:11 -0700, Jason Ekstrand wrote:
> > v2 (Jason Ekstrand):
> > - Limit to 2GB instead of 4GB
> >
>
On Wed, Apr 12, 2017 at 4:00 AM, Emil Velikov
wrote:
> Hi guys,
>
> On 29 March 2017 at 21:49, Jason Ekstrand wrote:
> > Reviewed-by: Jason Ekstrand
> >
> > On Wed, Mar 29, 2017 at 12:11 PM, wrote:
> >>
> >> From: Craig Stout
> >>
> >> anv_state_pool_alloc requires a matching free, whereas
>
On Wed, Apr 12, 2017 at 4:04 AM, Emil Velikov
wrote:
> On 1 April 2017 at 00:17, Jason Ekstrand wrote:
> > Cc: "13.0 17.0"
> > ---
> > src/intel/vulkan/genX_cmd_buffer.c | 12
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/inte
For the series:
Reviewed-by: Marek Olšák
Marek
On Wed, Apr 12, 2017 at 11:20 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> gl_BaseVertex is supposed to be 0 in non-indexed draws. Unfortunately, the
> way they're implemented, the VGT always generates indices starting at 0,
> and the VS
On Apr 12, 2017, at 10:03 AM, Rowley, Timothy O
mailto:timothy.o.row...@intel.com>> wrote:
On Apr 12, 2017, at 9:11 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
From: Emil Velikov
mailto:emil.veli...@collabora.com>>
Earlier commit bumped the requirement for the SWR driver.
Cc:
On Wed, 2017-04-12 at 17:18 +0900, Michel Dänzer wrote:
> From: Michel Dänzer
>
> clang::LangAS::Offset is gone, the behaviour is as if it was 0.
> Signed-off-by: Michel Dänzer
works fine on Turks
Reviewed-and-Tested-by: Jan Vesely
Jan
> ---
> src/gallium/state_trackers/clover/llvm/codegen
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