Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.59 -> 1.60
---
Log message:
Silence a warning.
---
Diffs of the changes: (+2 -1)
ARMISelLowering.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.39 -> 1.40
ARMInstrInfo.h updated: 1.16 -> 1.17
ARMInstrInfo.td updated: 1.114 -> 1.115
ARMInstrThumb.td updated: 1.32 -> 1.33
---
Log message:
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.113 -> 1.114
---
Log message:
Fix the build.
---
Diffs of the changes: (+1 -1)
ARMInstrInfo.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.58 -> 1.59
ARMISelLowering.h updated: 1.17 -> 1.18
---
Log message:
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the curr
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.57 -> 1.58
---
Log message:
Be more conservative of duplicating blocks.
---
Diffs of the changes: (+1 -1)
ARMISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMIS
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.56 -> 1.57
ARMISelLowering.h updated: 1.16 -> 1.17
ARMInstrInfo.td updated: 1.112 -> 1.113
---
Log message:
Allow predicated immediate ARM to ARM calls.
---
Diffs of the changes: (+14 -1)
ARMISelLowering.cpp |7 +++
On Jun 18, 2007, at 6:25 PM, Evan Cheng wrote:
> Log message:
>
> Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE
> bit.
>
Thanks Evan!
-Chris
___
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.38 -> 1.39
ARMInstrInfo.h updated: 1.15 -> 1.16
ARMInstrInfo.td updated: 1.111 -> 1.112
ARMInstrThumb.td updated: 1.31 -> 1.32
---
Log message:
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.37 -> 1.38
ARMInstrInfo.h updated: 1.14 -> 1.15
ARMInstrInfo.td updated: 1.110 -> 1.111
ARMInstrThumb.td updated: 1.30 -> 1.31
---
Log message:
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
---
Diff
Geeze. I was sure I would've been yelled at had I made it into a
targetinstrinfo bit. :-)
Really didn't want to go with either approach. But I don't see a
better alternative.
Evan
On Jun 15, 2007, at 2:37 PM, Chris Lattner wrote:
> On Jun 15, 2007, at 2:15 PM, Evan Cheng wrote:
>> Instructi
On Jun 15, 2007, at 2:15 PM, Evan Cheng wrote:
> Instructions with unique labels or embedded jumptables cannot be
> duplicated during ifcvt.
Please turn this into a targetinstrinfo bit. Virtual methods should
only be used for properties whose behavior is a property of the
*operands* of the
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.36 -> 1.37
ARMInstrInfo.h updated: 1.13 -> 1.14
---
Log message:
Instructions with unique labels or embedded jumptables cannot be duplicated
during ifcvt.
---
Diffs of the changes: (+31 -0)
ARMInstrInfo.cpp | 29 ++
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.35 -> 1.36
---
Log message:
Handle blocks with 2 unconditional branches in AnalyzeBranch.
---
Diffs of the changes: (+10 -0)
ARMInstrInfo.cpp | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/lib/Target/
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.34 -> 1.35
---
Log message:
Add a utility routine to check for unpredicated terminator instruction.
---
Diffs of the changes: (+3 -3)
ARMInstrInfo.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Inde
Changes in directory llvm/lib/Target/ARM:
ARMTargetAsmInfo.cpp updated: 1.21 -> 1.22
---
Log message:
Define AsmTransCBE for ARM.
---
Diffs of the changes: (+25 -0)
ARMTargetAsmInfo.cpp | 25 +
1 files changed, 25 insertions(+)
Index: llvm/lib/Target/ARM/ARMTar
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.33 -> 1.34
---
Log message:
Fix ARM condition code subsumission check.
---
Diffs of the changes: (+3 -3)
ARMInstrInfo.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/ARM/ARMIns
Changes in directory llvm/lib/Target/ARM:
ARMInstrThumb.td updated: 1.29 -> 1.30
---
Log message:
tBcc is not a barrier.
---
Diffs of the changes: (+1 -1)
ARMInstrThumb.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/li
On Jun 6, 2007, at 6:38 PM, Evan Cheng wrote:
>
> Stupid cut-n-paste bug caused me s much grief. Why wasn't there
> a compilation warning? I blame it on the FE folks.
Geeze, if backend people wouldn't write code like this, the f.e.
people would have a much easier time ;-)
-Chris
> ---
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.32 -> 1.33
---
Log message:
Stupid cut-n-paste bug caused me s much grief. Why wasn't there a
compilation warning? I blame it on the FE folks.
---
Diffs of the changes: (+1 -1)
ARMInstrInfo.cpp |2 +-
1 files cha
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.109 -> 1.110
ARMInstrThumb.td updated: 1.28 -> 1.29
ARMInstrVFP.td updated: 1.7 -> 1.8
---
Log message:
Mark these instructions clobbersPred. They modify the condition code register.
---
Diffs of the changes: (+19 -9)
ARM
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.76 -> 1.77
---
Log message:
Print predicate of the second instruction of the two-piece constant MI.
---
Diffs of the changes: (+3 -1)
ARMAsmPrinter.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.75 -> 1.76
---
Log message:
PIC label asm printing cosmetic changes.
---
Diffs of the changes: (+9 -0)
ARMAsmPrinter.cpp |9 +
1 files changed, 9 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
d
Changes in directory llvm/lib/Target/ARM:
README-Thumb.txt updated: 1.10 -> 1.11
---
Log message:
update this entry, now that Anton implemented shift/and lowering for
switches. There is one really easy isel thing here with tst we are not
getting.
---
Diffs of the changes: (+66 -17)
README
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.108 -> 1.109
---
Log message:
Opcode modifier s comes after condition code. e.g. addlts, not addslt.
---
Diffs of the changes: (+20 -20)
ARMInstrInfo.td | 40
1 files changed, 20
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.55 -> 1.56
---
Log message:
Set ARM ifcvt duplication limit to 3 for now.
---
Diffs of the changes: (+1 -0)
ARMISelLowering.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.107 -> 1.108
---
Log message:
Make jumptable non-predicable for now.
---
Diffs of the changes: (+10 -11)
ARMInstrInfo.td | 21 ++---
1 files changed, 10 insertions(+), 11 deletions(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.74 -> 1.75
---
Log message:
Fix the asmprinter so that a globalvalue can specify an explicit alignment
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fi
Changes in directory llvm/lib/Target/ARM:
ARMInstrVFP.td updated: 1.6 -> 1.7
---
Log message:
For VFP2 fldm, fstm instructions, the condition code is printed after the
address mode and size specifier. e.g. fstmiaseq, not fstmeqias.
---
Diffs of the changes: (+4 -4)
ARMInstrVFP.td |8 ++
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.106 -> 1.107
---
Log message:
For ldrb, strh, etc., the condition code is before the width specifier. e.g.
streqh, not strheq.
---
Diffs of the changes: (+23 -23)
ARMInstrInfo.td | 46 +++
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.31 -> 1.32
ARMInstrInfo.h updated: 1.12 -> 1.13
ARMLoadStoreOptimizer.cpp updated: 1.12 -> 1.13
ARMRegisterInfo.cpp updated: 1.96 -> 1.97
---
Log message:
Add missing const qualifiers.
---
Diffs of the changes: (+24 -19)
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.30 -> 1.31
ARMInstrInfo.h updated: 1.11 -> 1.12
---
Log message:
Hooks for predication support.
---
Diffs of the changes: (+39 -9)
ARMInstrInfo.cpp | 41 +
ARMInstrInfo.h |7
No. IsTerminatorInstr() simply checks opcode flag, it's not target
dependent.
Evan
On May 21, 2007, at 12:01 PM, Dale Johannesen wrote:
>
> On May 21, 2007, at 11:56 AM, Evan Cheng wrote:
>
>> - isTerminatorInstr((--I)->getOpcode()))
>> + !isPredicated(--I) && isTerminatorInstr(I->ge
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.29 -> 1.30
---
Log message:
Fix some -march=thumb regressions. tBR_JTr is not predicable.
---
Diffs of the changes: (+3 -1)
ARMInstrInfo.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/lib/T
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.105 -> 1.106
---
Log message:
Use AXI3 not AXI2 for appropriate PIC PC-relative loads and stores. Cosmetic.
---
Diffs of the changes: (+7 -5)
ARMInstrInfo.td | 12 +++-
1 files changed, 7 insertions(+), 5 delet
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.104 -> 1.105
---
Log message:
Add some patterns for PIC PC-relative loads and stores.
---
Diffs of the changes: (+41 -2)
ARMInstrInfo.td | 43 +--
1 files changed, 41 insertions(+
On May 21, 2007, at 11:56 AM, Evan Cheng wrote:
> - isTerminatorInstr((--I)->getOpcode()))
> + !isPredicated(--I) && isTerminatorInstr(I->getOpcode()))
Wouldn't it be better to have isTerminatorInst return false on
predicated things?
___
l
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.28 -> 1.29
---
Log message:
BlockHasNoFallThrough() now returns true if block ends with a return
instruction; AnalyzeBranch() should ignore predicated instructionsd.
---
Diffs of the changes: (+13 -2)
ARMInstrInfo.cpp |
> Mark calls non-predicable for now. Need to ensure it's the last
> instruction in the if-converted block or make sure it preserve
> condition code.
Plz add this to the readme file, so it doesn't get forgotten,
-Chris
___
llvm-commits mailing list
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.103 -> 1.104
---
Log message:
Mark calls non-predicable for now. Need to ensure it's the last instruction in
the if-converted block or make sure it preserve condition code.
---
Diffs of the changes: (+8 -8)
ARMInstrInfo.t
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.54 -> 1.55
---
Log message:
Silence some compilation warnings.
---
Diffs of the changes: (+2 -2)
ARMISelLowering.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMISelLow
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.53 -> 1.54
---
Log message:
Set ARM if-conversion block size threshold to 10 instructions for now.
---
Diffs of the changes: (+2 -2)
ARMISelLowering.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
I
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.h updated: 1.10 -> 1.11
ARMInstrInfo.cpp updated: 1.27 -> 1.28
---
Log message:
RemoveBranch() and InsertBranch() now returns number of instructions deleted /
inserted.
---
Diffs of the changes: (+13 -11)
ARMInstrInfo.cpp | 16 ++
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.h updated: 1.15 -> 1.16
ARMISelLowering.cpp updated: 1.52 -> 1.53
---
Log message:
More effective breakdown of memcpy into repeated load/store. These are now
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has
Changes in directory llvm/lib/Target/ARM:
ARMInstrThumb.td updated: 1.27 -> 1.28
---
Log message:
ARM::tB is also predicable.
---
Diffs of the changes: (+5 -2)
ARMInstrThumb.td |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
dif
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.h updated: 1.9 -> 1.10
ARMInstrInfo.cpp updated: 1.26 -> 1.27
---
Log message:
PredicateInstruction returns true if the operation was successful.
---
Diffs of the changes: (+8 -4)
ARMInstrInfo.cpp | 10 +++---
ARMInstrInfo.h |
On May 16, 2007, at 1:50 PM, Chris Lattner wrote:
>>> Does that mean it can be predicated and the predicate is not set to
>>> always? What client do you expect for this?
>>
>> Right. The only potential client is the if-converter. If anything is
>> already predicated on a non-always predicate bef
Changes in directory llvm/lib/Target/ARM:
ARMTargetMachine.h updated: 1.10 -> 1.11
---
Log message:
Move if-conversion after all passes that may use register scavenger.
---
Diffs of the changes: (+0 -1)
ARMTargetMachine.h |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/ARM
Changes in directory llvm/lib/Target/ARM:
ARMTargetMachine.cpp updated: 1.27 -> 1.28
---
Log message:
Move if-conversion after all passes that may use register scavenger.
---
Diffs of the changes: (+3 -8)
ARMTargetMachine.cpp | 11 +++
1 files changed, 3 insertions(+), 8 deletions
>> Does that mean it can be predicated and the predicate is not set to
>> always? What client do you expect for this?
>
> Right. The only potential client is the if-converter. If anything is
> already predicated on a non-always predicate before if-conversion, it
> needs to know.
Random thought, p
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.h updated: 1.8 -> 1.9
ARMInstrInfo.cpp updated: 1.25 -> 1.26
---
Log message:
Removed isPredicable().
---
Diffs of the changes: (+0 -10)
ARMInstrInfo.cpp |9 -
ARMInstrInfo.h |1 -
2 files changed, 10 deletions(-)
In
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.102 -> 1.103
---
Log message:
Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand
so they are not predicable.
---
Diffs of the changes: (+6 -5)
ARMInstrInfo.td | 11 ++-
1 files change
On May 16, 2007, at 11:42 AM, Chris Lattner wrote:
>>> Yes, I think this should be the distinction between M_PREDICATED
>>> (the
>>> instr already has a predicate field, but may be set to 'always') vs
>>> M_PREDICABLE (the instr may or may not have a predicate field, but
>>> PredicateInstructio
>> Yes, I think this should be the distinction between M_PREDICATED (the
>> instr already has a predicate field, but may be set to 'always') vs
>> M_PREDICABLE (the instr may or may not have a predicate field, but
>> PredicateInstruction can change it into one that does).
>
> I dunno if that's the
On May 16, 2007, at 11:21 AM, Evan Cheng wrote:
>> I realized this morning what I really meant :). I think that
>> isPredicable should be a non-virtual function that checks TID-
>>> Flags&M_PREDICATED (Actually, it might make sense to introduce a
>> new M_PREDICABLE flag). Further, the default
On May 16, 2007, at 10:09 AM, Chris Lattner wrote:
> On May 16, 2007, at 1:18 AM, Evan Cheng wrote:
>>> But even then I am not sure if that eliminate the need to have a
>>> virtual function isPredicatable. Conditional branches probably would
>>> require special handling. Also, while it isn't poss
On May 16, 2007, at 10:06 AM, Chris Lattner wrote:
> On May 16, 2007, at 1:02 AM, Evan Cheng wrote:
>>> I don't think there is any reason for this to be virtual and target-
>>> specific. In particular, can you please model B/tB the same way PPC
>>> handles branches (where an uncond branch is jus
On May 16, 2007, at 1:18 AM, Evan Cheng wrote:
>> But even then I am not sure if that eliminate the need to have a
>> virtual function isPredicatable. Conditional branches probably would
>> require special handling. Also, while it isn't possible now, it's
>> conceivable some instruction predicate f
On May 16, 2007, at 1:02 AM, Evan Cheng wrote:
>> I don't think there is any reason for this to be virtual and target-
>> specific. In particular, can you please model B/tB the same way PPC
>> handles branches (where an uncond branch is just a conditional branch
>> where the condition is set to 'a
On May 16, 2007, at 1:02 AM, Evan Cheng wrote:
>
> On May 15, 2007, at 11:50 PM, Chris Lattner wrote:
>>
>> I don't think there is any reason for this to be virtual and target-
>> specific. In particular, can you please model B/tB the same way PPC
>> handles branches (where an uncond branch is j
On May 15, 2007, at 11:50 PM, Chris Lattner wrote:
>> Hooks for predication support.
>
> yay!
>
>> +bool ARMInstrInfo::isPredicatable(MachineInstr *MI) const {
>> + const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
>> + if (TID->Flags & M_PREDICATED)
>> +return true;
>> +
>> + u
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.101 -> 1.102
---
Log message:
Conditional branch is not a barrier.
---
Diffs of the changes: (+6 -4)
ARMInstrInfo.td | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstr
> Hooks for predication support.
yay!
> +bool ARMInstrInfo::isPredicatable(MachineInstr *MI) const {
> + const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
> + if (TID->Flags & M_PREDICATED)
> +return true;
> +
> + unsigned Opc = MI->getOpcode();
> + return Opc == ARM::B || Opc
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.43 -> 1.44
---
Log message:
Fix comment.
---
Diffs of the changes: (+1 -1)
ARMConstantIslandPass.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cp
Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.24 -> 1.25
ARMInstrInfo.h updated: 1.7 -> 1.8
ARMTargetMachine.cpp updated: 1.26 -> 1.27
ARMTargetMachine.h updated: 1.9 -> 1.10
---
Log message:
Hooks for predication support.
---
Diffs of the changes: (+39 -0)
ARMInstrI
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.51 -> 1.52
---
Log message:
Fix previous patch. GOTOFF can be used only when the symbol has internal
linkage or hidden visibility.
---
Diffs of the changes: (+1 -1)
ARMISelLowering.cpp |2 +-
1 files changed, 1 i
> Optimize PIC implementation. GOTOFF can be used when the symbol is
> defined
> and used in the same module.
Does this work for weak symbols?
-Chris
>
> ---
> Diffs of the changes: (+1 -1)
>
> ARMISelLowering.cpp |2 +-
> 1 files changed, 1 insertion(+), 1 deletion(-)
>
>
> Index: llvm/
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.50 -> 1.51
---
Log message:
Optimize PIC implementation. GOTOFF can be used when the symbol is defined
and used in the same module.
---
Diffs of the changes: (+1 -1)
ARMISelLowering.cpp |2 +-
1 files changed, 1 i
Changes in directory llvm/lib/Target/ARM:
ARMTargetAsmInfo.cpp updated: 1.20 -> 1.21
---
Log message:
Enable aliases on arm-linux.
---
Diffs of the changes: (+1 -0)
ARMTargetAsmInfo.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.72 -> 1.73
ARMInstrInfo.td updated: 1.99 -> 1.100
ARMInstrThumb.td updated: 1.25 -> 1.26
ARMInstrVFP.td updated: 1.4 -> 1.5
---
Log message:
Switch BCC, MOVCCr, etc. to PredicateOperand.
---
Diffs of the changes: (+22 -17)
Thanks!
Evan
On May 7, 2007, at 4:15 PM, Lauro Ramos Venancio wrote:
>
>
> Changes in directory llvm/lib/Target/ARM:
>
> ARMRegisterInfo.cpp updated: 1.94 -> 1.95
> ---
> Log message:
>
> Fix PR1390: http://llvm.org/PR1390 in a better way.
>
>
>
> ---
> Diffs of the changes: (+41 -12)
>
> ARMR
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.94 -> 1.95
---
Log message:
Fix PR1390: http://llvm.org/PR1390 in a better way.
---
Diffs of the changes: (+41 -12)
ARMRegisterInfo.cpp | 53
1 files changed, 4
Changes in directory llvm/lib/Target/ARM:
ARMInstrVFP.td updated: 1.3 -> 1.4
---
Log message:
This is no longer needed after enabling the DAG combiner xform.
---
Diffs of the changes: (+0 -5)
ARMInstrVFP.td |5 -
1 files changed, 5 deletions(-)
Index: llvm/lib/Target/ARM/ARMInstrV
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.93 -> 1.94
---
Log message:
Fix PR1390: http://llvm.org/PR1390 .
Don't spill extra register to align the stack.
---
Diffs of the changes: (+10 -38)
ARMRegisterInfo.cpp | 48 ++
Changes in directory llvm/lib/Target/ARM:
ARM.td updated: 1.4 -> 1.5
---
Log message:
Add a processor.
---
Diffs of the changes: (+1 -0)
ARM.td |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/ARM/ARM.td
diff -u llvm/lib/Target/ARM/ARM.td:1.4 llvm/lib/Target/ARM/ARM.td:1
On May 4, 2007, at 3:08 PM, Lauro Ramos Venancio wrote:
> Nowadays we have two functions for the GV lowering: one for ELF and
> one for Darwin. So, the ELF and Darwin GV lowering implementations
> are completely different and ELF doesn't use the auxiliary function
> GVIsIndirectSymbol.
Gre
Nowadays we have two functions for the GV lowering: one for ELF and one for
Darwin. So, the ELF and Darwin GV lowering implementations are completely
different and ELF doesn't use the auxiliary function GVIsIndirectSymbol.
Lauro
2007/5/3, Evan Cheng <[EMAIL PROTECTED]>:
No idea. Lauro?
Evan
O
No idea. Lauro?
Evan
On May 3, 2007, at 5:33 PM, Chris Lattner wrote:
>
> On May 3, 2007, at 5:27 PM, Evan Cheng wrote:
>
>>
>>
>> Changes in directory llvm/lib/Target/ARM:
>>
>> ARMISelLowering.cpp updated: 1.49 -> 1.50
>> ---
>> Log message:
>>
>> On Mac OS X, GV requires an extra load only whe
On May 3, 2007, at 5:27 PM, Evan Cheng wrote:
>
>
> Changes in directory llvm/lib/Target/ARM:
>
> ARMISelLowering.cpp updated: 1.49 -> 1.50
> ---
> Log message:
>
> On Mac OS X, GV requires an extra load only when relocation-model
> is non-static.
Does ELF do something similar? If not, this s
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.49 -> 1.50
---
Log message:
On Mac OS X, GV requires an extra load only when relocation-model is non-static.
---
Diffs of the changes: (+6 -5)
ARMISelLowering.cpp | 11 ++-
1 files changed, 6 insertions(+), 5
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.71 -> 1.72
---
Log message:
Should never see an indexed load / store with zero offset.
---
Diffs of the changes: (+7 -5)
ARMAsmPrinter.cpp | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
Index: ll
> Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
>
> +// avoid copying result of FTOUIZ to int reg when we're just
> storing it
> +let AddedComplexity = 1 in
> +def : ARMPat<(store (i32 (bitconvert SPR:$src)), addrmode5:$addr),
> + (FSTS SPR:$src, addrmode5:$addr)>;
>
Changes in directory llvm/lib/Target/ARM:
ARMInstrVFP.td updated: 1.2 -> 1.3
---
Log message:
Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
---
Diffs of the changes: (+5 -0)
ARMInstrVFP.td |5 +
1 files changed, 5 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstr
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.70 -> 1.71
ARMISelLowering.cpp updated: 1.48 -> 1.49
ARMRegisterInfo.cpp updated: 1.92 -> 1.93
ARMTargetAsmInfo.cpp updated: 1.19 -> 1.20
---
Log message:
Debug support for arm-linux.
Patch by Raul Herbster.
---
Diffs of t
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.69 -> 1.70
---
Log message:
add support for printing offset from global
---
Diffs of the changes: (+6 -0)
ARMAsmPrinter.cpp |6 ++
1 files changed, 6 insertions(+)
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.cpp updated: 1.47 -> 1.48
---
Log message:
Typo. It's checking if V is multiple of 4, not multiple of 3. :-)
---
Diffs of the changes: (+1 -1)
ARMISelLowering.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llv
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.41 -> 1.42
ARMLoadStoreOptimizer.cpp updated: 1.10 -> 1.11
---
Log message:
Drop 'const'
---
Diffs of the changes: (+4 -4)
ARMConstantIslandPass.cpp |4 ++--
ARMLoadStoreOptimizer.cpp |4 ++--
2 files ch
Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.110 -> 1.111
ARMInstrVFP.td updated: 1.1 -> 1.2
---
Log message:
match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
---
Diffs of the changes: (+9 -2)
ARMISelDAGToDAG.cpp |1 +
ARMInstrVFP.td
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.40 -> 1.41
ARMLoadStoreOptimizer.cpp updated: 1.9 -> 1.10
---
Log message:
Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which
> +static const int ID;
> +ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
Why the cast to intptr_t? Why not just make the ctors take void* ?
-Chris
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Woot! Fun stuff. :-)
Thanks Dale.
Evan
On May 1, 2007, at 6:03 PM, Dale Johannesen wrote:
>
>
> Changes in directory llvm/lib/Target/ARM:
>
> ARMTargetAsmInfo.h updated: 1.3 -> 1.4
> ARMTargetAsmInfo.cpp updated: 1.18 -> 1.19
> ---
> Log message:
>
> Add some support for (Darwin) code-generating
Changes in directory llvm/lib/Target/ARM:
ARMTargetAsmInfo.h updated: 1.3 -> 1.4
ARMTargetAsmInfo.cpp updated: 1.18 -> 1.19
---
Log message:
Add some support for (Darwin) code-generating directives in getInlineAsmLength.
Support is incomplete, but more accurate than gcc's.
---
Diffs of the ch
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.39 -> 1.40
ARMLoadStoreOptimizer.cpp updated: 1.8 -> 1.9
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+8 -0)
ARMConstantIslandPass.cpp |4
ARMLoadSto
Changes in directory llvm/lib/Target/ARM:
ARMInstrThumb.td updated: 1.24 -> 1.25
---
Log message:
Doh. PC displacement is between the constantpool and the add instruction.
---
Diffs of the changes: (+1 -1)
ARMInstrThumb.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: l
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.91 -> 1.92
ARMRegisterInfo.h updated: 1.18 -> 1.19
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+5 -4)
ARMRegisterInfo.cpp |7 ---
ARMRegisterInfo.h |2 +-
2 files changed, 5
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.90 -> 1.91
ARMRegisterInfo.h updated: 1.17 -> 1.18
---
Log message:
Under normal circumstances, when a frame pointer is not required, we reserve
argument space for call sites in the function immediately on entry to the
cur
That's fine. Thanks.
Evan
On Apr 30, 2007, at 6:55 AM, Lauro Ramos Venancio wrote:
Evan,
The problem is the semantics. A possible solution is rename
UseThumbBacktraces to UseThumbFramePtrReg.
Lauro
2007/4/27, Evan Cheng < [EMAIL PROTECTED]>:
Hi Lauro,
It would be better to fix ARMSubtar
Evan,
The problem is the semantics. A possible solution is rename
UseThumbBacktraces to UseThumbFramePtrReg.
Lauro
2007/4/27, Evan Cheng <[EMAIL PROTECTED]>:
Hi Lauro,
It would be better to fix ARMSubtarget.cpp instead. Just initialize
UseThumbBacktraces to the value of input parameter thumb
Changes in directory llvm/lib/Target/ARM:
README.txt updated: 1.23 -> 1.24
---
Log message:
Remove item: thumb padding in constant islands
---
Diffs of the changes: (+2 -6)
README.txt |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/ARM/README.txt
Changes in directory llvm/lib/Target/ARM:
ARMTargetAsmInfo.cpp updated: 1.17 -> 1.18
---
Log message:
remove unused variable
---
Diffs of the changes: (+0 -1)
ARMTargetAsmInfo.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/T
Changes in directory llvm/lib/Target/ARM:
ARMAsmPrinter.cpp updated: 1.68 -> 1.69
ARMTargetAsmInfo.cpp updated: 1.16 -> 1.17
---
Log message:
Enable protected visibility on ARM.
---
Diffs of the changes: (+16 -4)
ARMAsmPrinter.cpp| 19 +++
ARMTargetAsmInfo.cpp |1
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