Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.cpp updated: 1.24 -> 1.25
ARMInstrInfo.h updated: 1.7 -> 1.8
ARMTargetMachine.cpp updated: 1.26 -> 1.27
ARMTargetMachine.h updated: 1.9 -> 1.10
---
Log message:
Hooks for predication support.
---
Diffs of the changes: (+39 -0)
ARMInstrInfo.cpp | 22 ++++++++++++++++++++++
ARMInstrInfo.h | 5 +++++
ARMTargetMachine.cpp | 11 +++++++++++
ARMTargetMachine.h | 1 +
4 files changed, 39 insertions(+)
Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.24
llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.25
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.24 Mon May 14 20:29:07 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.cpp Tue May 15 21:01:49 2007
@@ -423,6 +423,28 @@
return false;
}
+bool ARMInstrInfo::isPredicatable(MachineInstr *MI) const {
+ const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+ if (TID->Flags & M_PREDICATED)
+ return true;
+
+ unsigned Opc = MI->getOpcode();
+ return Opc == ARM::B || Opc == ARM::tB;
+}
+
+void ARMInstrInfo::PredicateInstruction(MachineInstr *MI,
+ std::vector<MachineOperand> &Cond) const
{
+ unsigned Opc = MI->getOpcode();
+ if (Opc == ARM::B || Opc == ARM::tB) {
+ MI->setInstrDescriptor(get(Opc == ARM::B ? ARM::Bcc : ARM::tBcc));
+ MI->addImmOperand(Cond[0].getImmedValue());
+ return;
+ }
+
+ MachineOperand *PMO = MI->findFirstPredOperand();
+ PMO->setImm(Cond[0].getImmedValue());
+}
+
/// FIXME: Works around a gcc miscompilation with -fstrict-aliasing
static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT,
Index: llvm/lib/Target/ARM/ARMInstrInfo.h
diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.7
llvm/lib/Target/ARM/ARMInstrInfo.h:1.8
--- llvm/lib/Target/ARM/ARMInstrInfo.h:1.7 Mon Jan 29 17:45:17 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.h Tue May 15 21:01:49 2007
@@ -102,6 +102,11 @@
const std::vector<MachineOperand> &Cond) const;
virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
+
+ // Predication support.
+ virtual bool isPredicatable(MachineInstr *MI) const;
+ virtual void PredicateInstruction(MachineInstr *MI,
+ std::vector<MachineOperand> &Cond) const;
};
// Utility routines
Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp
diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.26
llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.27
--- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.26 Mon Mar 12 20:20:42 2007
+++ llvm/lib/Target/ARM/ARMTargetMachine.cpp Tue May 15 21:01:49 2007
@@ -17,6 +17,7 @@
#include "ARM.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/Target/TargetOptions.h"
@@ -24,6 +25,8 @@
static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
cl::desc("Disable load store optimization
pass"));
+static cl::opt<bool> EnableIfConversion("enable-arm-if-conversion", cl::Hidden,
+ cl::desc("Enable if-conversion pass"));
namespace {
// Register the target.
@@ -85,6 +88,14 @@
return false;
}
+bool ARMTargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
+ if (Fast || !EnableIfConversion || Subtarget.isThumb())
+ return false;
+
+ PM.add(createIfConverterPass());
+ return true;
+}
+
bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
// FIXME: temporarily disabling load / store optimization pass for Thumb
mode.
if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
Index: llvm/lib/Target/ARM/ARMTargetMachine.h
diff -u llvm/lib/Target/ARM/ARMTargetMachine.h:1.9
llvm/lib/Target/ARM/ARMTargetMachine.h:1.10
--- llvm/lib/Target/ARM/ARMTargetMachine.h:1.9 Mon Mar 12 20:20:42 2007
+++ llvm/lib/Target/ARM/ARMTargetMachine.h Tue May 15 21:01:49 2007
@@ -53,6 +53,7 @@
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
+ virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
std::ostream &Out);
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