Changes in directory llvm/lib/Target/ARM:
ARMTargetMachine.cpp updated: 1.27 -> 1.28 --- Log message: Move if-conversion after all passes that may use register scavenger. --- Diffs of the changes: (+3 -8) ARMTargetMachine.cpp | 11 +++-------- 1 files changed, 3 insertions(+), 8 deletions(-) Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.27 llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.28 --- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.27 Tue May 15 21:01:49 2007 +++ llvm/lib/Target/ARM/ARMTargetMachine.cpp Wed May 16 15:51:47 2007 @@ -88,19 +88,14 @@ return false; } -bool ARMTargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) { - if (Fast || !EnableIfConversion || Subtarget.isThumb()) - return false; - - PM.add(createIfConverterPass()); - return true; -} - bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { // FIXME: temporarily disabling load / store optimization pass for Thumb mode. if (!Fast && !DisableLdStOpti && !Subtarget.isThumb()) PM.add(createARMLoadStoreOptimizationPass()); + if (!Fast && EnableIfConversion && !Subtarget.isThumb()) + PM.add(createIfConverterPass()); + PM.add(createARMConstantIslandPass()); return true; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits