Changes in directory llvm/lib/Target/ARM:
ARMInstrInfo.td updated: 1.104 -> 1.105 --- Log message: Add some patterns for PIC PC-relative loads and stores. --- Diffs of the changes: (+41 -2) ARMInstrInfo.td | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 41 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.104 llvm/lib/Target/ARM/ARMInstrInfo.td:1.105 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.104 Thu May 17 20:53:54 2007 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon May 21 17:14:33 2007 @@ -554,11 +554,50 @@ def PICADD : AXI1<(ops GPR:$dst, GPR:$a, pclabel:$cp, pred:$p), "$cp:\n\tadd$p $dst, pc, $a", [(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>; -let AddedComplexity = 10 in -def PICLD : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + +let isLoad = 1, AddedComplexity = 10 in { +def PICLD : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), "${addr:label}:\n\tldr$p $dst, $addr", [(set GPR:$dst, (load addrmodepc:$addr))]>; +def PICLDZH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}h $dst, $addr", + [(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>; + +def PICLDZB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}b $dst, $addr", + [(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>; + +def PICLDH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}h $dst, $addr", + [(set GPR:$dst, (extloadi16 addrmodepc:$addr))]>; + +def PICLDB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}b $dst, $addr", + [(set GPR:$dst, (extloadi8 addrmodepc:$addr))]>; + +def PICLDSH : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}sh $dst, $addr", + [(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>; + +def PICLDSB : AXI2<(ops GPR:$dst, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tldr${p}sb $dst, $addr", + [(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>; +} +let isStore = 1, AddedComplexity = 10 in { +def PICSTR : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tstr$p $src, $addr", + [(store GPR:$src, addrmodepc:$addr)]>; + +def PICSTRH : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tstr${p}h $src, $addr", + [(truncstorei16 GPR:$src, addrmodepc:$addr)]>; + +def PICSTRB : AXI2<(ops GPR:$src, addrmodepc:$addr, pred:$p), + "${addr:label}:\n\tstr${p}b $src, $addr", + [(truncstorei8 GPR:$src, addrmodepc:$addr)]>; +} + //===----------------------------------------------------------------------===// // Control Flow Instructions. // _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits