From: Tang Yuantian
Add the Silicon Image series PCI Express to
Serial ATA controller support, including Sil3132,
Sil3131 and Sil3124.
The SATA controller can be used to load kernel.
The features list:
- Supports 1-lane 2.5 Gbit/s PCI Express
On 2011-07-07 14:27, Orjan Friberg wrote:
> On 2011-07-07 11:37, Orjan Friberg wrote:
>> It seems the boot rom must be doing some initialization of the USB phy
>> (this is with a TPS65920).
>
> I forgot to add that I'm using a configuration header and not x-loader
> as the 1st stage bootloader.
>
>
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
On 2011-08-08 21:37, Remy Bohmer wrote:
> Whoops... Not applied to u-boot-usb, since the timeout code is broken.
> It should wait for a certain time, not a certain count.
Agreed, patch withdrawn.
--
Orjan Friberg
FlatFrog Laboratories AB
___
U-Boot ma
Hi,
we are looking to change the NAND flash part on our custom board
(AT91SAM9G20-EK based). The new part requires at least a 4-bit ECC
algorithm (e.g. BCH). As our processor has no hardware ECC
capabilities the ECC has to be calculated in software.
The Linux kernel has support for BCH ECC sin
This tool takes a key=value configuration file (same as would a `printenv' show)
and generates the corresponding environnment image, ready to be flashed.
Signed-off-by: David Wagner
---
Hi Mike,
This 3rd version should address what you pointed out.
I had troubles testing it on my IGEP
Dear Wolfgang Denk,
On 3 August 2011 09:17, Chander Kashyap wrote:
> Dear Wolfgang Denk,
>
> On 31 July 2011 15:30, Wolfgang Denk wrote:
>
>> Dear Chander Kashyap,
>>
>> In message <1311914519-10531-2-git-send-email-chander.kash...@linaro.org>
>> you wrote:
>> > Origen board is based upon S5PV3
Hi all,
just to inform, seems xyzModem is not following the protocol spec of YModem:
YMODEM Batch Transmission Session (1 file)
SENDER RECEIVER
<-- C (command:rb)
SOH 00 FF foo.c NUL[123] CRC CRC-->
Hi Marek Vasut,
On Monday 08 August 2011 11:04 PM, Marek Vasut wrote:
> On Monday, August 08, 2011 10:01:19 AM Albert ARIBAUD wrote:
>> Hi Hong Xu,
>>
>> Le 08/08/2011 05:20, Hong Xu a écrit :
>>> After DMA operation, we need to maintain D-Cache coherency.
>>> So that the DCache must be invalidate
Signed-off-by: Aneesh V
---
arch/arm/cpu/armv7/omap3/board.c |8
arch/arm/cpu/armv7/omap4/board.c |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2c3d7f3 100644
--- a/a
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V
---
arch/arm/cpu/armv7/cache_v7.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm
- Avoid enabling caches for all ARM boards
- Enable caches for omap3/4
- Stronger barrier for armv7 cache-maintenance operations.
V2:
* Rebased to latest HEAD of u-boot/master
* Improved the README
* Added a patch for removing the flush in invalidate
and for printing a warning in such cases.
An
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.
Also add some docu
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V
---
V2:
New in V2
---
arch/arm/cpu/armv7/cache_v7.c | 14 --
arch/arm/lib/cache-pl310.c
> -Original Message-
> From: Hiremath, Vaibhav
> Sent: Monday, August 01, 2011 7:49 PM
> To: U-Boot@lists.denx.de
> Cc: Paulraj, Sandeep; albert.u.b...@aribaud.net; Hiremath, Vaibhav
> Subject: [PATCH] OMAP3/4: Increase console I/O buffer size
>
> From: Vaibhav Hiremath
>
> Increase the
Hi Wolfgang, Albert,
On Tuesday 09 August 2011 04:40 PM, Aneesh V wrote:
> - Avoid enabling caches for all ARM boards
> - Enable caches for omap3/4
> - Stronger barrier for armv7 cache-maintenance operations.
>
> V2:
> * Rebased to latest HEAD of u-boot/master
> * Improved the README
> * Added a p
Signed-off-by: Aneesh V
---
arch/arm/cpu/armv7/omap3/board.c |8
arch/arm/cpu/armv7/omap4/board.c |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2c3d7f3 100644
--- a/a
- Avoid enabling caches for all ARM boards
- Enable caches for omap3/4
- Stronger barrier for armv7 cache-maintenance operations.
V2:
* Rebased to latest HEAD of u-boot/master
* Improved the README
* Added a patch for removing the flush in invalidate
and for printing a warning in such cases.
An
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V
---
arch/arm/cpu/armv7/cache_v7.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V
---
V2:
New in V2
---
arch/arm/cpu/armv7/cache_v7.c | 14 --
arch/arm/lib/cache-pl310.c
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.
Also add some docu
From: Reinhard Arlt
This patch adds support for the esd CPCI-HD/2 board to u-boot for CPCI-CPU/750.
As the primary devices on the CPCI-HD/2 board are connected to device 1 and 3,
the device must be swaped.
Signed-off-by: Reinhard Arlt
--
diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci7
On 08/09/2011 12:40 PM, Angelo Dureghello wrote:
> Hi all,
Hi Angelo,
> just to inform, seems xyzModem is not following the protocol spec of YModem:
>
> YMODEM Batch Transmission Session (1 file)
>
> SENDER RECEIVER
>
Hello.
On 08-08-2011 17:57, Yao Cheng wrote:
> The issue is found when calling flush_cache() with zero "size" argument.
> The bound of loop is miscalculated in this case and flush_cache() enters a
> wrong flushing loop.
> To fix this issue I skipped the operations when "size" is found to be zero
Aneesh V (3):
omap4: factor out common part from board config headers
omap4: make SDRAM init work for ES1.0 silicon
omap4: IO settings
arch/arm/cpu/armv7/omap4/board.c| 57 +++
arch/arm/cpu/armv7/omap4/emif.c | 72 +---
arch/arm/cpu/armv7/omap4/sdram_elpida.c |
SDRAM init was not working on ES1.0 due to a programming
error. A pointer that was passed by value to a function
was set in function emif_get_device_details(), but the effect
wouldn't be seen in the calling function. The issue came
out while testing for ES1.0 because ES1.0 doesn't have any
SDRAM ch
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.
Signed-off-by: Aneesh V
---
arch/arm/cpu/armv7/omap4/board.c| 57 +++
arch/arm/cpu/armv7/omap4/emif.c | 25 -
arch/arm/include/
Factor out common parts from omap4_sdp4430.h and omap4_panda.h
into a new file omap4_common.h
Signed-off-by: Aneesh V
---
include/configs/omap4_common.h | 275 +++
include/configs/omap4_panda.h | 245 +--
include/configs/om
Hello Stefano,
i apologize, you posted a detail i lost reading the spec.
I can successfully transfert a file to my board, no problem on this.
Anyway, i am implementing a "sender" side sw, i am quite sure i am losing some
other details, but if you want to check, i noticed these possible issues:
Hi,
after porting my board support from u-boot 2009.11 to 2011.06
together with adding the relocation support
the ATAGs passing don't work any more.
I have add icache_disable() and dcache_disable()
to my board_init() like on other pxa boards.
It looks like the mapping of the Dcache as RAM is not
Thanks, Scott.
-Shawn
> Date: Mon, 8 Aug 2011 15:42:38 -0500
> From: scottw...@freescale.com
> To: programas...@hotmail.com
> CC: u-boot@lists.denx.de
> Subject: Re: [U-Boot] problem with mpc837x start.S
>
> On 08/04/2011 06:37 AM, shawn Bai wrote:
> >
Hi Denk,
Thanks for the comments. It's a very good suggestion to add it as part of
Command. Unfortunately, I am unable to locate the 'Clock' command source.
I would greatly appreciate if you can point it for me.
Thanks,
Nag
On Tue, Aug 02, 2011 at 22:03:26, Wolfgang Denk wrote:
> Dear nagabhush
Hi Laurence,
Thanks for the info about cache coherency issues with DAVINCI EMAC.
I will make appropriate changes to commit message.
Thanks,
Nag
On Wed, Aug 03, 2011 at 01:07:36, Laurence Withers wrote:
> On Tue, Aug 02, 2011 at 06:06:42PM +0200, Wolfgang Denk wrote:
> > Dear nagabhushana.netagu.
Denk,
Thanks a lot for comments. I will incorporate changes suggested by you.
Regards,
Nag
On Tue, Aug 02, 2011 at 22:02:12, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-12-git-send-email-nagabhushana.netagu...@ti.com>
> you wrote:
> > From: Nagabh
Hi Aneesh,
sorry for answering this late...
On 08/02/2011 02:41 PM, Aneesh V wrote:
> Hi Simon,
>
> On Monday 01 August 2011 07:43 PM, Simon Schwarz wrote:
>> Hi Aneesh,
>>
>> On 08/01/2011 02:56 PM, Aneesh V wrote:
>>> Hi Simon,
>>>
>>> On Monday 01 August 2011 04:50 PM, Simon Schwarz wrote:
>>>
Denk,
Thanks for comments.
I agree with you that booting will slowdown with added calls.
I will drop this patch from this series. I will device effective
Patch later and submit.
Regards,
Nag
On Tue, Aug 02, 2011 at 22:00:36, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In me
Hi Denk,
Thanks for comments.
Agree with you. We need to find a better way to find about board revision than
the current method which depends on presence of i2c EEPROM on the board.
I will drop this patch also from this series. I will device a better patch
And submit later.
Thanks,
Nag
On Tue
Thanks Denk for comments.
I will add appropriate reasons in commit message and resubmit the patch.
Regards,
Nag
On Tue, Aug 02, 2011 at 21:36:42, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-2-git-send-email-nagabhushana.netagu...@ti.com>
> you wro
Hi Denk,
Thanks for comments. My response is in-lined.
Regards,
Nag
On Tue, Aug 02, 2011 at 21:42:28, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-4-git-send-email-nagabhushana.netagu...@ti.com>
> you wrote:
> > From: Nagabhushana Netagunte
> >
Denk,
Sorry for missing upstream syntax here, will follow relevant rules.
Regards,
Nag
On Tue, Aug 02, 2011 at 21:50:02, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-6-git-send-email-nagabhushana.netagu...@ti.com>
> you wrote:
> > From: Nagabhushan
Denk,
Thanks for your response.
My response is in-lined.
Regards,
Nag
On Tue, Aug 02, 2011 at 21:53:42, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-6-git-send-email-nagabhushana.netagu...@ti.com>
> you wrote:
> > From: Nagabhushana Netagunte
>
Denk,
Thanks for the suggestion, will incorporate the changes suggested.
Regards,
Nag
On Tue, Aug 02, 2011 at 21:55:11, Wolfgang Denk wrote:
> Dear nagabhushana.netagu...@ti.com,
>
> In message <1312299792-16415-7-git-send-email-nagabhushana.netagu...@ti.com>
> you wrote:
> > From: Nagabhushan
Dear all,
As we know dcache is now enabled in u-boot.
I'm trying to make the S5P Goni target working with d-cache enabled.
There are some patches and ideas appearing on the list (e.g.
http://patchwork.ozlabs.org/patch/109199/ made by Aneesh V)
I'm currently using the u-boot/master branch,
SHA1:
On 08.08.2011 21:05, Albert ARIBAUD wrote:
> Hi Dirk,
>
> Le 05/08/2011 20:42, Dirk Behme a écrit :
>> From: Dirk Behme
>>
>> Using mkimage with e.g.
>>
>> tools/mkimage -A arm -T firmware -O u-boot -d u-boot.bin foo.img
>>
>> gives a warning
>>
>> "Unknown OMAP image type - 5"
>>
>> while it seems
I'm not sure what the larger context of this change is, but it seems
like a bad idea to me. There are a lot of locations in U-Boot that
will end up causing an unaligned invalidate (ext2 and dos file system
code in particular). And this change will cause those unaligned
invalidates to possibly thr
>
>> Seems to me like init
>> functions are not / should not be dependent on order, so the "fix"
>> seems fragile to me, at least as long as we cannot add a good
>> explanation.
>
> Yes, I agree.
>
> John? Aneesh? Any idea?
>
The method check_image_type in image_type_params is supposed to just
retu
From: King, Gary
Sent: Tuesday, August 09, 2011 11:06 AM
To: King, Gary
Subject: Confirmation Letter From Microsoft/Yahoo Web Team
This is a confidential message from the Microsoft/Yahoo Office, You have been
approved by the Microsoft/Yahoo Foundation Payment B
From: Dirk Behme
Using mkimage with e.g.
tools/mkimage -A arm -T firmware -O u-boot -d u-boot.bin foo.img
gives a warning
"Unknown OMAP image type - 5"
while it seems that the image itself is created successfully.
This does come from the patch "mkimage: Add OMAP boot image support".
The met
On Tue, Aug 9, 2011 at 4:21 AM, Orjan Friberg wrote:
> On 2011-07-07 14:27, Orjan Friberg wrote:
>> On 2011-07-07 11:37, Orjan Friberg wrote:
>>> It seems the boot rom must be doing some initialization of the USB phy
>>> (this is with a TPS65920).
It does. The BeagleBoard-xM uses a TPS65950, but
On Tue, Aug 9, 2011 at 2:25 PM, Jason Kridner wrote:
> On Tue, Aug 9, 2011 at 4:21 AM, Orjan Friberg wrote:
>> On 2011-07-07 14:27, Orjan Friberg wrote:
>>> On 2011-07-07 11:37, Orjan Friberg wrote:
It seems the boot rom must be doing some initialization of the USB phy
(this is with a T
On 08/09/2011 04:41 AM, Hitz, Christian wrote:
> Hi,
>
> we are looking to change the NAND flash part on our custom board
> (AT91SAM9G20-EK based). The new part requires at least a 4-bit ECC
> algorithm (e.g. BCH). As our processor has no hardware ECC
> capabilities the ECC has to be calculated
Hi,
just curious. Why some commands entered to u-boot are repeated after
processing by pressing Enter key? Like tftp, print
Thanks for clarification,
marek
--
as simple and primitive as possible
-
Marek Belisko - OPEN-NANDRA
Freelance Develo
On 08/09/2011 02:03 PM, Belisko Marek wrote:
> Hi,
>
> just curious. Why some commands entered to u-boot are repeated after
> processing by pressing Enter key? Like tftp, print
>
> Thanks for clarification,
It's useful for some commands like "md" that auto-advance. It's not
useful (and oft
On Tuesday, August 09, 2011 03:14:38 PM Stefan Herbrechtsmeier wrote:
> Hi,
>
> after porting my board support from u-boot 2009.11 to 2011.06
> together with adding the relocation support
> the ATAGs passing don't work any more.
>
> I have add icache_disable() and dcache_disable()
> to my board_i
On Tuesday, August 09, 2011 03:57:41 AM Hong Xu wrote:
> Hi Marek Vasut,
>
> On 08/09/2011 01:34 AM, Marek Vasut wrote:
> > On Monday, August 08, 2011 10:01:19 AM Albert ARIBAUD wrote:
> >> Hi Hong Xu,
> >>
> >> Le 08/08/2011 05:20, Hong Xu a écrit :
> >>> After DMA operation, we need to maintain
Check second DIMM slot in case the first one is empty.
Honor DQS enable option for SDRAM mode register.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 19 ++-
arch/powerpc/include/asm/fsl_ddr_sdram.h |4
2 files changed, 14 insertions(+), 9 dele
Reduce the calculation error to 1ps.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/util.c | 26 +++---
1 files changed, 11 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c
b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
index 104d360..c6441
The two slots on the same controller have different addresses.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/main.c | 11 +++
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 249fd
DDR2 has different ODT table and values. Adding table according to Samsung
application note.
Fix additive latency calculation to avoid interger underflow.
Signed-off-by: York Sun
---
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|3 +-
arch/powerpc/cpu/mpc8xxx/ddr/options.c
Unified DDR driver is maintained for better performance, robustness and bug
fixes. Upgrading to use unified DDR driver for MPC83xx takes advantage of
overall improvement. It requires changes for board files to customize
platform-dependent parameters.
To utilize the unified DDR driver, a board need
Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c.
The unified driver can initialize data using DDR controller. No need to
use DMA if just to initialze for ECC.
Signed-off-by: York Sun
Signed-off-by: Kim Phillips
---
board/freescale/mpc8349emds/Makefile |1 +
board/fr
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +
arch/powerpc/include/asm/gpio.h | 38 +
board/freescale/mpc8313erdb/mpc8313erdb.c|9 +
drivers/gpio/Makefile|
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
include/configs/MPC8313ERDB.h |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 92c54d0..9bf38df 100644
--- a/include/configs/MP
Don't allocate NAND buffers as one block, but allocate them separately. This
allows systems where DMA to buffers happen to allocate these buffers properly
aligned.
Signed-off-by: Marek Vasut
---
drivers/mtd/nand/nand_base.c | 27 +--
include/linux/mtd/nand.h |7
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2
board/freescale/mpc8313erdb/mpc8313erdb.c |9 +
include/configs/MPC8313ERDB.h |5 -
2 files chan
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Improved names of INIT constants (to include "CONFIG_")
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +
arch/powerp
On 08/09/2011 05:31 PM, Joe Hershberger wrote:
> diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
> b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
> new file mode 100644
> index 000..4319d07
> --- /dev/null
> +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
[snip
> +void gpio_init_f
On Tue, Aug 9, 2011 at 5:15 PM, Scott Wood wrote:
> On 08/09/2011 05:31 PM, Joe Hershberger wrote:
>> diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
>> b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
>> new file mode 100644
>> index 000..4319d07
>> --- /dev/null
>> +++ b/arch/powerp
On 08/09/2011 04:54 PM, Marek Vasut wrote:
> Don't allocate NAND buffers as one block, but allocate them separately. This
> allows systems where DMA to buffers happen to allocate these buffers properly
> aligned.
>
> Signed-off-by: Marek Vasut
That second sentence is hard to parse -- I think you
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2
Changes for v3:
- Renamed gpio_init_* to mpc83xx_gpio_init_*
- Added board_early_init_r support to MPC8313ERDB targets
board
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Improved names of INIT constants (to include "CONFIG_")
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2
Changes for v3:
- gpio_init_* is now mpc83xx_gpio_init_*
arch/powerp
On Tue, 9 Aug 2011 17:31:29 -0500
Joe Hershberger wrote:
> diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h
> new file mode 100644
> index 000..eb071d1
> --- /dev/null
> +++ b/arch/powerpc/include/asm/gpio.h
> @@ -0,0 +1,38 @@
> +/*
> + * Copyright (c) 2011, NVID
On Tue, Aug 9, 2011 at 5:54 PM, Kim Phillips wrote:
> On Tue, 9 Aug 2011 17:31:29 -0500 Joe Hershberger
> wrote:
>
>> + /* Update the local output buffer soft copy */
>> + gpio_output_value[ctrlr] =
>> + (gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask :
>> 0);
>
>
On Wednesday, August 10, 2011 12:37:29 AM Scott Wood wrote:
> On 08/09/2011 04:54 PM, Marek Vasut wrote:
> > Don't allocate NAND buffers as one block, but allocate them separately.
> > This allows systems where DMA to buffers happen to allocate these
> > buffers properly aligned.
> >
> > Signed-of
Don't allocate NAND buffers as one block, but allocate them separately. This
allows systems where DMA to buffers happen to allocate these buffers properly
aligned.
Signed-off-by: Marek Vasut
---
drivers/mtd/nand/nand_base.c | 30 +++---
include/linux/mtd/nand.h |
Hi Marek Vasut,
On 08/10/2011 03:55 AM, Marek Vasut wrote:
> On Tuesday, August 09, 2011 03:57:41 AM Hong Xu wrote:
>> Hi Marek Vasut,
>>
>> On 08/09/2011 01:34 AM, Marek Vasut wrote:
[...]
printf("WARNING: %s - start address %x is not aligned\n"
__FUNCTION__, start);
Don't allocate NAND buffers as one block, but allocate them separately. This can
be beneficial for example for systems, which need DMA buffers to be aligned.
With this patch, such systems can allocate aligned buffers and avoid memcpy()ing
data in place.
Signed-off-by: Marek Vasut
---
drivers/mtd
On Wednesday, August 10, 2011 03:45:11 AM Hong Xu wrote:
> Hi Marek Vasut,
>
> On 08/10/2011 03:55 AM, Marek Vasut wrote:
> > On Tuesday, August 09, 2011 03:57:41 AM Hong Xu wrote:
> >> Hi Marek Vasut,
>
> >> On 08/09/2011 01:34 AM, Marek Vasut wrote:
> [...]
>
> printf("WARNING: %s -
After DMA operation, we need to maintain D-Cache coherency.
So that the DCache must be invalidated (hence CPU will fetch
data written by DMA controller from RAM).
Tested on AT91SAM9261EK with Peripheral DMA controller.
Signed-off-by: Hong Xu
Tested-by: Elen Song
CC: Albert Aribaud
CC: Aneesh V
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2
Changes for v3:
- Renamed gpio_init_* to mpc83xx_gpio_init_*
- Added board_early_init_r support to MPC8313ERDB targets
Changes
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v2:
- Improved names of INIT constants (to include "CONFIG_")
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2
Changes for v3:
- gpio_init_* is now mpc83xx_gpio_init_*
Changes for v
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Kim Phillips
---
Changes for v4:
- Split out of patch 1/2
arch/arm/include/asm/gpio.h | 39 +--
arch/powerpc/include/asm/gpio.h |
Enable the command and the shim driver
Configure the pads to allow access to the button on GPIO_121 and the 2 LEDS on
GPIO_7 and GPIO_8
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Sandeep Paulraj
---
board/ti/panda/panda_mux_data.h |6 +++---
include/configs/omap4_panda.h |
Add a shim driver to drivers/gpio that maps the standard GPIO API to the OMAP
GPIO API
Empty gpio.h is needed in the asm/arch dirs for omap3 and omap4 due to include
in asm/gpio.h
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Sandeep Paulraj
---
arch/arm/include/asm/arch-omap3/gpio.
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Sandeep Paulraj
---
.gitignore |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/.gitignore b/.gitignore
index dbf545f..f86ec35 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,6 +19,7 @@
# Top-level generic files
#
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Sandeep Paulraj
---
include/configs/omap4_panda.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index e313231..a3f13e5 100644
--- a/include/config
Add quiet parameter to cmd_gpio for use when part of a script
Enable repeat... especially useful when used with input and toggle
Add "outstate" command that will return and print the state of an output
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Mike Frysinger
---
common/cmd_gpio.c
Previously only the last N were included based on the current one in use.
Signed-off-by: Joe Hershberger
Cc: Joe Hershberger
Cc: Mingkai Hu
Cc: Andy Fleming
Cc: Kumar Gala
Cc: Detlev Zundel
---
drivers/net/tsec.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/dr
On Wednesday, August 10, 2011 04:49:25 AM Hong Xu wrote:
> After DMA operation, we need to maintain D-Cache coherency.
> So that the DCache must be invalidated (hence CPU will fetch
> data written by DMA controller from RAM).
>
> Tested on AT91SAM9261EK with Peripheral DMA controller.
Hi Hong,
o
Hi Joe,
Le 10/08/2011 07:21, Joe Hershberger a écrit :
> Signed-off-by: Joe Hershberger
> Cc: Joe Hershberger
> Cc: Sandeep Paulraj
> ---
> .gitignore |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/.gitignore b/.gitignore
> index dbf545f..f86ec35 100644
> --- a/.g
Hello Hong,
Marek Vasut wrote:
> On Wednesday, August 10, 2011 04:49:25 AM Hong Xu wrote:
>> After DMA operation, we need to maintain D-Cache coherency.
>> So that the DCache must be invalidated (hence CPU will fetch
>> data written by DMA controller from RAM).
>>
>> Tested on AT91SAM9261EK with P
On Saturday, July 30, 2011 12:52:53 PM Marek Vasut wrote:
> On Saturday, July 30, 2011 08:42:19 AM Jason Hui wrote:
> > Hi, Marek,
> >
> > On Sat, Jul 30, 2011 at 1:09 AM, Marek Vasut wrote:
> > > On Friday, July 29, 2011 01:24:49 PM Jason Hui wrote:
> > >> Hi, Marek,
> > >>
> > >> On Fri, Jul 2
I have a Tegra 2 device that stores its configuration data in the spot that
the MBR is meant to sit on the device this is immobile and cannot be moved,
The device has a GPT partition table but no MBR, is there a way to either
make u-boot just read the GPT from the end of the emmc or, emulate the mb
Hi Marek Vasut,
On 08/10/2011 01:52 PM, Marek Vasut wrote:
> On Wednesday, August 10, 2011 04:49:25 AM Hong Xu wrote:
>> After DMA operation, we need to maintain D-Cache coherency.
>> So that the DCache must be invalidated (hence CPU will fetch
>> data written by DMA controller from RAM).
>>
>> Te
On Wed, Aug 10, 2011 at 1:59 PM, Marek Vasut wrote:
> On Saturday, July 30, 2011 12:52:53 PM Marek Vasut wrote:
>> On Saturday, July 30, 2011 08:42:19 AM Jason Hui wrote:
>> > Hi, Marek,
>> >
>> > On Sat, Jul 30, 2011 at 1:09 AM, Marek Vasut wrote:
>> > > On Friday, July 29, 2011 01:24:49 PM Jaso
Hi Anton,
Le 09/08/2011 18:39, Anton Staaf a écrit :
> I'm not sure what the larger context of this change is, but it seems
> like a bad idea to me. There are a lot of locations in U-Boot that
> will end up causing an unaligned invalidate (ext2 and dos file system
> code in particular). And this
Hi Hong Xu,
Le 10/08/2011 08:17, Hong Xu a écrit :
> There are some ARM926 specific code in arch/arm/lib/cache.c; So I also
> put the stuff there. ;-) I think Albert Aribaud or the original
> contributor of cache part shall have clearer view.So, I'll keep neutral
> to hear more ideas.
Basically,
Hi Albert,
On 08/10/2011 02:36 PM, Albert ARIBAUD wrote:
> Hi Hong Xu,
>
> Le 10/08/2011 08:17, Hong Xu a écrit :
>
>> There are some ARM926 specific code in arch/arm/lib/cache.c; So I also
>> put the stuff there. ;-) I think Albert Aribaud or the original
>> contributor of cache part shall have c
Hi Anton,
On Tuesday 09 August 2011 10:09 PM, Anton Staaf wrote:
> I'm not sure what the larger context of this change is, but it seems
> like a bad idea to me. There are a lot of locations in U-Boot that
Please see this thread for the context.
http://thread.gmane.org/gmane.comp.boot-loaders.u-b
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