Re: [Mesa-dev] [PATCH] meta/copy_image: Stash off the scissor

+ _mesa_meta_begin(ctx, MESA_META_SCISSOR); > > _mesa_GenFramebuffers(2, fbos); > _mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]); > -- > 2.4.3 > > ___ > mesa-dev mailing list > mes

[Mesa-dev] [PATCH] i965: Silence signed-unsigned int comparison warning by compiler

brw_cs.cpp:386:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_cs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa

[Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/common/meta_blit.c | 6 +++--- src/mesa/drivers/dri/i915/i915_texstate.c | 2 +- src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp | 2 +- src/mesa/drivers/dri/i965/brw_reg.h | 2 +- src/mesa

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

> Reviewed-by: Iago Toral Quiroga > > On Tue, 2015-07-28 at 16:48 -0700, Anuj Phogat wrote: >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/drivers/common/meta_blit.c | 6 +++--- >> src/mesa/drivers/dri/i915/i915_texstate

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

it would probably make sense to do that in a separate patch. > Right. It doesn't make sense to make changes in format_parser.py. It was a 'sed' job. I'll remove these changes before pushing. I'll remove the unused functions in format_parser.py in a separate patch. Thanks.

Re: [Mesa-dev] [PATCH] i965: Silence signed-unsigned int comparison warning by compiler

On Wed, Jul 29, 2015 at 9:45 AM, Matt Turner wrote: > On Tue, Jul 28, 2015 at 4:45 PM, Anuj Phogat wrote: >> brw_cs.cpp:386:27: warning: comparison between signed and unsigned >> integer expressions [-Wsign-compare] >> >> Signed-off-by: Anuj Phogat >>

[Mesa-dev] [PATCH] i965: Change the type of max_{vs, hs, ...}_threads variables to unsigned

Fixes following compiler warning: brw_cs.cpp:386:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: Anuj Phogat Cc: Matt Turner --- src/mesa/drivers/dri/i965/brw_context.h | 12 ++-- src/mesa/drivers/dri/i965/brw_cs.cpp| 2 +- 2

[Mesa-dev] [PATCH] Delete unused functions in format parser

Signed-off-by: Anuj Phogat Cc: Neil Roberts --- src/mesa/main/format_parser.py | 7 --- 1 file changed, 7 deletions(-) diff --git a/src/mesa/main/format_parser.py b/src/mesa/main/format_parser.py index 11184f7..799b14f 100755 --- a/src/mesa/main/format_parser.py +++ b/src/mesa/main

Re: [Mesa-dev] [Mesa-stable] [PATCH 62/70] i965: Prevent coordinate overflow in intel_emit_linear_blit

s by > 4 (versus the current 8bpp pixels). We also have to be more careful > doing the last line just in case it may exceed the coordinate limit. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90734 > Signed-off-by: Chris Wilson > Cc: Kenneth Graunke &g

[Mesa-dev] [PATCH] i965/gen9: Don't use fast copy blit in case of non power of 2 cpp

Many piglit tests (if using fast copy blit in Mesa) failed earlier because I missed adding this condition. Fast copy blit is currently enabled for use only with Yf/Ys tiling. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 6 -- 1 file changed, 4 insertions(+), 2

[Mesa-dev] [PATCH] i965/gen9: Add a condition for starting pixel in fast copy blit

. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index bab7d90..bb8fc66 100644 --- a/src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH] i965/gen9: Don't use fast copy blit in case of non power of 2 cpp

On Mon, Aug 10, 2015 at 11:17 AM, Anuj Phogat wrote: > Many piglit tests (if using fast copy blit in Mesa) failed earlier > because I missed adding this condition. Fast copy blit is currently > enabled for use only with Yf/Ys tiling. > > Signed-off-by: Anuj Phogat > --- >

Re: [Mesa-dev] [PATCH 1/6] i965: Kill y_or_x variable in miptree tiling selection

: > commit cbe24ff7c8d69a6d378d9c2cce2bc117517f4302 > Author: Kenneth Graunke > Date: Wed Apr 10 13:49:16 2013 -0700 > > intel: Fall back to X-tiling when larger than estimated aperture size. > > v2: This was rebased on a recent commit than Anuj pushed

Re: [Mesa-dev] [PATCH 2/6] i965: Fix comments about blit constraints

below) uses a signed > * 16-bit integer to represent buffer pitch, so it can only handle buffer > * pitches < 32k. > -- > 2.5.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/7] i965/gen9: Don't use intel_..._texture_alignment_unit() for linear 1D layout

If gen9_use_linear_1d_layout() returns true, we discards the align_w computed earlier and use fixed align_w = 64 in gen9_miptree_layout_1d(). So, avoid computing align_w when not required. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +- 1 file changed, 1

[Mesa-dev] [PATCH 3/7] i965/gen9: Handle the GL_TEXTURE_{1D, 1D_ARRAY} targets inside switch

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index edd7518..6ac4024 100644 --- a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 4/7] i965/gen9: Reuse YF alignment tables in tr_mode_..._texture_alignment()

Patch just does some refactoring to make the code look better. No functional changes in here. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 46 ++ 1 file changed, 22 insertions(+), 24 deletions(-) diff --git a/src/mesa

[Mesa-dev] [PATCH 2/7] i965/gen9: Don't call tr_mode_vertical_texture_alignment() for 1D textures

Vertical alignment is not applicable to 1D textures. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index

[Mesa-dev] [PATCH 5/7] i965/gen9: Remove parameter 'brw' from tr_mode_..._texture_alignment()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 53f7698..9a3c844 100644 --- a/src/mesa

[Mesa-dev] [PATCH 7/7] i965/gen9: Remove temporary variable 'bpp' in tr_mode_..._texture_alignment()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 01516d1..f914cf8 100644 --- a/src/mesa

[Mesa-dev] [PATCH 6/7] i965/gen9: Remove temporary variable 'align_yf' in tr_mode_..._texture_alignment()

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 26 +- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 9a3c844..01516d1 100644 --- a

Re: [Mesa-dev] [PATCH v2 1/3] mesa: expose dimension check for glTex*Storage functions

+ return true; > + return false; > +} > + > /*@}*/ > > /** > -- > 2.1.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev With or without suggested change: Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/4] mesa: validate size parameters for glTexStorage*Multisample

On Mon, Aug 10, 2015 at 1:06 AM, Tapani Pälli wrote: > Signed-off-by: Tapani Pälli > --- > src/mesa/main/teximage.c | 28 > 1 file changed, 28 insertions(+) > > diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c > index fc69387..3ea7b2a 100644 > --- a/s

Re: [Mesa-dev] [PATCH 3/4] mesa: set correct error for non-renderable multisample textures

to_string(internalformat)); > + } else { > + _mesa_error(ctx, GL_INVALID_OPERATION, "%s(internalformat=%s)", > func, > + _mesa_enum_to_string(internalformat)); > + } >return; > } > > -- > 2.1.0 > Reviewed-by: Anuj Ph

Re: [Mesa-dev] [PATCH 2/4] mesa: validate size parameters for glTexStorage*Multisample

On Fri, Aug 14, 2015 at 10:30 AM, Anuj Phogat wrote: > On Mon, Aug 10, 2015 at 1:06 AM, Tapani Pälli wrote: >> Signed-off-by: Tapani Pälli >> --- >> src/mesa/main/teximage.c | 28 >> 1 file changed, 28 insertions(+) >> >> diff

Re: [Mesa-dev] [PATCH 4/4] mesa: allow multisampled integer texture formats for ES 3.1

Marta landed a similar patch in master. On Mon, Aug 10, 2015 at 1:06 AM, Tapani Pälli wrote: > Signed-off-by: Tapani Pälli > --- > src/mesa/main/multisample.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/main/multisample.c b/src/mesa/main/multisample.c

Re: [Mesa-dev] [PATCH] mesa: Use the effective internal format instead for validation

"internalformat = %s)", > +callerName, _mesa_enum_to_string(format), > +_mesa_enum_to_string(type), > +_mesa_enum_to_string(internalFormat)); > +return true; > + } > + }

Re: [Mesa-dev] [PATCH] meta: Update comment about unsupported texture types.

mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target, > -- > 2.4.6 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat

Re: [Mesa-dev] [PATCH 4/7] i965/gen9: Reuse YF alignment tables in tr_mode_..._texture_alignment()

On Fri, Aug 14, 2015 at 11:03 AM, Emil Velikov wrote: > Hi Anuj, > > On 13 August 2015 at 22:51, Anuj Phogat wrote: > ... >> + if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS) >> + ret_align *= multiplier; > Out of curiosity, have you noticed if the compiler is c

Re: [Mesa-dev] [PATCH 2/4] mesa: validate size parameters for glTexStorage*Multisample

On Fri, Aug 14, 2015 at 3:21 PM, Timothy Arceri wrote: > On Fri, 2015-08-14 at 10:43 -0700, Anuj Phogat wrote: >> On Fri, Aug 14, 2015 at 10:30 AM, Anuj Phogat wrote: >> > On Mon, Aug 10, 2015 at 1:06 AM, Tapani Pälli >> > wrote: >> > > Signed-off-by: Ta

[Mesa-dev] [PATCH 2/8] i965/gen9: Add code to compute yf/ys tile masks

A later patch in this series uses it to compute tile dimensions. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_misc_state.c| 10 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 39

[Mesa-dev] [PATCH 7/8] i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT

. Cc: Ben Widawsky Cc: Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index d15a64d..729ffb0 100644 --- a/src/mesa/d

[Mesa-dev] [PATCH 5/8] i965: Delete temporary variable 'src_pitch'

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index f8606b8..c177eec 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 3/8] i965: Add a helper function intel_miptree_get_tile_dimensions()

Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 67 ++- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++ 2 files changed, 50 insertions(+), 22 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 1/8] i965: Change the parameters passed to intel_miptree_get_tile_masks()

This change is required by the later patches. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_misc_state.c| 8 +--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 6/8] i965: Move conversion of {src, dst}_pitch to dwords outside if/else

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 25 + 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index c177eec..d15a64d 100644 --- a/src/mesa

[Mesa-dev] [PATCH 4/8] i965: Use helper function intel_miptree_get_tile_dimensions() in surface setup

It takes care of using the correct tile width if we later use other tiling patterns (e.g. Yf) for aux miptree. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 8/8] i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT

I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier. Instead of checking pitch for 64KB alignmnet we need to check it for tile widh alignment. Signed-off-by: Anuj Phogat Cc: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_blit.c | 18 +++--- 1 file changed, 7

Re: [Mesa-dev] [PATCH 1/8] i965: Change the parameters passed to intel_miptree_get_tile_masks()

On Sun, Aug 16, 2015 at 11:48 PM, Pohjolainen, Topi wrote: > On Fri, Aug 14, 2015 at 04:51:52PM -0700, Anuj Phogat wrote: >> This change is required by the later patches. >> >> Cc: Ben Widawsky >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/d

Re: [Mesa-dev] [PATCH 1/8] i965: Change the parameters passed to intel_miptree_get_tile_masks()

On Mon, Aug 17, 2015 at 11:03 AM, Ben Widawsky wrote: > On Fri, Aug 14, 2015 at 04:51:52PM -0700, Anuj Phogat wrote: >> This change is required by the later patches. >> >> Cc: Ben Widawsky >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/drivers/dri/i

Re: [Mesa-dev] [PATCH 1/2] mesa: check samples > 0 for glTex*Multisample

x_samples error is changed from invalid_value to invalid_operation. But, still keeps invalid_value for samples < 0. Both patches are: Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/8] i965: Use helper function intel_miptree_get_tile_dimensions() in surface setup

On Mon, Aug 17, 2015 at 12:19 PM, Ben Widawsky wrote: > On Fri, Aug 14, 2015 at 04:51:55PM -0700, Anuj Phogat wrote: >> It takes care of using the correct tile width if we later use other tiling >> patterns (e.g. Yf) for aux miptree. >> >> Cc: Ben Widawsky &g

Re: [Mesa-dev] [PATCH 3/8] i965: Add a helper function intel_miptree_get_tile_dimensions()

On Mon, Aug 17, 2015 at 12:06 PM, Ben Widawsky wrote: > On Fri, Aug 14, 2015 at 04:51:54PM -0700, Anuj Phogat wrote: >> Cc: Ben Widawsky >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 67 >> ++--

Re: [Mesa-dev] [PATCH 7/8] i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT

On Mon, Aug 17, 2015 at 12:24 PM, Ben Widawsky wrote: > On Fri, Aug 14, 2015 at 04:51:58PM -0700, Anuj Phogat wrote: >> Current code checks the alignment restrictions only for Y tiling. >> From Broadwell PRM vol 10: >> >> "pitch is of 512Byte granularity fo

[Mesa-dev] [PATCH V2 4/8] i965: Delete temporary variable 'src_pitch'

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index f8606b8..c177eec 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH V2 1/8] i965: Add a helper function intel_get_tile_dims()

V2: - Do the tile width/height computations in the new helper function and use it later in intel_miptree_get_tile_masks(). - Change the name to intel_get_tile_dims(). Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 81

[Mesa-dev] [PATCH V2 6/8] i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT

ned-off-by: Anuj Phogat Reviewed-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_blit.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index d15a64d..df53e85 100644 --- a/src/mesa/d

[Mesa-dev] [PATCH V2 8/8] i965: Rename intel_miptree_get_dimensions_for_image()

This function isn't specific to miptrees. So, drop the "miptree" from function name. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_fbo.c | 2 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4

[Mesa-dev] [PATCH V2 7/8] i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT

I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier. Instead of checking pitch for 64KB alignmnet we need to check it for tile widh alignment. Signed-off-by: Anuj Phogat Cc: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_blit.c | 18 +++--- 1 file changed, 7

[Mesa-dev] [PATCH V2 3/8] i965: Use helper function intel_get_tile_dims() in surface setup

It takes care of using the correct tile width if we later use other tiling patterns for aux miptree. V2: Remove the comment about using Yf for aux miptree. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 14 -- 1 file changed, 12

[Mesa-dev] [PATCH V2 5/8] i965: Move conversion of {src, dst}_pitch to dwords outside if/else

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 25 + 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index c177eec..d15a64d 100644 --- a/src/mesa

[Mesa-dev] [PATCH V2 2/8] i965: Use intel_get_tile_dims() to get tile masks

This will require change in the parameters passed to intel_miptree_get_tile_masks(). V2: Rearrange the order of parameters. (Ben) Change the name to intel_get_tile_masks(). (Topi) Cc: Ben Widawsky Cc: Topi Pohjolainen Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.cpp

Re: [Mesa-dev] [Mesa-stable] [PATCH] mesa: update fbo state in glTexStorage

e_fbo_texture(ctx, texObj); > } > } > > -- > 2.1.0 > > ___ > mesa-stable mailing list > mesa-sta...@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-stable LGTM. It'll be nice to have a piglit test for this bug.

Re: [Mesa-dev] [PATCH] mesa: GetTexLevelParameter{if}v changes for OpenGL ES 3.1

IXED_SAMPLE_LOCATIONS: > - if (!ctx->Extensions.ARB_texture_multisample) > + if (!_mesa_is_gles31(ctx) && > !ctx->Extensions.ARB_texture_multisample) > goto invalid_pname; > *params = img->FixedSampleLocations; > break; > -- > 2.1.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/3] i965: Abort tiled_memcpy path for ReadPixels in case of transfer operations

We have a similar check in meta pbo path. Cc: Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 3fe506e..55f6852

[Mesa-dev] [PATCH 3/3] meta: Abort meta pbo path if TexSubImage need signed unsigned conversion

See similar fix for Readpixels in mesa commit 0d20790. Jason suggested we need that for TexSubImage as well. Cc: Cc: Jason Ekstrand Signed-off-by: Anuj Phogat --- src/mesa/drivers/common/meta_tex_subimage.c | 43 + 1 file changed, 25 insertions(+), 18 deletions

[Mesa-dev] [PATCH 2/3] i965: Abort tiled_memcpy path for TexSubImage in case of transfer operations

We have a similar check in meta pbo path. Cc: Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 31e511f

Re: [Mesa-dev] [PATCH] meta: Save/restore compute shaders

> 2.1.4 > > _______ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/3] intel: Move Vulkan sample positions to common code

init_device_state)(struct anv_device *device) > * VkPhysicalDeviceFeatures::standardSampleLocations. > */ > anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) { > - SAMPLE_POS_1X(sp._1xSample); > - SAMPLE_POS_2X(sp._2

Re: [Mesa-dev] [PATCH 3/3] intel/blorp: Stop setting 3DSTATE_DRAWING_RECTANGLE

t;x1, params->x0) - 1; > + rect.ClippedDrawingRectangleYMax = MAX2(params->y1, params->y0) - 1; > + } > + > blorp_exec(batch, params); > > /* Make sure we didn't wrap the batch unintentionally, and make sure we > -- > 2.5.0.400.gff86faf > >

Re: [Mesa-dev] [PATCH 1/4] i965/fs: Use sample interpolation for interpolateAtCentroid in persample mode

On Wed, Sep 14, 2016 at 10:45 AM, Jason Ekstrand wrote: > From the ARB_gpu_shader5 spec: > >The built-in functions interpolateAtCentroid() and interpolateAtSample() >will sample variables as though they were declared with the "centroid" >or "sample" qualifiers, respectively. > > When r

Re: [Mesa-dev] [PATCH 1/4] i965/fs: Use sample interpolation for interpolateAtCentroid in persample mode

On Wed, Sep 14, 2016 at 1:31 PM, Jason Ekstrand wrote: > > > On Wed, Sep 14, 2016 at 1:29 PM, Anuj Phogat wrote: >> >> On Wed, Sep 14, 2016 at 10:45 AM, Jason Ekstrand >> wrote: >> > From the ARB_gpu_shader5 spec: >> > >> >

Re: [Mesa-dev] [PATCH 1/6] mesa: add new entrypoints for GL_OES_viewport_array

esa/main/viewport.h > +++ b/src/mesa/main/viewport.h > @@ -58,8 +58,14 @@ extern void GLAPIENTRY > _mesa_DepthRangeArrayv(GLuint first, GLsizei count, const GLclampd * v); > > extern void GLAPIENTRY > +_mesa_DepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat * v); > + > +extern void GLAPIENTRY > _mesa_DepthRangeIndexed(GLuint index, GLclampd n, GLclampd f); > > +extern void GLAPIENTRY > +_mesa_DepthRangeIndexedfOES(GLuint index, GLfloat n, GLfloat f); > + > extern void > _mesa_set_depth_range(struct gl_context *ctx, unsigned idx, >GLclampd nearval, GLclampd farval); > -- > 2.7.3 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Patches 1-5 are: Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] i965: Rename __DRIScreen pointers to "dri_screen".

signed attachment, unsigned format, > int width, int height) > { > struct intel_buffer *intelBuffer; > - struct intel_screen *intelScreen = screen->driverPrivate; > + struct intel_screen *intelScreen = dri_screen->driverPrivate; > > assert(at

Re: [Mesa-dev] [PATCH] aubinator: Fix the decoding of values that span two Dwords

+ v.dw = ((uint64_t) iter->p[index+1] << 32 ) | iter->p[index]; Omit the white space after 32. > + else > + v.dw = iter->p[index]; > + > switch (f->type.kind) { > case GEN_TYPE_UNKNOWN: > case GEN_TYPE_INT: > -- > 2.7.4 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev With above comments fixed: Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] aubinator: Fix the decoding of values that span two Dwords

On Tue, Sep 20, 2016 at 3:31 PM, Sirisha Gandikota wrote: > From: Sirisha Gandikota > > Fixed the way the values that span two Dwords are decoded. > Based on the start and end indices of the field, the Dwords > are fetched and decoded accordingly. > > v2: rename dw to qw in gen_field_iterator_nex

Re: [Mesa-dev] [PATCH v3] aubinator: Fix the decoding of values that span two Dwords

e, sizeof(iter->value), > - "0x%08lx", field_address(v.dw, f->start, f->end)); > + "0x%08lx", field_address(v.qw, f->start, f->end)); >break; > case GEN_TYPE_STRUCT: >

[Mesa-dev] [PATCH] anv/gen7_pipeline: Use MSDISPMODE_PERSAMPLE for non-multisampled fbo

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 878308b..5150ef9 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan

[Mesa-dev] [PATCH] i965/gen8+: Enable GL_OES_viewport_array

Signed-off-by: Anuj Phogat --- This patch requires below series: https://patchwork.freedesktop.org/series/12594/ --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH] intel/isl: Add an assert to check zero width/height surface

Signed-off-by: Anuj Phogat --- src/intel/isl/isl_surface_state.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 1a1a819..b20f767 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl

[Mesa-dev] [PATCH] anv/blorp: Handle zero width/height copying in copy_buffer_to_image

Signed-off-by: Anuj Phogat --- src/intel/vulkan/anv_blorp.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index cb61070..de33dce 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -273,6 +273,10

Re: [Mesa-dev] [PATCH] anv/gen7_pipeline: Use MSDISPMODE_PERSAMPLE for non-multisampled fbo

ics spec for gen7. Also look at gen7_wm_state.c. > > On Sep 21, 2016 9:14 PM, "Anuj Phogat" wrote: >> >> Signed-off-by: Anuj Phogat >> --- >> src/intel/vulkan/gen7_pipeline.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> &

Re: [Mesa-dev] [PATCH] anv/blorp: Handle zero width/height copying in copy_buffer_to_image

> > On Wed, Sep 21, 2016 at 11:17:08AM -0700, Anuj Phogat wrote: >> Signed-off-by: Anuj Phogat >> --- >> src/intel/vulkan/anv_blorp.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.

[Mesa-dev] [PATCH V2] anv/blorp: Handle zero width/height blits in blorp_copy()

V2: Move the check from copy_buffer_to_image() to blorp_copy(). (Nanley) Signed-off-by: Anuj Phogat Cc: Nanley Chery --- src/intel/blorp/blorp_blit.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index

Re: [Mesa-dev] [PATCH] i965: Only emit 1 viewport when possible.

8_viewport_state.c > b/src/mesa/drivers/dri/i965/gen8_viewport_state.c > index acaee1a..84000e3 100644 > --- a/src/mesa/drivers/dri/i965/gen8_viewport_state.c > +++ b/src/mesa/drivers/dri/i965/gen8_viewport_state.c > @@ -37,8 +37,11 @@ gen8_upload_sf_clip_viewport(struct brw_context *brw) > const

Re: [Mesa-dev] [PATCH] i965: Remove useless (harmful) assertion

assert(brw->gen >= 6 && brw->gen <= 9); > + assert(brw->gen >= 6); > > /* Starting on BDW, these pipe controls are unnecessary. > * > -- > 2.10.0 > > ___ > mesa-dev mailing

Re: [Mesa-dev] [PATCH] anv/gen7_pipeline: Use MSDISPMODE_PERSAMPLE for non-multisampled fbo

On Wed, Sep 21, 2016 at 12:49 PM, Anuj Phogat wrote: > On Wed, Sep 21, 2016 at 11:49 AM, Jason Ekstrand wrote: >> This seems odd... When can it even happen that we have persample_dispatch >> set in wm_surface_state and have only one sample? Does this fix a test >> case? >

Re: [Mesa-dev] [PATCH] i965/gen8+: Enable GL_OES_viewport_array

On Thu, Sep 22, 2016 at 5:59 PM, Ilia Mirkin wrote: > On Wed, Sep 21, 2016 at 2:15 PM, Anuj Phogat wrote: >> Signed-off-by: Anuj Phogat >> >> --- >> This patch requires below series: >> https://patchwork.freedesktop.org/series/12594/ > > FYI, this is n

[Mesa-dev] [PATCH 3/3] i965/gen8+: Enable GL_OES_viewport_array

iewport bounds range [min, max] tuple may be determined by calling GetFloatv with the symbolic constant VIEWPORT_BOUNDS_RANGE_OES" I will open a khronos CTS bug to get the test fixed. V2: Initialize the relevant variables for GL_OES_viewport_array on hsw+ Signed-off-by: Anuj Phogat Cc: Ilia

[Mesa-dev] [PATCH 2/3] mesa: Add a check for OES_viewport_array

Signed-off-by: Anuj Phogat Cc: Ilia Mirkin --- src/mesa/main/viewport.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/main/viewport.c b/src/mesa/main/viewport.c index f59723f..bd58044 100644 --- a/src/mesa/main/viewport.c +++ b/src/mesa/main/viewport.c @@ -52,7

[Mesa-dev] [PATCH 1/3] mesa: Enable enums for OES_viewport_array

Signed-off-by: Anuj Phogat Cc: Ilia Mirkin --- src/mesa/main/get.c | 6 ++ src/mesa/main/get_hash_params.py | 8 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index e7ebc7f..64a4b0e 100644 --- a/src/mesa/main

Re: [Mesa-dev] [PATCH 1/3] mesa: Enable enums for OES_viewport_array

On Thu, Sep 29, 2016 at 11:45 AM, Ilia Mirkin wrote: > 2016-09-29 14:42 GMT-04:00 Anuj Phogat : >> Signed-off-by: Anuj Phogat >> Cc: Ilia Mirkin >> --- >> src/mesa/main/get.c | 6 ++ >> src/mesa/main/get_hash_params.py | 8 >>

Re: [Mesa-dev] [PATCH] mesa: move _mesa_valid_to_render() to api_validate.c

(!_mesa_sampler_uniforms_are_valid(ctx->_Shader->ActiveProgram, > -errMsg, 100)) { > - _mesa_error(ctx, GL_INVALID_OPERATION, "%s", errMsg); > - return GL_FALSE; > - } > - } > - > - if (ctx->DrawBuffer->_Status != GL_FRAME

[Mesa-dev] [PATCH 2/9] intel/genxml: Keep the value name 'Alternate' uniform across gen75.xml

Signed-off-by: Anuj Phogat --- src/intel/genxml/gen75.xml | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index 8e18007..b8f5a14 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -1365,7

[Mesa-dev] [PATCH 3/9] anv/gen8_pipeline: Fix typo in semicolon

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen8_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index 030f71e..1abb97c 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan

[Mesa-dev] [PATCH 6/9] anv/gen7_pipeline: Set few missing fields in 3DSTATE_VS

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 8d133b6..f98aef5 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan

[Mesa-dev] [PATCH 5/9] anv/gen7: Make use of local variable prog_data

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen7_vs_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c index 57e0419..d3bd9fd 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 1/9] intel/genxml: Fix typo in gen75.xml

Signed-off-by: Anuj Phogat --- src/intel/genxml/gen75.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index 1debc3a..8e18007 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -1571,7 +1571,7

[Mesa-dev] [PATCH 8/9] anv/gen7_pipeline: Set few missing fields in 3DSTATE_PS

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 9411631..4bab0bc 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c

[Mesa-dev] [PATCH 9/9] anv/gen7_pipeline: Check for ksp0 when setting BarycentricInterpolationMode in 3DSTATE_WM

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 4bab0bc..e804002 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan

[Mesa-dev] [PATCH 7/9] anv/gen7_pipeline: Move ksp{1, 2} state setting next to ksp0

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index f98aef5..9411631 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan

[Mesa-dev] [PATCH 4/9] anv/gen8_pipeline: Use Alternate floating point mode when use_alt_mode is set in prog_data

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen8_pipeline.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index 1abb97c..7a9a3cf 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan

Re: [Mesa-dev] [PATCH 3/3] mesa: make _mesa_texture_buffer_range() static

struct gl_buffer_object *bufObj, > - GLintptr offset, GLsizeiptr size, > - const char *caller); > - > bool > _mesa_is_cube_map_texture(GLenum target); > > -- > 1.9.1 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Series is: Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/9] anv/gen8_pipeline: Use Alternate floating point mode when use_alt_mode is set in prog_data

On Sun, Oct 2, 2016 at 1:59 PM, Kenneth Graunke wrote: > On Friday, September 30, 2016 3:33:12 PM PDT Anuj Phogat wrote: >> Signed-off-by: Anuj Phogat >> --- >> src/intel/vulkan/gen8_pipeline.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >>

[Mesa-dev] [PATCH V2 8/9] anv/gen7_pipeline: Set sample mask field in 3DSTATE_PS

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 9411631..bafee28 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c

Re: [Mesa-dev] [PATCH 9/9] anv/gen7_pipeline: Check for ksp0 when setting BarycentricInterpolationMode in 3DSTATE_WM

On Fri, Sep 30, 2016 at 5:03 PM, Jason Ekstrand wrote: > On Sep 30, 2016 3:34 PM, "Anuj Phogat" wrote: >> >> Signed-off-by: Anuj Phogat >> --- >> src/intel/vulkan/gen7_pipeline.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >

Re: [Mesa-dev] [PATCH 8/9] anv/gen7_pipeline: Set few missing fields in 3DSTATE_PS

On Fri, Sep 30, 2016 at 5:02 PM, Jason Ekstrand wrote: > On Sep 30, 2016 3:34 PM, "Anuj Phogat" wrote: >> >> Signed-off-by: Anuj Phogat >> --- >> src/intel/vulkan/gen7_pipeline.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff

[Mesa-dev] [PATCH] anv/gen7_pipeline: Fix typo in semicolon

Signed-off-by: Anuj Phogat --- src/intel/vulkan/gen7_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index bafee28..c9d1f64 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan

Re: [Mesa-dev] [PATCH] aubinator: use the correct format specifier for printing ptrdiff_t.

gt; > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/l3: Remove redundant is_cherryview check

t == 1) > + /* XXX: Cherryview and Broxton are always gt1 */ > + else if (devinfo->gt == 1) >return 4; > > else > -- > 2.10.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lis

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