On Tue, Sep 27, 2016 at 3:02 PM, Ben Widawsky
<benjamin.widaw...@intel.com> wrote:
> From: Ben Widawsky <b...@bwidawsk.net>
>
> The code already skips doing the depth stall on gen >= 8, and as we
> enable new platforms this assertion will fail needlessly. Instead of
> changing the caller, make this simple change.
>
> Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
> ---
> src/mesa/drivers/dri/i965/brw_pipe_control.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c
> b/src/mesa/drivers/dri/i965/brw_pipe_control.c
> index 358d31d..c7e3b3c 100644
> --- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
> +++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
> @@ -253,7 +253,7 @@ brw_emit_pipe_control_write(struct brw_context *brw,
> uint32_t flags,
> void
> brw_emit_depth_stall_flushes(struct brw_context *brw)
> {
> - assert(brw->gen >= 6 && brw->gen <= 9);
> + assert(brw->gen >= 6);
>
> /* Starting on BDW, these pipe controls are unnecessary.
> *
> --
> 2.10.0
>
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Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com>
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