Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index edd7518..6ac4024 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -194,9 +194,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context
*brw,
const unsigned align_3d_ys[] = {32, 32, 32, 16, 16};
int i = 0;
- assert(brw->gen >= 9 &&
- mt->target != GL_TEXTURE_1D &&
- mt->target != GL_TEXTURE_1D_ARRAY);
+ assert(brw->gen >= 9);
/* Alignment computations below assume bpp >= 8 and a power of 2. */
assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp)) ;
@@ -216,8 +214,10 @@ tr_mode_vertical_texture_alignment(const struct
brw_context *brw,
align_yf = align_3d_yf;
align_ys = align_3d_ys;
break;
+ case GL_TEXTURE_1D:
+ case GL_TEXTURE_1D_ARRAY:
default:
- unreachable("not reached");
+ unreachable("Unexpected miptree target");
}
/* Compute array index. */
--
2.4.3
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