[PATCH] testsuite: fixup tbaa test again

Test was broken until r15-4684-g2d1d6be00257c5 which made it actually run and r15-4685-g091e45b4e97d1e which applied fixes other than the trivial rename. But more is needed: this gets the test working properly in terms of scanning the dump and handling the interaction w/ LTO with not producing an

Re: [PATCH] Add 'cobol' to Makefile.def, take 2

On Sun, 2024-10-13 at 20:44 -0400, James K. Lowden wrote: /* snip */ > In testing the patch with "git am" Please also use "git gcc-verify". See below for the incorrect changelog which would be caught by the command. > I got a warning about a blank line > at EOF, but I couldn't figure out where

Re: [PATCH v4 1/2] Match: Simplify (x != 0 ? x + ~0 : 0) to (x - x != 0).

On Thu, Oct 24, 2024 at 6:22 PM Li Xu wrote: > > From: xuli > > When the imm operand op1=1 in the unsigned scalar sat_sub form2 below, > we can simplify (x != 0 ? x + ~0 : 0) to (x - x != 0), thereby eliminating > a branch instruction.This simplification also applies to signed integer. > > Form2:

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, 25 Oct 2024, Arsen Arsenović wrote: > Maybe we should go the other way around? Compressing eight spaces into > a tab leads to strange artifacts in diffs (where lines appear > misindented because some were aligned by tabs and some by spaces), and I also agree that spaces are preferable (g

RE: [PATCH 4/5] RISC-V: Implement the MASK_LEN_STRIDED_LOAD{STORE}

> Nit, space before '('. > LGTM with that fixed and once the middle-end changes are in. Got it, thanks Robin. Pan -Original Message- From: Robin Dapp Sent: Friday, October 25, 2024 11:56 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: richard.guent...@gmail.com; tamar.christ...@arm.com;

[PATCH] testsuite: add testcase for fixed PR107467

PR107467 ended up being fixed by the fix for PR115110, but let's add the testcase on top. gcc/testsuite/ChangeLog: PR tree-optimization/107467 PR middle-end/115110 * g++.dg/lto/pr107467_0.C: New test. --- OK? gcc/testsuite/g++.dg/lto/pr107467_0.C | 52 +++

[COMMITTED 8/8] testsuite: lto: fix pr47333 test

This failure was hidden until we started to run the test by fixing the filename earlier: ignore -Wtemplate-body using a pragma like e.g. g++.dg/lto/20101010-1_0.C does because lto.exp doesn't support dg-additional-options. gcc/testsuite/ChangeLog: PR lto/47333 * g++.dg/lto/pr47333

[COMMITTED 1/8] testsuite: lto: rename pr95677 test

This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677.C: Move to... * g++.dg/lto/pr95677_0.C: ...here. --- gcc/testsuite/g++.dg/lto/{pr95677.C => pr95677_0.C} | 0 1 file changed, 0 insertions(+), 0 deletions(-

PING^2: [PATCH] sibcall: Adjust BLKmode argument size for alignment padding

On Sun, Oct 20, 2024 at 6:42 AM H.J. Lu wrote: > > On Sun, Oct 13, 2024, 10:07 AM H.J. Lu wrote: >> >> Adjust BLKmode argument size for parameter alignment for sibcall check. >> >> gcc/ >> >> PR middle-end/117098 >> * calls.cc (store_one_arg): Adjust BLKmode argument size for >> alignment padding

[PATCH 2/3] testsuite: move single-file LTO pr95677 test to torture

This only started being used recently in r15-4681-g96110c14cf61a1 and pinskia pointed out we may as well make it a proper torture test instead as it's a single file LTO test. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677_0.C: Move to... * g++.dg/torture/pr9567

libbacktrace patch committed: Recognize new Mach-O DWARF sections

This patch by Pavel Safonov recognizes the new DWARF section names used on macos Sequoia. Bootstrapped and ran libbacktrace tests on x86_64-pc-linux-gnu. Committed to mainline. Ian * macho.c (dwarf_section_names): Add __debug_addr and __debug_line_str. d97243588c8b5cbe8b657fd51f08038c42c81908 d

[PATCH 0/3] Move some single-file LTO tests to torture

Andrew pointed this out when committing those testsuite fixes earlier. We may as well make these proper torture tests rather than having them unnecessarily in the special lto/ dir which is meant for multiple files really. Sam James (3): testsuite: move single-file LTO pr62026 test to torture t

Re: [PATCH] simplify-rtx: Handle `a != 0 ? -a : 0` [PR58195]

On Wed, Oct 23, 2024 at 8:38 PM Jeff Law wrote: > > > > On 10/20/24 3:18 PM, Andrew Pinski wrote: > > The gimple (and generic) levels have this optmization since > > r12-2041-g7d6979197274a662da7bdc5. > > It seems like a good idea to add a similar one to rtl just in case it is > > not caught at

[PATCH 2/11] Use architecture flags for defining _ARCH_PWR macros.

For the newer architectures, this patch changes GCC to define the _ARCH_PWR macros using the new architecture flags instead of relying on isa options like -mpower10. The -mpower8-internal, -mpower10, and -mpower11 options were removed. The -mpower11 option was removed completely, since it was jus

Re: [PATCH 1/3] testsuite: move single-file LTO pr62026 test to torture

On Fri, Oct 25, 2024 at 3:08 PM Sam James wrote: > > This only started being used recently in r15-4682-g03ff420aa0a916 and > pinskia pointed out we may as well make it a proper torture test > instead as it's a single file LTO test. > > gcc/testsuite/ChangeLog: > PR lto/62026 > > *

Re: [PATCH v17 2/2] c: Add __countof__ operator

Hi Joseph, On Fri, Oct 25, 2024 at 08:44:15PM GMT, Joseph Myers wrote: > I don't see the use of pedwarn_c23 and associated tests (error with > -std=c23 -pedantic-errors, warning with -std=c23 -pedantic, no diagnostic > with -std=c23 -pedantic-errors -Wno-c23-c2y-compat, no diagnostic with > -st

[PATCH 1/3] testsuite: move single-file LTO pr62026 test to torture

This only started being used recently in r15-4682-g03ff420aa0a916 and pinskia pointed out we may as well make it a proper torture test instead as it's a single file LTO test. gcc/testsuite/ChangeLog: PR lto/62026 * g++.dg/lto/pr62026_0.C: Move to... * g++.dg/torture/pr6202

[PATCH 3/3] testsuite: move single-file LTO pr47333 test to torture

This only started being used recently in r15-4683-g04e0fbbc34e101 and pinskia pointed out we may as well make it a proper torture test instead as it's a single file LTO test. gcc/testsuite/ChangeLog: PR target/47333 * g++.dg/lto/pr47333_0.C: Move to... * g++.dg/torture/pr4

[COMMITTED 5/8] testsuite: lto: fix tbaa_0 test

These failures were hidden until we started to run the test by fixing the filename earlier: use dg-lto directives, pass -std=gnu89 for implicit-int, and use -flto-partition=none like c-c++-common/hwasan/builtin-special-handling.c. gcc/testsuite/ChangeLog: * gcc.dg/lto/tbaa_0.c: Use dg-lt

[COMMITTED 4/8] testsuite: lto: rename tbaa-1 test

This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: * gcc.dg/lto/tbaa-1.c: Move to... * gcc.dg/lto/tbaa_0.c: ...here. --- gcc/testsuite/gcc.dg/lto/{tbaa-1.c => tbaa_0.c} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename gcc/testsuite/gcc.d

[COMMITTED 6/8] testsuite: lto: fix pr95677 test

These failures were hidden until we started to run the test by fixing the filename earlier: use dg-lto directives. gcc/testsuite/ChangeLog: PR c++/95677 * g++.dg/lto/pr95677_0.C: Use dg-lto-*. --- gcc/testsuite/g++.dg/lto/pr95677_0.C | 5 ++--- 1 file changed, 2 insertions(+), 3

[COMMITTED 7/8] testsuite: lto: fix pr62026 test

This failure was hidden until we started to run the test by fixing the filename earlier: pass -Wno-return-type. gcc/testsuite/ChangeLog: PR lto/62026 * g++.dg/lto/pr62026_0.C: Pass -Wno-return-type. --- gcc/testsuite/g++.dg/lto/pr62026_0.C | 2 +- 1 file changed, 1 insertion(+),

[COMMITTED 3/8] testsuite: lto: rename pr47333 test

This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR target/47333 * g++.dg/lto/pr47333.C: Move to... * g++.dg/lto/pr47333_0.C: ...here. --- gcc/testsuite/g++.dg/lto/{pr47333.C => pr47333_0.C} | 0 1 file changed, 0 insertions(+), 0 deletion

[COMMITTED 2/8] testsuite: lto: rename pr62026 test

This was being ignored previously. Rename it per README. gcc/testsuite/ChangeLog: PR lto/62026 * g++.dg/lto/pr62026.C: Move to... * g++.dg/lto/pr62026_0.C: ...here. --- gcc/testsuite/g++.dg/lto/{pr62026.C => pr62026_0.C} | 0 1 file changed, 0 insertions(+), 0 deletions(-

Re: [PATCH v17 2/2] c: Add __countof__ operator

I don't see the use of pedwarn_c23 and associated tests (error with -std=c23 -pedantic-errors, warning with -std=c23 -pedantic, no diagnostic with -std=c23 -pedantic-errors -Wno-c23-c2y-compat, no diagnostic with -std=c2y -pedantic-errors, warning with -std=c2y -pedantic-errors -Wc23-c2y-compat

[PATCH 9/11] Update tests to work with architecture flags changes.

Two tests used -mvsx to raise the processor level to at least power7. These tests were rewritten to add cpu=power7 support. I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test case that used every archiecture define

Re: [PATCH] testsuite: add testcase for fixed PR107467

Sam James writes: > PR107467 ended up being fixed by the fix for PR115110, but let's > add the testcase on top. > > gcc/testsuite/ChangeLog: > PR tree-optimization/107467 > PR middle-end/115110 > > * g++.dg/lto/pr107467_0.C: New test. > --- > OK? > > gcc/testsuite/g++.dg/lto/pr

[PATCH 7/11] Change TARGET_POPCNTD to TARGET_POWER7

As part of the architecture flags patches, this patch changes the use of TARGET_POPCNTD to TARGET_POWER7. The POPCNTD instruction was added in power7 (ISA 2.06). I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test ca

Re: [PATCH] c, v2: Add __builtin_stdc_rotate_{left, right} builtins [PR117030]

On Thu, 24 Oct 2024, Jakub Jelinek wrote: > + if (TYPE_UNSIGNED (TREE_TYPE (arg2)) > + || sanitize_flags_p (SANITIZE_SHIFT)) > + arg2 = build2_loc (loc, TRUNC_MOD_EXPR, TREE_TYPE (arg2), > + arg2, build_int_cst (TREE_TYPE (

[PATCH 11/11] Add -mcpu=future tuning support.

This patch makes -mtune=future use the same tuning decision as -mtune=power11. 2024-10-25 Michael Meissner gcc/ * config/rs6000/power10.md (all reservations): Add future as an alterntive to power10 and power11. --- gcc/config/rs6000/power10.md | 144 +-

[PATCH 3/11] Do not allow -mvsx to boost processor to power7.

This patch restructures the code so that -mvsx for example will not silently convert the processor to power7. The user must now use -mcpu=power7 or higher. This means if the user does -mvsx and the default processor does not have VSX support, it will be an error. I have built both big endian and

[PATCH 1/11] Add rs6000 architecture masks.s

This patch begins the journey to move architecture bits that are not user ISA options from rs6000_isa_flags to a new targt variable rs6000_arch_flags. The intention is to remove switches that are currently isa options, but the user should not be using this particular option. For example, we want u

[PATCH 10/11] Add support for -mcpu=future

This patch adds the support that can be used in developing GCC support for future PowerPC processors. 2024-10-25 Michael Meissner * config.gcc (powerpc*-*-*): Add support for --with-cpu=future. * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=future. * conf

[PATCH 8/11] Change TARGET_MODULO to TARGET_POWER9

As part of the architecture flags patches, this patch changes the use of TARGET_MODULO to TARGET_POWER9. The modulo instructions were added in power9 (ISA 3.0). Note, I did not change the uses of TARGET_MODULO where it was explicitly generating different code if the machine had a modulo instruct

[PATCH 6/11] Change TARGET_CMPB to TARGET_POWER6

As part of the architecture flags patches, this patch changes the use of TARGET_CMPB to TARGET_POWER6. The CMPB instruction was added in power6 (ISA 2.05). I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test case tha

[PATCH 5/11] Change TARGET_FPRND to TARGET_POWER5X

As part of the architecture flags patches, this patch changes the use of TARGET_FPRND to TARGET_POWER5X. The FPRND instruction was added in power5+. I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test case that used

[PATCH 4/11] Change TARGET_POPCNTB to TARGET_POWER5

As part of the architecture flags patches, this patch changes the use of TARGET_POPCNTB to TARGET_POWER5. The POPCNTB instruction was added in ISA 2.02 (power5). I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test ca

Re: [RFC PATCH] c-family: -Wleading-whitespace= argument spelling

On Fri, 25 Oct 2024, Jakub Jelinek wrote: > Hi! > > On Thu, Oct 24, 2024 at 03:33:25PM -0400, Eric Gallager wrote: > > On Thu, Oct 24, 2024 at 4:17 AM Jakub Jelinek wrote: > > > I've tried to build stage3 with > > > -Wleading-whitespace=blanks -Wtrailing-whitespace=blank > > > -Wno-error=leadin

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

Sam James writes: > IMO these (already-committed other) whitespace changes mean we should > already consider a .git-blame-ignore-revs file at the root of the repo. > > We would list any large whitespace changes in there. > > Users would have to run 'git config blame.ignoreRevsFile > .git-blame-ig

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

Jakub Jelinek writes: > On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: >> Maybe we should go the other way around? Compressing eight spaces into >> a tab leads to strange artifacts in diffs (where lines appear >> misindented because some were aligned by tabs and some by spaces)

[PATCH 0/11] Separate PowerPC architecture bits from ISA flags that use command line options

These patches are a clean up in the PowerPC port to move architecture bits that are not user ISA options from rs6000_isa_flags to a new targt variable rs6000_arch_flags. The intention is to remove switches that are currently isa options, but the user should not be using this particular option. For

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

Jonathan Wakely writes: > On Fri, 25 Oct 2024 at 12:54, Jakub Jelinek wrote: >> >> On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: >> > Maybe we should go the other way around? Compressing eight spaces into >> > a tab leads to strange artifacts in diffs (where lines appear >> >

Re: [PATCH] toplevel: Error out if using --disable-libstdcxx with bootstrap [PR105474]

On Thu, 24 Oct 2024, Andrew Pinski wrote: > On Thu, Sep 19, 2024 at 3:55 PM Andrew Pinski wrote: > > > > On Thu, Aug 22, 2024 at 2:45 PM Andrew Pinski > > wrote: > > > > > > Bootstrapping and using --disable-libstdcxx will cause a build failure > > > deep in compiling > > > stage2 so instead e

[PATCH v2 2/5] arm: [MVE intrinsics] Add load_ext intrinsic shape

From: Alfie Richards This patch adds the extending load shape. It also adds/fixes comments for the load and store shapes. 2024-09-11 Alfie Richards Christophe Lyon gcc/ * config/arm/arm-mve-builtins-shapes.cc: (load_ext): New. * config/arm/arm-mve

[PATCH v2 5/5] arm: [MVE intrinsics] Rework MVE vld/vst intrinsics

From: Alfie Richards Implement the mve vld and vst intrinsics using the MVE builtins framework. The main part of the patch is to reimplement to vstr/vldr patterns such that we now have much fewer of them: - non-truncating stores - predicated non-truncating stores - truncating stores - predicated

[PATCH v2 4/5] arm: [MVE intrinsics] Add support for predicated contiguous loads and stores

From: Alfie Richards This patch extends function_expander::use_contiguous_load_insn and function_expander::use_contiguous_store_insn functions to support predicated versions. 2024-09-11 Alfie Richards Christophe Lyon gcc/ * config/arm/arm-mve-builtins.cc

[PATCH v2 1/5] arm: [MVE intrinsics] fix vst tests

From: Alfie Richards The tests for vst* instrinsics use functions which return a void expression which can generate a warning. This hasn't come up previously as the inlining presumably prevents the warning. This change removed the uneccessary and incorrect returns. 2024-09-11 Alfie Richards

[PATCH v2 3/5] arm: [MVE intrinsics] Add load_extending and store_truncating function bases

From: Alfie Richards This patch adds the load_extending and store_truncating function bases for MVE intrinsics. The constructors have parameters describing the memory element type/width which is part of the function base name (e.g. "h" in vldrhq). 2024-09-11 Alfie Richards gcc/

[PATCH v2 0/5] arm, MVE: Refactor the vst and vld intrinsics

Changes v1->v2: - patch 3/5: fixed indentation - patch 5/5: moved new patterns higher in mve.md, at the point where the first deleted pattern was. Due to the multiple refactoring, it is not convenient to move some of the new patterns later in the file since the new ones combine several old o

Re: [PATCH] Fix tab after space in leading whitespace

On Fri, 25 Oct 2024 at 12:10, Jakub Jelinek wrote: > > Hi! > > The following patch fixes 2 -Wleading-whitespace=blanks issues in gcc/, > include/, libiberty/, libcpp/, libgcc/ and libstdc++-v3/ > One is the > ../../gcc/c/c-typeck.cc:196:1: warning: whitespace other than spaces and tabs > in leadi

Re: [PATCH] c++: Implement P2662R3, Pack Indexing [PR113798]

On 10/24/24 4:29 PM, Patrick Palka wrote: On Wed, 23 Oct 2024, Jason Merrill wrote: On 10/23/24 10:20 AM, Patrick Palka wrote: On Tue, 22 Oct 2024, Marek Polacek wrote: Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? -- >8 -- This patch implements C++26 Pack Indexing, as descri

Re: [PATCH] testsuite: add testcase for fixed PR115933

Jeff Law writes: > On 10/20/24 1:33 AM, Sam James wrote: >> gcc/testsuite/ChangeLog: >> PR rtl-optimization/115933 >> * gcc.dg/pr115933.c: New test. > OK > jeff Thanks Jeff, pushed.

Re: [PATCH] c++: Attempt to implement C++26 P3034R1 - Module Declarations Shouldn't be Macros [PR114461]

On 8/8/24 4:44 AM, Jakub Jelinek wrote: This is an attempt to implement the https://wg21.link/p3034r1 paper, but I'm afraid the wording in the paper is bad for multiple reasons. I think I understand the intent, that the module name and partition if any shouldn't come from macros so that they can

Re: [PATCH] AArch64: Add more accurate constraint [PR117292]

Wilco Dijkstra writes: > As shown in the PR, reload may only check the constraint in some cases and > and not check the predicate is still valid for the resulting instruction. Yeah, that's by design. constraints have to accept a subset of the predicates. > To fix the issue, add a new constraint

Re: [PATCH 4/5] RISC-V: Implement the MASK_LEN_STRIDED_LOAD{STORE}

> +(define_expand "mask_len_strided_store_" > + [(match_operand 0 "pmode_reg_or_0_operand") > + (match_operand 1 "pmode_reg_or_0_operand") > + (match_operand:V 2 "register_operand") > + (match_operand: 3 "vector_mask_operand") > + (match_operand 4 "autovec_length_ope

Re: [PATCH 5/5] RISC-V: Add testcases for form 1 of MASK_LEN_STRIDED_LOAD{STORE}

OK. -- Regards Robin

[PATCH] AArch64: Add more accurate constraint [PR117292]

As shown in the PR, reload may only check the constraint in some cases and and not check the predicate is still valid for the resulting instruction. To fix the issue, add a new constraint which matches the predicate exactly. Passes regress & bootstrap, OK for commit? gcc/ChangeLog: PR ta

Re: [PATCH 3/5] RISC-V: Adjust the gather-scatter testcases due to middle-end change

> After we have MASK_LEN_STRIDED_LOAD{STORE} in the middle-end, the > strided case need to be adjust for IR check. OK once the middle-end changes are in. -- Regards Robin

Re: [PATCH 1/2] libstdc++: Implement C++23 (P0429R9)

On Wed, 16 Oct 2024, Patrick Palka wrote: > On Mon, 30 Sep 2024, Patrick Palka wrote: > > > This implements the C++23 container adaptors std::flat_map and > > std::flat_multimap from P0429R9. The implementation is shared > > as much as possible between the two adaptors via a common base > > clas

[PATCH #7/7] handle TRUTH_ANDIF cond exprs in ifcombine_replace_cond (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

The upcoming move of fold_truth_andor to ifcombine brings with it the possibility of TRUTH_ANDIF cond exprs. Handle them by splitting the cond so as to best use both BB insertion points, but only if they're contiguous. for gcc/ChangeLog * tree-ssa-ifcombine.c (ifcombine_replace_cond)

Re: [PATCH] Add 'cobol' to Makefile.def, take 2

On Thu, 24 Oct 2024 12:01:10 -0400 "James K. Lowden" wrote: > They are not. With --enable-generated-files-in-srcdir, the build > fails. What do I need to do to fix it? I haven't the faintest idea. I believe I found it: diff --git a/gcc/cobol/Make-lang.in b/gcc/cobol/Make-lang.in index 6a57

Re: [PATCH] Further use of mod_scope in modified_type_die

> "Tom" == Tom Tromey writes: Tom> I am working on some changes to GNAT to emit hierarchical DWARF -- Tom> i.e., where entities will have simple names nested in a DW_TAG_module. Tom> While working on this I found a couple of paths in modified_type_die Tom> where "mod_scope" should be used, b

Re: [PATCH 2/2] c++/modules: Retrofit imported partial specs over existing implicit instantiations [PR113814]

On 10/24/24 5:10 PM, Nathaniel Shead wrote: On Thu, Oct 24, 2024 at 12:05:18PM -0400, Jason Merrill wrote: On 10/24/24 3:25 AM, Nathaniel Shead wrote: I wasn't sure whether I should include the ambiguity checking logic from process_partial_specialization; we don't do this anywhere else in the m

[PATCH] libstdc++: Fix complexity of drop_view::begin const [PR112641]

Tested on x86_64-pc-linux-gnu, does this look OK for trunk/backports? Also available in PR form at https://forge.sourceware.org/gcc/gcc-TEST/pulls/8 -- >8 -- Views are required to have a amortized O(1) begin(), but our drop_view's const begin overload is O(n) for non-common ranges. This patch re

[PATCH #5/7] extend ifcombine_replace_cond to handle noncontiguous ifcombine (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

Prepare to handle noncontiguous ifcombine, introducing logic to modify the outer condition when needed. There are two cases worth mentioning: - when blocks are noncontiguous, we have to place the combined condition in the outer block to avoid pessimizing carefully crafted short-circuited te

[PATCH #6/7] ifcombine across noncontiguous blocks (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

Rework ifcombine to support merging conditions from noncontiguous blocks. This depends on earlier preparation changes. The function that attempted to ifcombine a block with its immediate predecessor, tree_ssa_ifcombine_bb, now loops over dominating blocks eligible for ifcombine, attempting to c

[PATCH #3/7] introduce ifcombine_replace_cond (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

Refactor ifcombine_ifandif, moving the common code from the various paths that apply the combined condition to a new function. for gcc/ChangeLog * tree-ssa-ifcombine.cc (ifcombine_replace_cond): Factor out of... (ifcombine_ifandif): ... this. --- gcc/tree-ssa-ifcombin

[PATCH #4/7] adjust update_profile_after_ifcombine for noncontiguous ifcombine (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

Prepare for ifcombining noncontiguous blocks, adding (still unused) logic to the ifcombine profile updater to handle such cases. for gcc/ChangeLog * tree-ssa-ifcombine.cc (known_succ_p): New. (update_profile_after_ifcombine): Handle noncontiguous blocks. --- gcc/tree-ssa-ifco

[PATCH #2/7] drop redundant ifcombine_ifandif parm (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

In preparation to changes that may modify both inner and outer conditions in ifcombine, drop the redundant parameter result_inv, that is always identical to inner_inv. for gcc/ChangeLog * tree-ssa-ifcombine.cc (ifcombine_ifandif): Drop redundant result_inv parm. Adjust all ca

[PATCH #1/7] allow vuses in ifcombine blocks (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

Disallowing vuses in blocks for ifcombine is too strict, and it prevents usefully moving fold_truth_andor into ifcombine. That tree-level folder has long ifcombined loads, absent other relevant side effects. for gcc/ChangeLog * tree-ssa-ifcombine.c (bb_no_side_effects_p): Allow vuses

Re: [PATCH] fold fold_truth_andor field merging into ifcombine

On Oct 22, 2024, Richard Biener wrote: > On Mon, Oct 21, 2024 at 4:30 AM Alexandre Oliva wrote: >> >> On Oct 10, 2024, Richard Biener wrote: >> >> > As you special-case hard register uses, do we want to ever make >> > hard-register >> > uses or defs unconditional? I'll note that on GIMPLE h

[PATCH #0/7] noncontiguous ifcombine patchset (was: Re: [PATCH] fold fold_truth_andor field merging into ifcombine)

I've just posted 7 patches related with the implementation of noncontiguous ifcombine. They've been regstrapped together on x86_64-linux-gnu, and each patch has been tested to build on top of the previous on. Patches #1, #2 and #3 are preparatory patches that stand on their own. Patches #4, #5 a

Re: [PATCH 2/8] aarch64: Add new +fcma flag

On 08/10/2024 17:18, Richard Sandiford wrote: Andrew Carlotti writes: This includes +fcma as a dependency of +sve, and means that we can finally support fcma intrinsics on a64fx. Also add fcma to the Features list in several cpunative testcases that incorrectly included sve without fcma. g

Re: [PATCH] Add 'cobol' to Makefile.def, take 2

On Wed, 23 Oct 2024 15:12:19 +0200 Richard Biener wrote: > Note there's --enable-generated-files-in-srcdir specifically to remove > yacc and flex - can you check whether with this configure flag those > files are generated in the source directory and thus picked up when > building the release tar

[PATCH 3/3] Assert finished vectorizer pattern COND_EXPR transition

The following places a few strathegic asserts so we do not end up with COND_EXPRs with a comparison as the first operand during vectorization. Bootstrap and regtest running on x86_64-unknown-linux-gnu. These are the asserts I'd like to keep, I will followup with quite some dead code removal when

Re: counted_by attribute and type compatibility

> On Oct 25, 2024, at 08:13, Martin Uecker wrote: > >>> I agree, and error makes sense. What worries me a little bit >>> is tying this to a semantic change in type compatibility. >>> >>> typedef struct foo { int n; int m; >>> [[gnu::counted_by(n)]] char buf[]; } aaa_t; >>> >>> void foo() >>

Re: [PATCH] match.pd: Add std::pow folding optimizations.

> On 25 Oct 2024, at 14:39, Richard Biener wrote: > > External email: Use caution opening links or attachments > > > On Wed, 23 Oct 2024, Jennifer Schmitz wrote: > >> >> >>> On 22 Oct 2024, at 13:14, Richard Biener wrote: >>> >>> External email: Use caution opening links or attachments >

[RFC PATCH] c-family: -Wleading-whitespace= argument spelling

Hi! On Thu, Oct 24, 2024 at 03:33:25PM -0400, Eric Gallager wrote: > On Thu, Oct 24, 2024 at 4:17 AM Jakub Jelinek wrote: > > I've tried to build stage3 with > > -Wleading-whitespace=blanks -Wtrailing-whitespace=blank > > -Wno-error=leading-whitespace=blanks -Wno-error=trailing-whitespace=blank

[PATCH 2/3] Finish vectorizer pattern proper COND_EXPR transition

This fixes up vect_recog_ctz_ffs_pattern. Bootstrap and regtest running on x86_64-unknown-linux-gnu. * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Create a separate pattern stmt for the comparison in the generated COND_EXPR. --- gcc/tree-vect-patterns.cc | 7 +

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

Arsen Arsenović writes: > Hi! > > Jakub Jelinek writes: > >> Hi! >> >> On top of the previously posted leading whitespace patch, this change >> just replaces 8 consecutive spaces in leading whitespace by tab. >> The patch is too large (1MB xz -9e compressed), so I'm not even trying to >> split it

Re: [PATCH 4/6] aarch64: Optimize vector rotates into REV* instructions where possible

Kyrylo Tkachov writes: >> On 25 Oct 2024, at 13:46, Richard Sandiford >> wrote: >> >> Kyrylo Tkachov writes: >>> Thank you for the suggestions! I’m trying them out now. >>> > + if (rotamnt % BITS_PER_UNIT != 0) > +return NULL_RTX; > + machine_mode qimode; > + if (!qimod

Re: libstdc++-v3: do not duplicate some math functions when using newlib

Hey, I have to admit I am not super familiar with long doubles, either than knowing they are 128-bit FP representations... but bisect has pointed me to this patch when investigating a regression on aarch64_be-none-elf for the libstdc++ testcase: 26_numerics/complex/13450.cc After some reduct

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

Jakub Jelinek writes: > On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: >> Maybe we should go the other way around? Compressing eight spaces into >> a tab leads to strange artifacts in diffs (where lines appear >> misindented because some were aligned by tabs and some by spaces)

Re: [PATCH] Match: Simplify branch form 3 of unsigned SAT_ADD into branchless

On Thu, Oct 24, 2024 at 4:08 PM wrote: > > From: Pan Li > > There are sorts of forms for the unsigned SAT_ADD. Some of them are > complicated while others are cheap. This patch would like to simplify > the complicated form into the cheap ones. For example as below: > > From the form 3 (branch)

[PATCH 1/3] Finish vectorizer pattern proper COND_EXPR transition

The following tries to finish building proper GIMPLE COND_EXPRs in vectorizer pattern recognition. Bootstrapped and tested on x86_64-unknown-linux-gnu. * tree-vect-patterns.cc (vect_recog_divmod_pattern): Build separate comparion pattern for the condition of a COND_EXPR pa

Re: [PATCH 4/6] aarch64: Optimize vector rotates into REV* instructions where possible

> On 25 Oct 2024, at 13:46, Richard Sandiford wrote: > > Kyrylo Tkachov writes: >> Thank you for the suggestions! I’m trying them out now. >> + if (rotamnt % BITS_PER_UNIT != 0) +return NULL_RTX; + machine_mode qimode; + if (!qimode_for_vec_perm (mode).exists (&qimo

Re: [PATCH] match.pd: Add std::pow folding optimizations.

On Wed, 23 Oct 2024, Jennifer Schmitz wrote: > > > > On 22 Oct 2024, at 13:14, Richard Biener wrote: > > > > External email: Use caution opening links or attachments > > > > > > On Tue, 22 Oct 2024, Jennifer Schmitz wrote: > > > >> > >> > >>> On 22 Oct 2024, at 11:05, Richard Biener wrot

Re: Patch ping - Re: [PATCH] genmatch: Add selftests to genmatch for diag_vfprintf

On Fri, 25 Oct 2024, Jakub Jelinek wrote: > On Tue, Oct 15, 2024 at 11:47:45AM +0200, Jakub Jelinek wrote: > > The following patch adds selftests to genmatch to verify the new printing > > routine there. > > So that I can rely on HAVE_DECL_FMEMOPEN (host test), the tests are done > > solely in sta

C++ Patch ping

I'd like to ping 18 C++ patches: https://gcc.gnu.org/pipermail/gcc-patches/2024-July/658137.html libcpp, c++: Optimize initializers using #embed in C++ https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659333.html c++: Speed up compilation of large char array initializers when not using

Re: [PATCH 3/2] c++: remove WILDCARD_DECL

On Wed, 23 Oct 2024, Patrick Palka wrote: > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look > OK for trunk? > > -- >8 -- > > This tree code was added as part of the initial Concepts TS > implementation to support type-constraints introducing any kind > of template-parameter, no

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, 25 Oct 2024 at 12:17, Jakub Jelinek wrote: > > Hi! > > On top of the previously posted leading whitespace patch, this change > just replaces 8 consecutive spaces in leading whitespace by tab. > The patch is too large (1MB xz -9e compressed), so I'm not even trying to > split it up into 4+

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, Oct 25, 2024 at 7:54 AM Jakub Jelinek wrote: > > On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: > > Maybe we should go the other way around? Compressing eight spaces into > > a tab leads to strange artifacts in diffs (where lines appear > > misindented because some were

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, Oct 25, 2024 at 01:12:15PM +0100, Jonathan Wakely wrote: > So everything except: > > include/pstl/* > src/c++17/ryu/* > src/c++17/fast_float/* Thanks, changed in my copy. grep 'pstl\|ryu\|fast_float' Q624 is now empty. Jakub

Re: counted_by attribute and type compatibility

Am Mittwoch, dem 23.10.2024 um 14:32 + schrieb Qing Zhao: > > > On Oct 22, 2024, at 15:16, Martin Uecker wrote: > > > > > > > > > > > > > > > I doesn't really make sense when they are inconsistent. > > > > Still, we could just warn and pick one of the attributes > > > > when forming the co

Patch ping - Re: [PATCH] genmatch: Add selftests to genmatch for diag_vfprintf

On Tue, Oct 15, 2024 at 11:47:45AM +0200, Jakub Jelinek wrote: > The following patch adds selftests to genmatch to verify the new printing > routine there. > So that I can rely on HAVE_DECL_FMEMOPEN (host test), the tests are done > solely in stage2+ where we link the host libcpp etc. to genmatch.

Re: [PATCH] arm: Support -mfdpic for more targets

On 24/02/2024 03:33, Fangrui Song wrote: > From: Fangrui Song > > Targets that are not arm*-*-uclinuxfdpiceabi can use -S -mfdpic, but -c > -mfdpic does not pass --fdpic to gas. This is an unnecessary > restriction. Just define the ASM_SPEC in bpabi.h. > > Additionally, use armelf[b]_linux_fdp

Re: [PATCH] c, v2: Add __builtin_stdc_rotate_{left, right} builtins [PR117030]

On Thu, Oct 24, 2024 at 07:38:49PM +0200, Jakub Jelinek wrote: > The only changed parts are extend.texi, c-parser.cc and the 2 testcases. Bootstrapped/regtested successfully on both x86_64-linux and i686-linux. > 2024-10-24 Jakub Jelinek > > PR c/117030 > gcc/ > * doc/extend.texi

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, 25 Oct 2024 at 12:54, Jakub Jelinek wrote: > > On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: > > Maybe we should go the other way around? Compressing eight spaces into > > a tab leads to strange artifacts in diffs (where lines appear > > misindented because some were al

[PATCH] Default expand_vec_cond_expr_p code to ERROR_MARK

As we want to transition to only vcond_mask expanders the following makes it possible to easier distinguish queries that rely on vcond queries for expand_vec_cond_expr_p from those of vcond_mask by for the latter having the comparison code defaulted to ERROR_MARK. Bootstrapped and tested on x86_64

Re: [PATCH] Replace 8 consecutive spaces in leading whitespace by tab

On Fri, Oct 25, 2024 at 01:25:25PM +0200, Arsen Arsenović wrote: > Maybe we should go the other way around? Compressing eight spaces into > a tab leads to strange artifacts in diffs (where lines appear > misindented because some were aligned by tabs and some by spaces), and > nowadays editor autho

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