On 25/01/2025 12:28, Marek Vasut wrote:
> Update the debug() print, use __func__ to always print matching
> function name, and also print bus name in case there are multiple
> busses.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B
On 25/01/2025 12:30, Marek Vasut wrote:
> On 1/21/25 1:03 PM, Paul Barker wrote:
>> On 18/01/2025 06:16, Marek Vasut wrote:
>>> Replace ifdeffery with plain debug() function call. No functional change.
>>>
>>> Signed-off-by: Marek Vasut
>>> ---
>&
On 25/01/2025 12:34, Marek Vasut wrote:
> On 1/21/25 1:15 PM, Marek Vasut wrote:
>> On 1/21/25 1:07 PM, Paul Barker wrote:
>>> On 18/01/2025 06:34, Marek Vasut wrote:
>>>> The init function does nothing, the bb_miiphy_init() already checks
>>>> whether
On 27/01/2025 13:28, Paul Barker wrote:
> On 27/01/2025 11:30, Marek Vasut wrote:
>> On 1/27/25 11:32 AM, Paul Barker wrote:
>>> Hi Marek,
>>>
>>> On 25/01/2025 12:56, Marek Vasut wrote:
>>>> On 1/21/25 3:38 PM, Paul Barker wrote:
>>>&g
On 27/01/2025 11:30, Marek Vasut wrote:
> On 1/27/25 11:32 AM, Paul Barker wrote:
>> Hi Marek,
>>
>> On 25/01/2025 12:56, Marek Vasut wrote:
>>> On 1/21/25 3:38 PM, Paul Barker wrote:
>>>> On 18/01/2025 06:53, Marek Vasut wrote:
>>>>> In
Hi Marek,
On 25/01/2025 12:56, Marek Vasut wrote:
> On 1/21/25 3:38 PM, Paul Barker wrote:
>> On 18/01/2025 06:53, Marek Vasut wrote:
>>> Introduce mdio_init() split off from mdio_alloc(), which is used
>>> to initialize already allocated struct mii_dev.
>>
On 18/01/2025 06:53, Marek Vasut wrote:
> Introduce bb_miiphy_free()/bb_miiphy_free() wrappers to allocate and free
This should be bb_miiphy_alloc()/bb_miiphy_free().
Same for the commit title.
Thanks,
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPGP public
e commit that dynamic allocation
is added.
Thanks,
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
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;
> Signed-off-by: Marek Vasut
> ---
> Cc: Christian Marangi
> Cc: Evgeny Bachinin
> Cc: Ilias Apalodimas
> Cc: Jerome Forissier
> Cc: Joe Hershberger
> Cc: Mario Six
> Cc: Michal Simek
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Ramon Fried
> Cc:
Cc: Mario Six
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Peter Robinson
> Cc: Ramon Fried
> Cc: Sumit Garg
> Cc: Tom Rini
> Cc: u-boot@lists.denx.de
> ---
> drivers/net/phy/miiphybb.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git
ld in these two structs have
different lengths...
With that changed,
Reviewed-by: Paul Barker
--
Paul Barker
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On 18/01/2025 06:12, Marek Vasut wrote:
> These functions can be static as they are referenced only in this file.
> Make them static. No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPG
>
> Signed-off-by: Marek Vasut
Thanks for tidying this up!
Reviewed-by: Paul Barker
--
Paul Barker
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On 14/12/2024 22:42, Marek Vasut wrote:
> Use generic is_cortex_a() functions instead of open-coded midr_el1 read.
> No functional change.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Biju Das
> Cc: Chris Paterson
> Cc: Lad Prabhakar
> Cc: Nobuhiro Iwamatsu
> C
On 14/12/2024 22:42, Marek Vasut wrote:
> Add MIDR entries for Cortex-A57 and Cortex-A76 cores.
> Those are used on R-Car Gen3 and Gen4 SoCs respectively.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Biju Das
> Cc: Chris Paterson
> Cc: Lad Prabhakar
> Cc: Nobuhiro
future three-digit cores
> and use MIDR_PARTNUM_SHIFT in MIDR_PARTNUM_MASK to be consistent.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Biju Das
> Cc: Chris Paterson
> Cc: Lad Prabhakar
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Tom Rini
> Cc: u-boot@lists
Hi Marek,
On 28/10/2024 09:50, Paul Barker wrote:
> On 27/10/2024 16:25, Marek Vasut wrote:
>> On 10/24/24 5:24 PM, Paul Barker wrote:
>>> int ravb_of_to_plat(struct udevice *dev)
>>> {
>>> struct eth_pdata *pdata = dev_get_plat(dev);
>>&
On 01/12/2024 18:50, Marek Vasut wrote:
> On 11/20/24 10:48 AM, Paul Barker wrote:
>> On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
>> signal is selectable to support an Ethernet PHY operating in either MII
>> or RGMII mode. By default, the signal is confi
igning the behavior of the various MAC drivers
> would be nice.
Is there anything we can do in this driver to fix this?
Or should we merge this as-is and improve the MAC drivers later?
Thanks,
--
Paul Barker
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On 25/11/2024 16:42, Quentin Schulz wrote:
> Hi Paul,
>
> On 11/20/24 10:49 AM, Paul Barker wrote:
>> To simply porting phy drivers from Linux to U-Boot, define
>> phy_set_bits() and phy_clear_bits() functions with a similar API to
>> those used in Linux.
>>
Hi Marek,
On 01/12/2024 21:08, Marek Vasut wrote:
> On 12/1/24 7:48 PM, Marek Vasut wrote:
>> On 11/20/24 10:49 AM, Paul Barker wrote:
>>> We can call dev_read_u32_default() instead of calling fdt_getprop() then
>>> fdt32_to_cpu().
>>>
>>> Signed-off-
output to support RGMII mode.
As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
In rzg2l_pinconf_set(), there are no new variables defined in the case
statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
- Added Mare
We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
[1]:
https://lore.kernel.org/all/20241024152448.102-1-paul.barker...@bp.renesas.com/
We can call dev_read_u32_default() instead of calling fdt_getprop() then
fdt32_to_cpu().
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
- Added Marek's Reviewed-by tag
[1]:
https://lore.kernel
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Signed-off-by: Paul Barker
Reviewed-by: Marek V
phy functions in U-Boot.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
- Added Marek's Reviewed-by tag
[1]:
https://lore.kernel.org/all/20241024152448.102-1-paul.barker...@bp.renesas.com/
include/ph
: Paul Barker
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
- Add symbols KSZ9131RN_COMMON_CTRL, KSZ9131RN_COMMON_CTRL_LED_MODE,
KSZ9131RN_LED_ERRATA_REG, KSZ9131RN_LED_ERRATA_BITS
[1]:
https://lore.kernel.org/all/20241024152448.102-1-paul.bar
& QSPI interfaces.
While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
these drivers, simply ignore attempts to enable a core
clock.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
Changes v1->v2:
- Split out of series adding RZ/G2L Ethernet support [1]
- Added Marek's Reviewed-by tag
[1]:
https://lore.kernel.org/all/20241024152448.102-
: Add basic RZ/G2L family support")
Signed-off-by: Paul Barker
---
arch/arm/mach-renesas/include/mach/rzg2l.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-renesas/include/mach/rzg2l.h
b/arch/arm/mach-renesas/include/mach/rzg2l.h
index 057df5cb9d46..c49a71a6d
We are now using the dts/upstream subtree for the RZ/G2L SoC family so
we can drop unused devicetree files from arch/arm/dts.
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Improve commit message
arch/arm/dts/Makefile |3 -
arch/arm/dts/r9a07g044.d
We are now using the dts/upstream subtree for the RZ/G2L SoC family so
we can drop unused dt-bindings headers.
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Improve commit message
include/dt-bindings/clock/r9a07g044-cpg.h | 220 --
.../interrupt-controller/irqc-rzg2
We are now using the dts/upstream subtree for the RZ/G2L SoC family.
Signed-off-by: Paul Barker
---
include/dt-bindings/clock/r9a07g044-cpg.h | 220 --
.../interrupt-controller/irqc-rzg2l.h | 25 --
include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 23 --
3 files
We are now using the dts/upstream subtree for the RZ/G2L SoC family.
Signed-off-by: Paul Barker
---
arch/arm/dts/Makefile |3 -
arch/arm/dts/r9a07g044.dtsi | 1273 -
arch/arm/dts/r9a07g044l2-smarc.dts| 39 -
arch/arm/dts
We are now using the dts/upstream subtree for the RZ/G2L SoC family, so
update the board MAINTAINERS file to match rz-smarc dtsi files in this
subtree.
Signed-off-by: Paul Barker
---
board/renesas/rzg2l/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board
On 27/10/2024 16:18, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> Micrel KSZ9131 PHY LED behavior is not correct when configured in
>> Individual Mode, LED1 (Activity LED) is in the ON state when there is
>> no-link.
>>
>> Workaround this by set
On 27/10/2024 16:29, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
>> interfaces which can be supported using the ravb driver. Some RZ/G2L
>> specific steps need to be taken during initializati
On 27/10/2024 16:25, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> Several Renesas SoCs in the RZ/G2L family have two Ethernet interfaces.
>> To support this second interface, we extend the bb_miiphy_buses[] array
>> and keep track of the current bus ind
On 27/10/2024 16:20, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> We can call phy_modify_mmd() instead of manually calling drv->readext()
>> and drv->writeext().
>>
>> Signed-off-by: Paul Barker
>> ---
>> drivers/net/phy/micrel_ksz
On 27/10/2024 16:16, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> In rzg2l_pinconf_set(), there are no new variables defined in the case
>> statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.
>>
>> Signed-off-by: Paul Barker
On 27/10/2024 16:15, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
>> signal is selectable to support an Ethernet PHY operating in either MII
>> or RGMII mode. By default, the signal is confi
On 27/10/2024 16:14, Marek Vasut wrote:
> On 10/24/24 5:24 PM, Paul Barker wrote:
>> The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
>> multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.
>>
>> rzg2l_pinconf_set() is extended
by: Marek Vasut
> ---
> Cc: "Cogent Embedded, Inc."
> Cc: Adam Ford
> Cc: Biju Das
> Cc: Hai Pham
> Cc: Heinrich Schuchardt
> Cc: Lad Prabhakar
> Cc: Masakazu Mochizuki
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Sumit Garg
> Cc: Tom Rini
by: Marek Vasut
> ---
> Cc: "Cogent Embedded, Inc."
> Cc: Adam Ford
> Cc: Biju Das
> Cc: Hai Pham
> Cc: Heinrich Schuchardt
> Cc: Lad Prabhakar
> Cc: Masakazu Mochizuki
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Sumit Garg
> Cc: Tom Rini
Cc: u-boot@lists.denx.de
> ---
> V2: - Replace boards with board in commit message
> - Add rzg2l and r9a0
Reviewed-by: Paul Barker
Thanks!
--
Paul Barker
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phy functions in U-Boot.
Signed-off-by: Paul Barker
---
include/phy.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/include/phy.h b/include/phy.h
index 36785031eeb0..510b0a21831b 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -333,6 +333,28 @@ int gen10g_startup
: Paul Barker
---
drivers/net/phy/micrel_ksz90x1.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index c48ae6e88f30..4f99b115a3c7 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy
In rzg2l_pinconf_set(), there are no new variables defined in the case
statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.
Signed-off-by: Paul Barker
---
drivers/pinctrl/renesas/rzg2l-pfc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pinctrl
output to support RGMII mode.
As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.
Signed-off-by: Paul Barker
---
drivers/pinctrl/renesas/rzg2l-pfc.c | 31 +++--
include
& QSPI interfaces.
While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.
Signed-off-by: Paul Barker
---
drivers/pinctrl/renesas/rzg2l-pfc.c | 49 -
include/rene
bb_miiphy_buses will be replaced with a proper device
model/uclass implementation before that is needed.
Signed-off-by: Paul Barker
---
drivers/net/ravb.c | 28
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Signed-off-by: Paul Barker
---
drivers/net
these drivers, simply ignore attempts to enable a core
clock.
Signed-off-by: Paul Barker
---
drivers/clk/renesas/rzg2l-cpg.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index c8735d869cf9..3c5340df8eed 100644
On 24/10/2024 16:24, Paul Barker wrote:
> Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
> SoMs, as per RGMII specification.
>
> Signed-off-by: Paul Barker
> Reviewed-by: Geert Uytterhoeven
> Acked-by: Linus Walleij
> Link:
>
the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.
Signed-off-by: Paul Barker
Reviewed-by: Geert Uytterhoeven
Acked-by: Linus Walleij
Link:
https://lore.kernel.org/20240625200316.4282-8-paul.barker...@bp.renesas.com
Signed-off-by: Geert Uytterho
Linux.
Signed-off-by: Paul Barker
---
configs/renesas_rzg2l_smarc_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/renesas_rzg2l_smarc_defconfig
b/configs/renesas_rzg2l_smarc_defconfig
index 7a1224b3f07a..991818e797ea 100644
--- a/configs/renesas_rzg2l_smarc_defconfig
reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.
Signed-off-by: Paul Barker
---
arch/arm/mach-renesas/Kconfig | 1 +
drivers/net/Kconfig | 2 +
drivers/net/ravb.c| 183 --
3
We can call dev_read_u32_default() instead of calling fdt_getprop() then
fdt32_to_cpu().
Signed-off-by: Paul Barker
---
drivers/net/ravb.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 9b33ce929618..fb869cd0872e 100644
We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().
Signed-off-by: Paul Barker
---
drivers/net/phy/micrel_ksz90x1.c | 26 --
1 file changed, 8 insertions(+), 18 deletions(-)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/d
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
SoMs, as per RGMII specification.
Signed-off-by: Paul Barker
Reviewed-by: Geert Uytterhoeven
Acked-by: Linus Walleij
Link:
https://lore.kernel.org/20240625200316.4282-5-paul.barker...@bp.renesas.com
Signed-off-by: Geert
the RZ/G2L defconfig and cherry-pick required
devicetree changes from Linux v6.12-rc4.
Paul Barker (14):
clk: rzg2l: Ignore enable for core clocks
pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces
pinctrl: rzg2l: Support Ethernet TXC output enable
pinctrl: rzg2l: Drop unnecessary
ew compatible string to the sdhi driver.
Fixes: 136b7b6d2e98 ("Subtree merge tag 'v6.11-dts' of dts repo [1] into
dts/upstream")
Reviewed-by: Jaehoon Chung
Reviewed-by: Marek Vasut
Signed-off-by: Paul Barker
---
Changes v1->v2:
- Moved new entry after "ren
> +N: r8a66597
> +N: r8a77
> +N: rcar
> +N: renesas
> +N: rza1
> +N: serial_sh
> +N: sh77
> +N: sh_eth
Should we also add 'rzg2l' and 'r9a07g' to this list?
Thanks,
--
Paul Barker
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ew compatible string to the sdhi driver.
Fixes: 136b7b6d2e98 ("Subtree merge tag 'v6.11-dts' of dts repo [1] into
dts/upstream")
Signed-off-by: Paul Barker
---
drivers/mmc/renesas-sdhi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/renesas-sdhi.c b/drive
> There are SoCs which are not included in this patch. The 32bit SoCs
> require further infrastructure work. R8A779H0 is coming during the
> next upstream DT synchronization cycle as it is not included in
> current upstream DTs yet.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Pau
On 02/03/2024 07:39, Paul Barker wrote:
> On 01/03/2024 13:24, Sumit Garg wrote:
>> Short reference link names like "dtspec", "dtrepo", "dttweaks" etc.
>> interrupt the flow of the document text. Lets avoid them and instead
>> expand in place for
ARM: renesas: Rename arch-/mach-rmobile to arch-/mach-renesas
> ARM: renesas: Post rename fix ups
> mmc: renesas-sdhi: Rename rmobile_is_gen3_mmc0() to
> rcar_is_gen3_mmc0()
> git-mailrc: Add renesas entry and update rmobile entry
>
For every patch in the series:
Reviewed-by:
On 01/03/2024 13:24, Sumit Garg wrote:
> Short reference link names like "dtspec", "dtrepo", "dttweaks" etc.
> interrupt the flow of the document text. Lets avoid them and instead
> expand in place for better readability.
>
> Suggested-by: Paul Bark
On 28/02/2024 09:20, Sumit Garg wrote:
> Hi Paul,
>
> On Wed, 28 Feb 2024 at 03:08, Paul Barker
> wrote:
>>
>> Hi Sumit,
>>
>> On 22/02/2024 09:36, Sumit Garg wrote:
>>> Encourage SoC/board maintainers to migrate to using devicetree-rebasing
>&
d adding tweaks with u-boot.dtsi files.
and adding tweaks with u-boot.dtsi files.
>
> .. _dtspec: https://www.devicetree.org/specifications/
> .. _dtlist: https://www.spinics.net/lists/devicetree-compiler/
> +.. _dtrepo:
> https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
.. _devicetree-rebasing repository:
https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
> +.. _dtschema: https://github.com/devicetree-org/dt-schema/tree/main
.. _DT schema project page:
https://github.com/devicetree-org/dt-schema/tree/main
Thanks,
--
Paul Barker
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If SYSRESET support is enabled for the RAA215300 PMIC, we need to bind
the raa215300_sysreset driver as a child device of the PMIC.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
drivers/power/pmic/raa215300.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/power
With the SYSRESET subsystem enabled we do not need to implement
reset_cpu() in the board directory.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
board/renesas/rzg2l/rzg2l.c | 8
configs/renesas_rzg2l_smarc_defconfig | 2 ++
2 files changed, 2 insertions(+), 8
T_COLD.
* A "cold" reset via the RAA215300 PMIC will cycle all power supply
rails, so this corresponds to SYSRESET_POWER.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
drivers/sysreset/Kconfig | 6 +++
drivers/sysreset/Makefile
Enable the appropriate PMIC driver as well as the `pmic` command.
Signed-off-by: Paul Barker
---
configs/renesas_rzg2l_smarc_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/renesas_rzg2l_smarc_defconfig
b/configs/renesas_rzg2l_smarc_defconfig
index ad46297c6619
stub, binding of the
sysreset driver will be added in a later patch.
Additional features of this PMIC (such as reset control) may be
supported by future patches.
Signed-off-by: Paul Barker
---
drivers/power/pmic/Kconfig | 9
drivers/power/pmic/Makefile| 1 +
drivers/power/pmic
automatically attempt to
deblock.
[1]: https://github.com/renesas-rz/renesas-u-boot-cip
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
arch/arm/mach-rmobile/Kconfig | 1 +
configs/renesas_rzg2l_smarc_defconfig | 2 +
drivers/i2c/Kconfig | 7 +
drivers/i2c/Makefile
Pull in the recent changes to the RZ/G2L device tree and related dtsi
files so that we're aligned with Linux v6.7 (commit 0dd3ee311255).
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
arch/arm/dts/r9a07g044.dtsi | 16 -
arch/arm/dts/r9a07g044l2-smar
ting for a 0 bit or a
1 bit, it's easier to use wait_for_bit_32() than readl_poll_timeout().
This change is needed for reliable initialization of the I2C driver
which is added in a following patch.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
drivers/clk/renesas/r
ic driver and patch 7
enables sysreset for the RZ/G2L.
Paul Barker (8):
clk: renesas: Confirm all clock & reset changes on RZ/G2L
arm: dts: rzg2l: Sync with Linux v6.7
i2c: rzg2l: Add I2C driver for RZ/G2L family
pmic: Add Renesas RAA215300 PMIC driver
board: rzg2l: Enable access to
On 26/02/2024 17:43, Biju Das wrote:
>
>
>> -Original Message-
>> From: U-Boot On Behalf Of Paul Barker
>> Sent: Monday, February 26, 2024 3:06 PM
>> To: Marek Vasut ; Nobuhiro Iwamatsu
>>
>> Cc: Paul Barker ; u-boot@lists.denx.de
>> Su
With the SYSRESET subsystem enabled we do not need to implement
reset_cpu() in the board directory.
Signed-off-by: Paul Barker
---
board/renesas/rzg2l/rzg2l.c | 8
configs/renesas_rzg2l_smarc_defconfig | 2 ++
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a
If SYSRESET support is enabled for the RAA215300 PMIC, we need to bind
the raa215300_sysreset driver as a child device of the PMIC.
Signed-off-by: Paul Barker
---
drivers/power/pmic/raa215300.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/power/pmic/raa215300.c b/drivers
stub, binding of the
sysreset driver will be added in a later patch.
Additional features of this PMIC (such as reset control) may be
supported by future patches.
Signed-off-by: Paul Barker
---
configs/renesas_rzg2l_smarc_defconfig | 3 ++
drivers/power/pmic/Kconfig| 9
COLD.
* A "cold" reset via the RAA215300 PMIC will cycle all power supply
rails, so this corresponds to SYSRESET_POWER.
Signed-off-by: Paul Barker
---
drivers/sysreset/Kconfig | 6 +++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/s
automatically attempt to
deblock.
[1]: https://github.com/renesas-rz/renesas-u-boot-cip
Signed-off-by: Paul Barker
eviewed-by: Marek Vasut
---
arch/arm/mach-rmobile/Kconfig | 1 +
configs/renesas_rzg2l_smarc_defconfig | 2 +
drivers/i2c/Kconfig | 7 +
drivers/i2c/Makefile
Pull in the recent changes to the RZ/G2L device tree and related dtsi
files so that we're aligned with Linux v6.7 (commit 0dd3ee311255).
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
arch/arm/dts/r9a07g044.dtsi | 16 -
arch/arm/dts/r9a07g044l2-smar
ting for a 0 bit or a
1 bit, it's easier to use wait_for_bit_32() than readl_poll_timeout().
This change is needed for reliable initialization of the I2C driver
which is added in a following patch.
Signed-off-by: Paul Barker
Reviewed-by: Marek Vasut
---
drivers/clk/renesas/r
t up the addition of sysreset support into 3 patches: patch 5
adds the driver, patch 6 binds it with the pmic driver and patch 7
enables sysreset for the RZ/G2L.
Paul Barker (7):
clk: renesas: Confirm all clock & reset changes on RZ/G2L
arm: dts: rzg2l: Sync with Linux v6.7
i2c: rz
On 20/02/2024 11:27, Marek Vasut wrote:
> On 2/20/24 11:57, Paul Barker wrote:
>> On 20/02/2024 08:37, Marek Vasut wrote:
>>> This hs400_tuning is a flag, make it bool. No functional change.
>>> This will be useful in the following patch, which adds another
>&
On 20/02/2024 11:26, Marek Vasut wrote:
> On 2/20/24 11:50, Paul Barker wrote:
>> On 20/02/2024 08:36, Marek Vasut wrote:
>>> The cmd_error parameter is not used, remove it.
>>> [snip]
>>>
>>> diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-s
re and check return value from transmission stop command.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Hai Pham
> Cc: Jaehoon Chung
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Peng Fan
> Cc: Sean Anderson
> Cc: Tom Rini
> Cc: Yoshihiro Shimoda
> ---
>
c: Hai Pham
> Cc: Jaehoon Chung
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Peng Fan
> Cc: Sean Anderson
> Cc: Tom Rini
> Cc: Yoshihiro Shimoda
> ---
> drivers/mmc/tmio-common.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> di
hi_check_scc_error() call in case the
> MMC subsystem is in tuning state. This way, the SCC settings are left
> unmodified by command transfer during tuning operation.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Hai Pham
> Cc: Jaehoon Chung
> Cc: Nobuhiro Iwamatsu
ng
> Cc: Nobuhiro Iwamatsu
> Cc: Paul Barker
> Cc: Peng Fan
> Cc: Sean Anderson
> Cc: Tom Rini
> Cc: Yoshihiro Shimoda
> ---
> drivers/mmc/mmc-uclass.c | 8 +++-
> include/mmc.h| 1 +
> 2 files changed, 8 insertions(+), 1 deletion(-)
>
> d
So I think the commit message needs a little clarification. Other than
that,
Reviewed-by: Paul Barker
Tested-by: Paul Barker
(tested on RZ/G2L with commit ad50a8151387 from
https://source.denx.de/u-boot/custodians/u-boot-sh)
Thanks,
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Descripti
an differentiate between a command
error and a data error. I don't know enough details about MMC to
understand the distinction, but I assume there is some reason for this.
So I wonder if the mtk-sd driver will still work if those error paths
are taken for data errors and not just command errors. Has this change
been tested on some board which uses this driver?
Thanks,
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPGP public key
OpenPGP_signature.asc
Description: OpenPGP digital signature
On 02/12/2023 18:18, Marek Vasut wrote:
> On 11/19/23 21:48, Paul Barker wrote:
>> On Sun, Nov 19, 2023 at 09:15:36PM +0100, Marek Vasut wrote:
>>> On 11/15/23 18:40, Paul Barker wrote:
>>>> This driver supports the I2C module on the Renesas RZ/G2L (R9A07G044)
&g
On 14/02/2024 13:32, Sumit Garg wrote:
> On Wed, 14 Feb 2024 at 03:01, Paul Barker
> wrote:
>> On 02/02/2024 13:05, Sumit Garg wrote:
>>> +Dependencies
>>> +
>>> +
>>> +The DT schema project must be installed in order to validate the D
+architecture as the target platform you further need a C cross compiler.
> +Furthermore, some target platforms require additional host tools to be
> present
> +and their package names may vary slightly dependinng on the naming scheme
> used
s/dependinng/depending/
Thanks,
--
Paul Barker
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Description: OpenPGP digital signature
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