The Bananapi M64 has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
The EMAC driver is already enabled in the defconfig.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node. The binding used here is the old revis
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are
powered by DLDO3 @ 2.5V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The bi
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision curre
Hi,
This series enables the EMAC for some A83T and A64 boards.
Changes since v1:
- Added "bitfield: Include linux/bitops.h for ffs()" to fix build
errors
- Use bitfield_replace_by_mask() instead of open coding bitfield ops
- Trimmed used pins in the device tree to only those actually n
The EMAC syscon has configurable RX/TX delay chains for use with RGMII
PHYs.
This adds support for configuring them via device tree properties. The
property names and format were defined in Linux's dwmac-sun8i binding
that was merged at one point.
Signed-off-by: Chen-Yu Tsai
---
drivers/net/sun
bitfield_shift() uses the ffs() function, which is provided by bitops.h.
Explicitly include this header.
Signed-off-by: Chen-Yu Tsai
---
include/bitfield.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/bitfield.h b/include/bitfield.h
index a59f3c279aad..adfae49de580 100644
--- a/i
Hello Emmanuel,
yesterday you reported on the u-boot ICS channel that you saw an
incorrect device path for the SD card on your BananaPi M2
(/venHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Usb(0x6,0x0)/HD(Part0,MBRType=01)).
In dp_fill() both mass storage (UCLASS_MASS_STORAGE) and USB hubs
(UCLA
On 21 November 2017 at 08:13, Jean-Jacques Hiblot wrote:
> This is a useful information while debugging the initialization process or
> performance issues.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 9 +
> 1 file changed, 9 insertions(+)
Reviewed-by: Simon Glass
Hi Jean-Jacques,
On 21 November 2017 at 08:13, Jean-Jacques Hiblot wrote:
> Instead of failing, the driver uses the default: 1-bit bus width.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc-uclass.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/
Hi Rick,
On 20 November 2017 at 23:50, wrote:
>> -Original Message-
>> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
>> Sent: Monday, November 20, 2017 11:40 PM
>> To: Open Source Project uboot
>> Cc: U-Boot Mailing List; Wolfgang Denk; Detlev Zundel; Rick Jian-
Hi Rick,
On 21 November 2017 at 00:27, wrote:
>
>
>> -Original Message-
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
>> r...@andestech.com
>> Sent: Tuesday, November 21, 2017 2:40 PM
>> To: s...@chromium.org; Open Source Project uboot
>> Cc: u-boot@lists.denx.de; d.
Hi Simon,
On 20 November 2017 at 22:38, Goldschmidt Simon
wrote:
> Hi,
>
>> Simon Glass wrote:
>> On 10 November 2017 at 07:17, Goldschmidt Simon > fuchs.com> wrote:
>> > This drops the limit that fpga is only loaded from FIT images for Xilinx.
>> > This is done by moving the 'partial' check from
On 21 November 2017 at 05:00, Michal Simek wrote:
> The patch is adding external pmufw "Platform Management Unit firmware"
> to boot.bin image. Boot.bin is a Xilinx format which bootrom is capable
> to read and boot the system. pmufw is copied to the header data section
> follows by u-boot-spl.bin
On 21 November 2017 at 15:29, Philipp Tomsich
wrote:
> GCC 7.1 seems to be smart enough to track val through the various
> static inline functions, but not smart enough to see that val will
> always be initialised when no error is returned. This triggers
> the following warning:
> env/mmc.c: In
On 21 November 2017 at 08:13, Jean-Jacques Hiblot wrote:
nit: It is common to use the imperative tense in patches rather than
past tesse, e.g. 'Fix a problem with...'
> As the legacy modes were not added to the list of supported modes, old
> cards that do not support other modes could not be use
Hi Jean-Jacques,
On 21 November 2017 at 08:13, Jean-Jacques Hiblot wrote:
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc-uclass.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
> index 48fafce..9723129 100644
> ---
Hi,
On 20 November 2017 at 23:11, Y.b. Lu wrote:
> Hi Simon,
>
>
>
> I found your below patch just dropping mmc_create() for probe procedure of
> DM.
>
> Actually the description seemed to be not the things this patch did.
>
>
>
> dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init()
>
>
Hi Michal,
On 21 November 2017 at 00:23, Michal Simek wrote:
> On 20.11.2017 16:38, Simon Glass wrote:
>> On 6 November 2017 at 04:45, Michal Simek wrote:
>>> Add configuration files/dtses for mini u-boot configurations which runs
>>> out of OCM.
>>>
>>> ram top is calculated from 0 that's why +
Hi Jean-Jacques,
On 21 November 2017 at 08:13, Jean-Jacques Hiblot wrote:
> Make sure that those basic capabilities are advertised by the host.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 15 ++-
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
Your patch
On 22 November 2017 at 06:25, Neil Armstrong wrote:
> Switch Odroid-C2 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong
> ---
> board/amlogic/odroid-c2/odroid-c2.c | 11 ++-
> 1 file changed, 2 insertions(+), 9 deletions(-)
Reviewed-by: Simon Glass
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong wrote:
> This adds platform code for the Khadas VIM board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
>
> The meson-gxl-s
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong wrote:
> This adds platform code for the Libre Computer CC "Le Potato" board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
>
> This initial submission supports UART, MMC/SDCard and Ethernet with the
> Internal RMII PHY.
On 22 November 2017 at 06:25, Neil Armstrong wrote:
> Switch P212 Ethernet init to the common Ethernet init function.
>
> Signed-off-by: Neil Armstrong
> ---
> board/amlogic/p212/p212.c | 14 ++
> 1 file changed, 2 insertions(+), 12 deletions(-)
Reviewed-by: Simon Glass
___
Hi Neil,
On 22 November 2017 at 06:25, Neil Armstrong wrote:
> Introduce a generic common Ethernet Hardware init function
> common to all Amlogic GX SoCs with support for the
> Internal PHY enable for GXL SoCs.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm/include/asm/arch-meson/eth.h | 15
Hi Neil,
On 20 November 2017 at 08:36, Neil Armstrong wrote:
> As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
> and a secondary BL32 firmware.
> Since mid-2017, the reserved memory address of the BL31 firmware was moved
> and grown for security reasons.
>
> But mainline
On Thu, Nov 23, 2017 at 06:48:52PM -0700, Simon Glass wrote:
> Hi Tom,
>
> Happy Thanksgiving. Herewith some test fix-ups.
>
> After this I have some patches to enable these tests with 'make
> tests'. But I'm a little nervous about it. One of them needs Python
> code coverage tools which not eve
On Fri, Nov 24, 2017 at 04:39:15PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> Could you please pull a couple of fixes and improvements for ARC?
> Among them 2 trivial fixes and addition of GPIO controller for ARC HSDK board.
>
> The following changes since commit d9d76023ea0d567b0630e85d1bef67b5
Currently X86 does not properly support distro defaults.
This patch is only a partial fix.
It provides the name of the bootloader EFI application
for the X86 architecture.
The architecture dependent file names are defined in the UEFI
specification.
Signed-off-by: Heinrich Schuchardt
---
includ
> On 24 Nov 2017, at 21:36, Jagan Teki wrote:
>
> On Sat, Nov 25, 2017 at 1:17 AM, Dr. Philipp Tomsich
> wrote:
>> Jagan, Maxime & Tom,
>>
>> I have a couple of changes to spl_fit.c queued that we need to get merged to
>> fix some issues for ATF support on Rockchip platforms.
>
> Does all rk
On Sat, Nov 25, 2017 at 2:06 AM, Jagan Teki wrote:
> On Sat, Nov 25, 2017 at 1:17 AM, Dr. Philipp Tomsich
> wrote:
>> Jagan, Maxime & Tom,
>>
>> I have a couple of changes to spl_fit.c queued that we need to get merged to
>> fix some issues for ATF support on Rockchip platforms.
>
> Does all rk6
On Sat, Nov 25, 2017 at 1:17 AM, Dr. Philipp Tomsich
wrote:
> Jagan, Maxime & Tom,
>
> I have a couple of changes to spl_fit.c queued that we need to get merged to
> fix some issues for ATF support on Rockchip platforms.
Does all rk64 has enough SPL size's to fit?
> However, due to internal ali
Jagan, Maxime & Tom,
I have a couple of changes to spl_fit.c queued that we need to get merged to
fix some issues for ATF support on Rockchip platforms.
However, due to internal alignment before the ARMv8 vectors, this breaks the
sun50i builds (all exceeding their SPL size by up to approx. 1KB),
The DM version of do_reset has been issuing a warm-reset, which (on
some platforms keeps GPIOs and other parts of the platform active).
This may cause unintended behaviour, as calling do_reset usually
indicates a desire to reset the board/platform and not just the CPU.
This changes do_reset to alw
Hi Tom,
Could you please pull a couple of fixes and improvements for ARC?
Among them 2 trivial fixes and addition of GPIO controller for ARC HSDK board.
The following changes since commit d9d76023ea0d567b0630e85d1bef67b5b1a788d3:
Merge git://git.denx.de/u-boot-rockchip (2017-11-22 07:28:58 -05
On Fri, 2017-11-24 at 17:42 +0200, Andy Shevchenko wrote:
> On Fri, 2017-11-24 at 16:06 +0800, Bin Meng wrote:
> > Hi,
> >
> > Intel Edison has a build warning below.
> >
> > + *env_addr = offset;
> > +^
> > w+../env/mmc.c: In function 'mmc_get_env_addr':
> > w+../env/mmc.c:121:12: w
On Fri, 2017-11-24 at 16:06 +0800, Bin Meng wrote:
> Hi,
>
> Intel Edison has a build warning below.
>
> + *env_addr = offset;
> +^
> w+../env/mmc.c: In function 'mmc_get_env_addr':
> w+../env/mmc.c:121:12: warning: 'val' may be used uninitialized in
> this function [-Wmaybe-uninitia
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11-ref.dts | 10 +++-
arch/arm/dts/uniphier-ld11.dtsi | 50 +--
arch/arm/dts/uniphier-ld20-ref.dts | 10 +++-
arch/arm/dts/uniphier-ld20.dtsi | 87 -
arch/arm/dts/
This work-around has been here in U-Boot because the AIDET and GPIO
drivers were missing in the upstream Linux. Both are now available
in Linus' tree:
- drivers/irqchip/irq-uniphier-aidet.c
- drivers/gpio/gpio-uniphier.c
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.
Signed-off-by: Masahiro Yamada
---
drivers/gpio/gpio-uniphier.c | 3 +--
include/dt-bindings/gpio/uniphier-gpio.h | 18 ++
2 files changed, 19 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h
diff --git a/drivers/gpio/gpio-u
Masahiro Yamada (5):
ARM: uniphier: set CONFIG_LOGLEVEL to 6
ARM: uniphier: remove IRQ settings
ARM: uniphier: remove XIRQ pin settings
gpio: uniphier: import dt-binginds header from Linux
ARM: dts: uniphier: Sync with Linux 4.15-rc1
arch/arm/dts/uniphier-ld11-ref.dts | 10 +++-
The XIRQ pins are now set up on the Linux side by the GPIO hogging.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.c | 16
1 file changed, 16 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 28784e
Print out KERN_NOTICE or higher level log messages.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_ld4_sld8_defconfig | 1 +
configs/uniphier_v7_defconfig | 1 +
configs/uniphier_v8_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/uniphier_ld4_sld8_defcon
Print out KERN_NOTICE or higher level log messages.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_ld4_sld8_defconfig | 1 +
configs/uniphier_v7_defconfig | 1 +
configs/uniphier_v8_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/uniphier_ld4_sld8_defcon
The XIRQ pins are now set up on the Linux side by the GPIO hogging.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.c | 16
1 file changed, 16 deletions(-)
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index 28784e
Masahiro Yamada (5):
ARM: uniphier: set CONFIG_LOGLEVEL to 6
ARM: uniphier: remove IRQ settings
ARM: uniphier: remove XIRQ pin settings
gpio: uniphier: import dt-binginds header from Linux
ARM: dts: uniphier: Sync with Linux 4.15-rc1
arch/arm/dts/uniphier-ld11-ref.dts | 10 +++-
This work-around has been here in U-Boot because the AIDET and GPIO
drivers were missing in the upstream Linux. Both are now available
in Linus' tree:
- drivers/irqchip/irq-uniphier-aidet.c
- drivers/gpio/gpio-uniphier.c
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_init.
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
show as 0x0. Consequently, the "is set to something other than 0" test
in a Makefile needs to be an ifneq($(CONFIG_ROCKCHIP_BOOT_MODE_REG), 0x0).
This commit fixes mach-rockchip/Makefile and also resulting link
issues (if boot_m
The boot (and fallback/emergency boot) concept for the RK3399-Q7
differs from Rockchip's reference platforms.
On the RK3399-Q7, some of this functionality is present in the
bootloader itself (and configurable); some is backed in hardware by
the Qseven BIOS_DISABLE signal to invoke the final stages
Hi Neil,
On Fri, Nov 24, 2017 at 6:54 AM, Neil Armstrong wrote:
> Before this patch one could receive following errors when executing "fatls"
> command on machine with cache enabled (ex i.MX6Q) :
>
> => fatls mmc 0:1
> CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
> CACHE: Misaligned
Check if we are booting from NAND and let the bootrom
continue to load the rest of the bootloader
Signed-off-by: Sean Nyekjaer
---
arch/arm/mach-mvebu/include/mach/soc.h | 1 +
arch/arm/mach-mvebu/spl.c | 16 ++--
2 files changed, 15 insertions(+), 2 deletions(-)
diff
It's the first 8 bits of the bootrom error register that
contains the boot error/fallback error code. Lets check that
and continue to boot from UART.
Signed-off-by: Sean Nyekjaer
---
arch/arm/mach-mvebu/include/mach/soc.h | 6 ++
arch/arm/mach-mvebu/spl.c | 9 +
2 files
Signed-off-by: Sean Nyekjaer
---
arch/arm/dts/armada-38x.dtsi | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/armada-38x.dtsi b/arch/arm/dts/armada-38x.dtsi
index dc8a1a66c1..5e5a158551 100644
--- a/arch/arm/dts/armada-38x.dtsi
+++ b/arch/arm/dts/a
Any suggestion?
Thanks.
From: Y.b. Lu
Sent: 2017年11月21日 14:11
To: u-boot@lists.denx.de
Cc: 'Simon Glass' ; Jaehoon Chung ;
Yinbo Zhu ; Xiaobo Xie
Subject: dm: mmc: fsl_esdhc: Drop mmc_init() call from fsl_esdhc_init()
Hi Simon,
I found your below patch just dropping mmc_create() for probe proc
Hi Bin,
On 24.11.2017 09:29, Bin Meng wrote:
On Mon, Nov 20, 2017 at 6:43 PM, Stefan Roese wrote:
Hi Bin,
On 20.11.2017 08:24, Bin Meng wrote:
On Fri, Nov 17, 2017 at 2:02 PM, Stefan Roese wrote:
This patch removes the inclusion of the libgcc math functions and
replaces them by function
Hi Maxime,
On 16/11/2017 10:22, Maxime Ripard wrote:
> In preparation for the multiple environment support, let's introduce two
> new parameters to the environment driver lookup function: the priority and
> operation.
>
> The operation parameter is meant to identify, obviously, the operation you
On Fri, 24 Nov 2017 09:54:41 +0100
Neil Armstrong wrote:
> Before this patch one could receive following errors when executing
> "fatls" command on machine with cache enabled (ex i.MX6Q) :
>
> => fatls mmc 0:1
> CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
> CACHE: Misaligned oper
Before this patch one could receive following errors when executing "fatls"
command on machine with cache enabled (ex i.MX6Q) :
=> fatls mmc 0:1
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
CACHE: Misaligned operation at range [4f59dfc8, 4f59e7c8]
ERROR: v7_outer_cache_inval_range - s
Hi Łukasz,
On 23/11/2017 20:55, Lukasz Majewski wrote:
> Hi Neil,
>
>> Hi,
>>
>> I'm having a strange issue while porting the DART-MX6 and it's
>> carrier board to mainline U-Boot.
>>
>> Everything works as expected except "fatls" where I get the following
>> output :
>
> Please look into:
> htt
On Fri, Nov 24, 2017 at 4:12 PM, Bin Meng wrote:
> On Fri, Nov 24, 2017 at 1:59 AM, Anatolij Gustschin wrote:
>> This reverts commit 13c531e52a09b4e6ffa8b5a1457199b0a574cb27.
>>
>> The error message with FIT style image mentioned in the above commit
>> only happens when booting using FIT image co
Hi Stefan,
On Mon, Nov 20, 2017 at 6:43 PM, Stefan Roese wrote:
> Hi Bin,
>
>
> On 20.11.2017 08:24, Bin Meng wrote:
>>
>> On Fri, Nov 17, 2017 at 2:02 PM, Stefan Roese wrote:
>>>
>>> This patch removes the inclusion of the libgcc math functions and
>>> replaces them by functions coded in C, tak
On Fri, Nov 24, 2017 at 1:59 AM, Anatolij Gustschin wrote:
> This reverts commit 13c531e52a09b4e6ffa8b5a1457199b0a574cb27.
>
> The error message with FIT style image mentioned in the above commit
> only happens when booting using FIT image containing bzImage kernel
> and without setup node (setup.
Hi Heinrich,
On Mon, Nov 20, 2017 at 5:20 PM, Bin Meng wrote:
> On Mon, Nov 20, 2017 at 3:07 PM, Bin Meng wrote:
>> On Mon, Nov 20, 2017 at 1:30 AM, Heinrich Schuchardt
>> wrote:
>>> Enable CONFIG_DISTRO_DEFAULTS in qemu-x86_64_defconfig
>>> and qemu-x86_defconfig.
>>>
>>> Signed-off-by: Heinr
Hi,
Intel Edison has a build warning below.
+ *env_addr = offset;
+^
w+../env/mmc.c: In function 'mmc_get_env_addr':
w+../env/mmc.c:121:12: warning: 'val' may be used uninitialized in
this function [-Wmaybe-uninitialized]
I did not figure out what is wrong here. v2017.11 does not ha
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