It's the first 8 bits of the bootrom error register that
contains the boot error/fallback error code. Lets check that
and continue to boot from UART.
Signed-off-by: Sean Nyekjaer <sean.nyekj...@prevas.dk>
---
arch/arm/mach-mvebu/include/mach/soc.h | 6 ++++++
arch/arm/mach-mvebu/spl.c | 9 +++++++++
2 files changed, 15 insertions(+)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h
b/arch/arm/mach-mvebu/include/mach/soc.h
index 1d302761f0..4f81285bb5 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -111,10 +111,16 @@
#define COMPHY_REFCLK_ALIGNMENT (MVEBU_REGISTER(0x182f8))
/* BootROM error register (also includes some status infos) */
+#if defined(CONFIG_ARMADA_38X)
+#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0))
+#define BOOTROM_ERR_MODE_OFFS 0
+#define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS)
+#else
#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0))
#define BOOTROM_ERR_MODE_OFFS 28
#define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS)
#define BOOTROM_ERR_MODE_UART 0x6
+#endif
#if defined(CONFIG_ARMADA_375)
/* SAR values for Armada 375 */
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index a72a769f7c..2fd6c62589 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -26,7 +26,16 @@ static u32 get_boot_device(void)
val = readl(CONFIG_BOOTROM_ERR_REG);
boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
+#if defined(CONFIG_ARMADA_38X)
+ /*
+ * If the bootrom error register contains any else than zeros
+ * in the first 8 bits it's an error condition. And in that case
+ * try to boot from UART.
+ */
+ if (boot_device)
+#else
if (boot_device == BOOTROM_ERR_MODE_UART)
+#endif
return BOOT_DEVICE_UART;
/*
--
2.15.0
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