Let's use spi_flash_probe for dm and no-dm spi-flash
and make respective function definations separately.
Cc: Simon Glass
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
common/cmd_sf.c | 19 ++-
drivers/mtd/spi/sf-uclass.c | 17 +
inclu
Updated dm-spi-flash probe using dm_spi_flash_probe.
Cc: Simon Glass
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
common/cmd_sf.c | 23 ---
drivers/mtd/spi/sf-uclass.c | 27 ++-
include/spi_flash.h | 5 ++---
3 fi
Use direct call to device_remove instead of exctra
spi_flash_remove defination.
Cc: Simon Glass
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/mtd/spi/sf-uclass.c | 7 +--
include/spi_flash.h | 2 --
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git
On 22 October 2015 at 17:18, Fabio Estevam wrote:
> On Thu, Oct 22, 2015 at 9:28 AM, Fabio Estevam wrote:
>> On Thu, Oct 22, 2015 at 8:25 AM, Jagan Teki wrote:
>>> On 20 October 2015 at 18:33, Fabio Estevam
>>> wrote:
Use the log2 and generic bitops header files directly from the kernel.
Replace numeric mask hexcodes with GENMASK macro
in tegra*.c
Cc: Stephen Warren
Cc: Tom Warren
Signed-off-by: Jagan Teki
---
drivers/spi/tegra114_spi.c | 12 ++--
drivers/spi/tegra20_sflash.c | 2 +-
drivers/spi/tegra20_slink.c | 4 ++--
3 files changed, 9 insertions(+), 9 deletio
Replace numeric mask hexcodes with GENMASK macro
in xilinx_spi
Cc: Michal Simek
Signed-off-by: Jagan Teki
---
drivers/spi/xilinx_spi.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 7620163..0713714 10
Replace numeric mask hexcodes with GENMASK macro
in cadence_qspi_apb
Cc: Fabio Estevam
Cc: Stefan Roese
Cc: Marek Vasut
Cc: Tom Rini
Acked-by: Vikas Manocha
Signed-off-by: Jagan Teki
---
drivers/spi/cadence_qspi_apb.c | 46 +-
1 file changed, 23 inser
Replace numeric mask hexcodes with GENMASK macro
in omap3_spi
Cc: Nikita Kiryanov
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/omap3_spi.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h
index f
Replace numeric mask hexcodes with GENMASK macro
in mxs_spi
Cc: Marek Vasut
Signed-off-by: Jagan Teki
---
drivers/spi/mxs_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 627644b..459c603 100644
--- a/drivers/spi/mxs_s
Replace numerical bit shift with BIT macro
in xilinx_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Michal Simek
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/xilinx_spi.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
d
Replace numeric mask hexcodes with GENMASK macro
in designware_spi
Cc: Stefan Roese
Cc: Marek Vasut
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/designware_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/d
Replace numeric mask hexcodes with GENMASK macro
in fsl_qspi
Cc: York Sun
Cc: Haikun Wang
Signed-off-by: Jagan Teki
---
drivers/spi/fsl_qspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index e1a0ec9..10733df 100644
--- a
Replace numeric mask hexcodes with GENMASK macro
in atmel_spi
Cc: Bo Shen
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/atmel_spi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 5b892d2..76b8556 100
Replace numerical bit shift with BIT macro
in sh_qspi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Nobuhiro Iwamatsu
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/sh_qspi.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers
Replace numerical bit shift with BIT macro
in tegra*.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Stephen Warren
Cc: Tom Warren
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/tegra114_spi.c | 64 ++--
drivers/spi/tegra20_
Replace numerical bit shift with BIT macro
in ti_qspi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Vignesh R
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/ti_qspi.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/ti_qspi.c
Replace numerical bit shift with BIT macro
in mpc8xxx_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/mpc8xxx_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi
Replace numerical bit shift with BIT macro
in fsl_*spi.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: York Sun
Cc: Haikun Wang
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/fsl_dspi.c | 2 +-
drivers/spi/fsl_espi.c | 20 ++--
drivers/spi/fsl_qspi.
Replace numerical bit shift with BIT macro
in omap3_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Nikita Kiryanov
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/omap3_spi.h | 48
1 file changed, 24 insertions(+), 2
Replace numerical bit shift with BIT macro
in ich
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Simon Glass
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/ich.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/ich.c b/drivers/spi/ic
Replace numerical bit shift with BIT macro
in cadence_qspi_apb
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Stefan Roese
Cc: Marek Vasut
Acked-by: Vikas Manocha
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/cadence_qspi_apb.c | 28 ++--
1
Replace numerical bit shift with BIT macro
in bfin_spi6xx
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/bfin_spi6xx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/bfin_spi6xx.c b/dri
Replace numerical bit shift with BIT macro
in designware_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Stefan Roese
Cc: Marek Vasut
Signed-off-by: Jagan Teki
---
drivers/spi/designware_spi.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/driver
Used BIT macro on zynq_spi.c and zynq_qspi.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Siva Durga Prasad Paladugu
Cc: Michal Simek
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/zynq_qspi.c | 20 ++--
drivers/spi/zynq_spi.c | 16
Replace numerical bit shift with BIT macro
in atmel_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Bo Shen
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/atmel_spi.h | 52 -
1 file changed, 26 insertions(+), 26 delet
Replace numerical bit shift with BIT macro
in altera_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 31
Cc: Marek Vasut
Reviewed-by: Tom Rini
Signed-off-by: Jagan Teki
---
drivers/spi/altera_spi.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --g
GENMASK macro used on zynq_spi.c and zynq_qspi.c
GENMASK is used to create a contiguous bitmask([hi:lo]).
Ex: (0x7 << 3) => GENMASK(5, 3)
Cc: Siva Durga Prasad Paladugu
Cc: Michal Simek
Signed-off-by: Jagan Teki
---
drivers/spi/zynq_qspi.c | 8
drivers/spi/zynq_spi.c | 6 +++---
2 f
This series replaces numerical bit shitfts and mask values
with BIT and GENMASK macro's
Changes for v5:
- Dropped exynos_spi BIT changes
- Removed GENMASK for 0XFF on cadence_qspi_qpb
- Split the commit message body
Changes for v4:
- Patch split for individual drivers.
Changes for v3, v2:
- none
On 23 October 2015 at 02:54, Tom Rini wrote:
> On Fri, Oct 23, 2015 at 02:20:08AM +0530, Jagan Teki wrote:
>
>> Replace numerical bit shift with BIT macro in exynos_spi
>>
>> :%s/(1 << nr)/BIT(nr)/g
>> where nr = 0, 1, 2 31
>>
>> Cc: Simon Glass
>> Signed-off-by: Jagan Teki
>> ---
>> drive
On Fri, Oct 23, 2015 at 03:59:18PM -0700, Stefan Agner wrote:
> Currently we return the GPIO value directly as command exit code.
> In shell exit codes, 0 means success. Hence if a GPIO is one, we
> actually return a "failure". Fix this by returning SUCCESS if the
> value is positive.
>
> This al
This patch adds the device tree binding doc for the Tegra
SPI/QSPI controllers on Tegra114 and Tegra210.
Signed-off-by: Tom Warren
---
Changes in v2:
- based it more on kernel's nvidia,tegra114-spi.txt binding
- changes based on prelim review by swar...@nvidia.com
doc/device-tree-bindings/spi/s
On Saturday, October 24, 2015 at 12:59:14 AM, Andreas Bießmann wrote:
> On 23.10.15 20:46, Marek Vasut wrote:
> > Instead of passing just the register area as a private data, introduce
> > a proper struct atmel_mci_priv structure instead. This will become useful
> > in the subsequent patch, where w
On 23.10.15 22:55, Marek Vasut wrote:
> Add 32bpp framebuffer support for the Atmel HLCDC driver. This is
> needed for output bpp higher than 16bpp.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Andreas Bießmann
> ---
> drivers/video/atmel_hlcdfb.c | 4
> 1 file changed, 4 insertions(+)
>
On 23.10.15 20:46, Marek Vasut wrote:
> Global variables are bad. Get rid of this particular one, so we can
> correctly instantiate multiple atmel mci interfaces, without having
> them interfere with one another.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Andreas Bießmann
> ---
> drivers/mmc
On 23.10.15 20:46, Marek Vasut wrote:
> Instead of passing just the register area as a private data, introduce
> a proper struct atmel_mci_priv structure instead. This will become useful
> in the subsequent patch, where we eliminate the global variable from this
> driver.
>
> Signed-off-by: Marek
Currently we return the GPIO value directly as command exit code.
In shell exit codes, 0 means success. Hence if a GPIO is one, we
actually return a "failure". Fix this by returning SUCCESS if the
value is positive.
This allows to implement scripts more naturally e.g.:
if gpio input 47; then echo
On Mon, Oct 19, 2015 at 1:14 PM, Rob Herring wrote:
> On Wed, Oct 14, 2015 at 11:55 AM, Sergey Temerkhanov
> wrote:
>> On some systems, UART initialization is performed before running U-Boot.
>> This commit allows to skip UART re-initializaion on those systems
>>
>> Signed-off-by: Sergey Temerkha
On 23.10.15 20:46, Marek Vasut wrote:
> After silencing the prints which were generated when reconfiguring the
> clock of the SD/MMC bus, surprisingly, the driver stopped working such
> that every attempt to use the SD/MMC bus caused the CPU to get totally
> stuck hard. It turns out that the print
On 23.10.15 20:46, Marek Vasut wrote:
> This driver generates clearly debugging prints when changing clock
> speed, so silence those. Furthermore, the driver generates further
> prints in case a command fails to complete. The later case woud be
> useful, but for eMMC, command 8 can fail and it's
On 23.10.15 11:23, Josh Wu wrote:
> crt0.S do both memset the bss section and call board_init_r for us, so
> remove them from board_init_f().
>
> Signed-off-by: Josh Wu
Reviewed-by: Andreas Bießmann
> ---
>
> arch/arm/mach-at91/spl_atmel.c | 5 -
> 1 file changed, 5 deletions(-)
>
> d
On 23.10.15 11:18, Josh Wu wrote:
> As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5
> boards is bigger than 16k (0x4000). That will overlap the U-Boot
> environment. So I move environment to 0x6000. And reduce its size as
> well.
>
> Signed-off-by: Josh Wu
Reviewed-by:
Dear Wenyou Yang,
On 22.09.15 09:59, Wenyou Yang wrote:
> The board supports following features:
> - Boot media support: SD card/e.MMC/SPI flash,
> - Support LCD display (optional, disabled by default),
> - Support ethernet,
> - Support USB mass storage.
>
> Signed-off-by: Wenyou Yang
> ---
Dear Wenyou Yang,
On 22.09.15 09:39, Wenyou Yang wrote:
> The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
> Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
> Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
> V3.0 specificatio
On 10/23/2015 04:14 PM, Scott Wood wrote:
> On Fri, 2015-10-23 at 20:57 +, Kevin Smith wrote:
>> On 10/23/2015 03:34 PM, Scott Wood wrote:
>>> Does Linux have this problem? Assuming no, please fix this by making the
>>> driver look more like Linux. At least then it would be the same ugliness.
On Fri, 2015-10-23 at 20:57 +, Kevin Smith wrote:
> On 10/23/2015 03:34 PM, Scott Wood wrote:
> > Does Linux have this problem? Assuming no, please fix this by making the
> > driver look more like Linux. At least then it would be the same ugliness.
> There are 2 problems and one improvement:
On 08.09.15 08:38, Wenyou Yang wrote:
> Provide the specific addresses for the Chip ID and Chip ID Extension
> registers, instead of the offset, which make it use on other chips.
>
> Signed-off-by: Wenyou Yang
Reviewed-by: Andreas Bießmann
> ---
>
> arch/arm/mach-at91/armv7/cpu.c
Dear Wenyou Yang,
On 09.09.15 04:29, Wenyou Yang wrote:
> Some peripherals may need a second clock source that may be different
> from the system clock. This second clock is the generated clock (GCK)
> and is managed by the PMC via PMC_PCR.
>
> For simplicity, the source of the GCK is fixed to PL
On 10/23/2015 03:34 PM, Scott Wood wrote:
> Does Linux have this problem? Assuming no, please fix this by making the
> driver look more like Linux. At least then it would be the same ugliness.
There are 2 problems and one improvement:
1) Invalid dereference. This is U-Boot-only code not taken fr
Add 32bpp framebuffer support for the Atmel HLCDC driver. This is
needed for output bpp higher than 16bpp.
Signed-off-by: Marek Vasut
---
drivers/video/atmel_hlcdfb.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 0ce2370
On Fri, 2015-10-23 at 19:56 +, Kevin Smith wrote:
> Hi Scott,
>
> On 10/23/2015 01:20 PM, Scott Wood wrote:
> >
> > Yuck. Could you please rework this driver to not play games with pointers
> > and one giant allocation? Why can't this function allocate each region it
> > needs separately?
>
On Fri, Oct 23, 2015 at 12:51 PM, Kevin Smith
wrote:
> The variable "buf" in this function is a char array, and the
> function ubi_volume_read is expecting a char *. In the call, the
> address of the pointer is being taken, incorrectly passing a
> char **. The compiler warning was being silenced
On Fri, Oct 23, 2015 at 10:47:28PM +0530, Jagan Teki wrote:
> On 23 October 2015 at 02:55, Tom Rini wrote:
> > On Thu, Oct 22, 2015 at 07:10:17PM -0200, Fabio Estevam wrote:
> >> On Thu, Oct 22, 2015 at 6:50 PM, Jagan Teki wrote:
> >>
> >> > reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
> >>
Hi Scott,
On 10/23/2015 01:20 PM, Scott Wood wrote:
>
> Yuck. Could you please rework this driver to not play games with pointers
> and one giant allocation? Why can't this function allocate each region it
> needs separately?
>
> -Scott
>
This driver is taken from Linux. There are a few API mod
On Mon, Oct 19, 2015 at 5:09 PM, Simon Glass wrote:
> Hi Rob,
>
> On 19 October 2015 at 14:14, Rob Herring wrote:
>> On Wed, Oct 14, 2015 at 11:55 AM, Sergey Temerkhanov
>> wrote:
>>> On some systems, UART initialization is performed before running U-Boot.
>>> This commit allows to skip UART re-
> -Original Message-
> From: Wood Scott-B07421
> Sent: 2015年10月23日 7:11
> To: Gong Qianyu-B52263
> Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> Zhiqiang-B48286; Xie Shaohui-B21989; Song Wenbin-B53747; Wood Scott-
> B07421; Kushwaha Prabhakar-B32579; Wang Huan-B18965
On Friday, October 23, 2015 at 09:26:53 AM, Stefan Roese wrote:
> The SR1500
Does SR mean Stefan Roese ? :-)
Anyway, shouldn't you place this device under board/vendorname/boardname
instead of plain board/boardname/ ?
And one more thing, would it be possible for you to do a short README on
addin
On Friday, October 23, 2015 at 07:17:28 PM, Jagan Teki wrote:
> On 23 October 2015 at 02:55, Tom Rini wrote:
> > On Thu, Oct 22, 2015 at 07:10:17PM -0200, Fabio Estevam wrote:
> >> On Thu, Oct 22, 2015 at 6:50 PM, Jagan Teki wrote:
> >> > reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
> >> >
On Friday, October 23, 2015 at 09:26:52 AM, Stefan Roese wrote:
> By defining this macro, the combined image of SPL and main U-Boot will
> get built automatically.
>
> Signed-off-by: Stefan Roese
> Cc: Marek Vasut
> Cc: Pavel Machek
> Cc: Dinh Nguyen
This is a good one, thanks!
Acked-by: Mar
On Friday, October 23, 2015 at 07:18:44 AM, maitysancha...@gmail.com wrote:
> Hello Marek,
Hi,
> Any inputs on the below?
I don't have a Vybrid device, CCing Fabio.
> Thanks & Regards,
> Sanchayan Maity.
>
> On 15-10-19 10:58:47, maitysancha...@gmail.com wrote:
> > Hello Marek,
> >
> > On 15-
On Thursday, October 22, 2015 at 10:50:18 PM, Jagan Teki wrote:
> Replace numeric mask hexcodes with GENMASK macro in cadence_qspi_apb
>
> Cc: Stefan Roese
> Cc: Vikas Manocha
> Cc: Marek Vasut
> Signed-off-by: Jagan Teki
> ---
> drivers/spi/cadence_qspi_apb.c | 48
> +
On Friday, October 23, 2015 at 09:26:51 AM, Stefan Roese wrote:
> This patch enables the usage of board-specific values for the
> environment offset and size in SPI NOR flash.
>
> Signed-off-by: Stefan Roese
> Cc: Marek Vasut
> Cc: Pavel Machek
> Cc: Dinh Nguyen
Acked-by: Marek Vasut
[...]
Global variables are bad. Get rid of this particular one, so we can
correctly instantiate multiple atmel mci interfaces, without having
them interfere with one another.
Signed-off-by: Marek Vasut
---
drivers/mmc/gen_atmel_mci.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
After silencing the prints which were generated when reconfiguring the
clock of the SD/MMC bus, surprisingly, the driver stopped working such
that every attempt to use the SD/MMC bus caused the CPU to get totally
stuck hard. It turns out that the prints generated a short delay, which
was necessary
Instead of passing just the register area as a private data, introduce
a proper struct atmel_mci_priv structure instead. This will become useful
in the subsequent patch, where we eliminate the global variable from this
driver.
Signed-off-by: Marek Vasut
---
drivers/mmc/gen_atmel_mci.c | 34 +
This driver generates clearly debugging prints when changing clock
speed, so silence those. Furthermore, the driver generates further
prints in case a command fails to complete. The later case woud be
useful, but for eMMC, command 8 can fail and it's not an error but
a part of the specification. Th
On 10/23/2015 11:52 AM, Tom Warren wrote:
Stephen,
Stephen Warren wrote at Friday, October 23, 2015 10:26 AM:
On 10/23/2015 11:11 AM, Tom Warren wrote:
This patch adds the device tree binding doc for the Tegra114 SPI
controller and the Tegra210 QSPI controller.
Initially, this should be sent
Jagan,
On Fri, Oct 23, 2015 at 3:17 PM, Jagan Teki wrote:
> On 23 October 2015 at 02:55, Tom Rini wrote:
>> On Thu, Oct 22, 2015 at 07:10:17PM -0200, Fabio Estevam wrote:
>>> On Thu, Oct 22, 2015 at 6:50 PM, Jagan Teki wrote:
>>>
>>> > reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
>>> > @@
On Fri, 2015-10-23 at 17:49 +, Kevin Smith wrote:
> Correct a null pointer dereference in board_nand_init(). Zeroed
> memory was allocated, then immediately dereferenced, which is a
> null dereference. The dereference is completely removed, since
> this pointer is later initialized in alloc_n
flash_lock call is inside a for loop, so after the first iteration flash
is locked and no more sectors can be erased.
Move flash_lock out of the loop.
Signed-off-by: Vadzim Dambrouski
---
arch/arm/cpu/armv7m/stm32f4/flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arc
Old sector number is not being cleared from FLASH_CR register. For example
when first erased sector was 001 and then you want to erase sector 010,
sector 011 gets erased instead.
This patch clears old sector number from FLASH_CR register before a new
one is written.
Signed-off-by: Vadzim Dambrousk
Instead of allocating space in the driver for the serdes
specification table, just allow the board file to set a pointer
to it. Also, allow the board to only specify the lanes that are
used instead of including unused lanes.
Signed-off-by: Kevin Smith
Cc: Stefan Roese
Cc: Dirk Eibach
Cc: Luka
The a38x serdes init and DDR training code was imported more or less as-is from
Marvell's code with formatting cleanup changes. This is a first pass at
cleaning up the code itself.
The topology data for several boards that are not supported by mainline U-Boot
are removed. Also removed is a mecha
A lot of extra configuration information was left over in the
Marvell serdes and DDR3 initialization code for boards that
U-boot does not support. Remove this extra config information,
and the concept of fixing up board topologies with information
loaded from an EEPROM. If this needs to be done,
Functions that do not modify the pointer passed should declare it
as const.
Signed-off-by: Kevin Smith
Cc: Stefan Roese
Cc: Dirk Eibach
Cc: Luka Perkov
---
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c| 2 +-
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h| 2 +-
arch/arm/mach
Stephen,
> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Friday, October 23, 2015 10:26 AM
> To: Tom Warren
> Cc: u-boot@lists.denx.de; jt...@openedev.com; Stephen Warren
> ; tomcwarren3...@gmail.com
> Subject: Re: [U-Boot] [PATCH] spi: Tegra: add device
The variable "buf" in this function is a char array, and the
function ubi_volume_read is expecting a char *. In the call, the
address of the pointer is being taken, incorrectly passing a
char **. The compiler warning was being silenced by the cast.
Remove the address operator and the cast.
Signe
Correct a null pointer dereference in board_nand_init(). Zeroed
memory was allocated, then immediately dereferenced, which is a
null dereference. The dereference is completely removed, since
this pointer is later initialized in alloc_nand_resources.
The allocation size is reduced from what was i
On Wed, Oct 21, 2015 at 5:07 AM, Hu Vincent wrote:
> Hi Joe,
>
> Would you please kindly help to pick up this patch which fixed the issue when
> using multiple Ethernet ports?
Yes, now that the merge window is open, I will be pulling in all
patches assigned to me in patchwork and testing.
-Joe
On 10/23/2015 09:47 AM, Simon Glass wrote:
Hi Stephen,
On 21 October 2015 at 14:16, Stephen Warren wrote:
On 10/17/2015 11:49 AM, Simon Glass wrote:
This is not supported with driver model, so print a message instead of
generating a build error. Rescanning PCI is not yet implemented.
dif
On 10/23/2015 10:08 AM, Tom Warren wrote:
This is the normal Tegra SPI driver modified to work with the
QSPI controller in Tegra210. It does not do 2x/4x transfers
or any other QSPI protocol.
Once the DT binding is reviewed as a Linux patch, then this patch,
Acked-by: Stephen Warren
_
On 10/23/2015 11:11 AM, Tom Warren wrote:
This patch adds the device tree binding doc for the Tegra114
SPI controller and the Tegra210 QSPI controller.
Initially, this should be sent as a Linux kernel patch, since the kernel
currently holds the definitive repository for DT bindings.
The bind
On 23 October 2015 at 02:55, Tom Rini wrote:
> On Thu, Oct 22, 2015 at 07:10:17PM -0200, Fabio Estevam wrote:
>> On Thu, Oct 22, 2015 at 6:50 PM, Jagan Teki wrote:
>>
>> > reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
>> > @@ -719,7 +719,7 @@ int cadence_qspi_apb_indirect_read_setup(struct
>
Acked-by: vikas.mano...@st.com
Rgds,
Vikas
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Thursday, October 22, 2015 1:50 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki; Stefan Roese; Vikas MANOCHA; Marek Vasut
> Subject: [PATCH v4 18/24] spi: cadence_qspi_apb
Thanks Jagan for this patch.
Acked-by: vikas.mano...@st.com
Rgds,
Vikas
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Thursday, October 22, 2015 1:50 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki; Stefan Roese; Vikas MANOCHA; Marek Vasut
> Subject: [PATCH v
On 23 October 2015 at 02:55, Tom Rini wrote:
> On Fri, Oct 23, 2015 at 02:20:00AM +0530, Jagan Teki wrote:
>
>> This series replaces numerical bit shitfts and mask values
>> with BIT and GENMASK macro's
>>
>> Changes for v4:
>> - Patch split for individual drivers.
>> Changes for v3, v2:
>> - none
This patch adds the device tree binding doc for the Tegra114
SPI controller and the Tegra210 QSPI controller.
Signed-off-by: Tom Warren
---
doc/device-tree-bindings/spi/spi-tegra.txt | 47 ++
1 file changed, 47 insertions(+)
create mode 100644 doc/device-tree-binding
On Wed, Oct 21, 2015 at 02:14:49PM +0200, Patrick Delaunay wrote:
> short strings can be used in type parameter of gpt command
> to replace the guid string for the types known by u-boot
>
> partitions = name=boot,size=0x6bc00,type=data; \
>name=root,size=0x7538ba00,type=
On Wed, Oct 21, 2015 at 02:14:48PM +0200, Patrick Delaunay wrote:
> code under flag CONFIG_PARTITION_TYPE_GUID
> add parameter "type" to select partition type guid
>
> example of use with gpt command :
>
> partitions = uuid_disk=${uuid_gpt_disk}; \
> name=boot,size=0x6bc00,uuid=${uuid_gp
From: Stephen Warren
Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 78 --
arch/arm/mach-tegra/xusb-padctl-common.h | 4 +-
2 files chan
On Wed, Oct 21, 2015 at 02:14:47PM +0200, Patrick Delaunay wrote:
> Previously, Linux used the same GUID for the data partitions as Windows
> (Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
> This created problems when dual-booting Linux and Windows in UEFI-GPT
> Setup, so a new GUID
From: Stephen Warren
Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 25 -
1 file changed, 20 insertions(
From: Stephen Warren
This file defines pr_fmt(), so the individual error() calls don't need to
include the prefix in their format strings. Doing so results in duplicate
text in any error messages. Remove the duplication.
Signed-off-by: Stephen Warren
---
v2: New patch.
---
arch/arm/mach-tegra/
From: Stephen Warren
There are some differences between the Tegra124 and Tegra210 XUSB padctl
code. So far, the common XUSB padctl code only supports Tegra124. Add
some parameters etc. so that it can work for both chips.
This also allows moving Tegra124's process_nodes() into the common file;
so
From: Stephen Warren
A future patch will soon move some of the XUSB padctl code into a common
file in arch/arm/mach-tegra. Rename the existing dummy XUSB padctl file
to avoid conflicting with that, or being confusing.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/Makefile
From: Stephen Warren
This change simply deletes code from the Tegra210 XUSB padctl driver that
is already present in the common XUSB padctl code. Since all the arrays
in tegra210_socdata are empty, this update may leave the Tegra210 XUSB
padctl driver non-functional at run-time. However, (a) this
From: Stephen Warren
A fair amount of the XUSB padctl driver will be common between Tegra124
and Tegra210. To avoid cut/paste between the two chips, create a new
file that will contain the common code, and convert the Tegra124 code to
use it. This change doesn't move every last piece of code that
On Wed, Oct 21, 2015 at 02:49:20PM -0600, Simon Glass wrote:
> Hi,
>
> On 20 October 2015 at 07:05, Rob Herring wrote:
> > On Tue, Oct 20, 2015 at 3:15 AM, Linus Walleij
> > wrote:
> >> On Tue, Oct 20, 2015 at 10:10 AM, Linus Walleij
> >> wrote:
> >>> On Mon, Oct 19, 2015 at 9:21 PM, Rob Herri
Kirkwood files cpu.c and cache.c cannot build in Thumb state;
force them in ARM state even under CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/mach-kirkw
The tricorder and tricorder_flash boards have grown too big.
Reduce their size by building them with CONFIG_SYS_THUMB_BUILD.
Signed-off-by: Albert ARIBAUD
---
Changes in v7: None
Changes in v6: None
Changes in v5:
- switched tricorder[_flash] to Thumb-1 build
Changes in v4: None
Changes in v3:
Revert commit 7a2c1b13 which dropped OpenRD boards.
Assume maintainership of OpenRD.
Remove OpenRD from scrapyard.
Switch OpenRD to generic board.
Switch to Thumb build.
Signed-off-by: Albert ARIBAUD
---
Changes in v7:
- remove openrd lines from doc/README.scrapyard
Changes in v6:
- revive Open
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