[Mesa-dev] [PATCH 21/22] i965/fb/gen6: Use meta path for stencil blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index e43e18b..6f0d5fc 100644 --- a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 13/22] i965/gen7: Configure w-tiled surfaces as y-tiled

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 37 +-- 1 file changed, 27 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 759fef5

[Mesa-dev] [PATCH] i965/gen8: Emit color calculator state whenever viewport changes

on't suffer from the missing signaling. Perhaps one of the mesa states tracked by 'brw_cc_unit' (_NEW_STENCIL, _NEW_COLOR, _NEW_DEPTH, _NEW_BUFFERS) is sufficient. Or we are just lucky. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state_upload.c | 1 + 1 file change

[Mesa-dev] [PATCH] i965/gen8: Align hiz depth clear to 8x4

This fixes framebuffer_blit_functionality_scissor_blit.test in gles3 cts. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_depth_state.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri

[Mesa-dev] [RFC] i965: Attempt to merge some surface state setup logic

nning regression tests on all SNB, IVB, HSW and BDW involved. This is based on Jordan's layered rendering and can be found in: git://people.freedesktop.org/~tpohjola/mesa:surf_state_refactor [1] http://lists.freedesktop.org/archives/mesa-dev/2013-September/044693.html Topi Pohjolainen (7): i965

[Mesa-dev] [RFC 1/7] i965: Refactor render target type resolving

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 8 src/mesa/drivers/dri/i965/gen6_depth_state.c | 8 +++- src/mesa/drivers/dri/i965/gen6_surface_state.c| 3 +-- src/mesa/drivers/dri/i965/gen7_misc_state.c | 8 +++- src/mesa

[Mesa-dev] [RFC 2/7] i965/blorp: Refactor depth override

It would be more natural to have this, for example, in "brw_state.h" but unfortunately this is later needed when resolving renderbuffer depth (in intel_fbo.h). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 12 src/mesa/driver

[Mesa-dev] [RFC 3/7] i965: Refactor renderbuffer depth override

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 6 +- src/mesa/drivers/dri/i965/gen6_surface_state.c| 3 +-- src/mesa/drivers/dri/i965/gen7_misc_state.c | 10 +- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 6 +- src

[Mesa-dev] [RFC 7/7] i965: Merge common bits of gen7/8 renderbuffer surface setup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 3 + src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 119 -- src/mesa/drivers/dri/i965/gen8_surface_state.c| 59 +-- 3 files changed, 73 insertions(+), 108 deletions

[Mesa-dev] [RFC 4/7] i965: Refactor renderbuffer target override

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 1 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 17 + src/mesa/drivers/dri/i965/gen6_depth_state.c | 17

[Mesa-dev] [RFC 6/7] i965/gen7: Add support for gen8 tiling

Prepares for merging common bits of gen7/8 renderbuffer surface setup. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 12 ++-- 3

[Mesa-dev] [RFC 5/7] i965: Refactor array type resolving

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_state.h | 9 + src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 +- src/mesa/drivers/dri/i965/gen8_surface_state.c| 13 + 3 files changed, 11 insertions(+), 25 deletions

[Mesa-dev] [PATCH] meta: Remove dither bit from blit paths that do not need it

Reviewed-by: Anuj Phogat Reviewed-by: Eric Anholt Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=81828. Signed-off-by: Topi Pohjolainen CC: Neil Roberts --- src/mesa/drivers/common/meta.c | 3 ++- src/mesa/drivers/common/meta_blit.c | 3 ++- 2 files changed, 4 insertions(+),

[Mesa-dev] [v8] EXT_image_dma_buf_import for intel

d return EGL errors codes, documentation and plane attribute checking Topi Pohjolainen (9): intel: allow packed prime buffers to be treated normally intel: do not create renderbuffers out of planar images intel: refactor planar format lookup intel: set dri image dimensions even when cre

[Mesa-dev] [v8 1/9] intel: allow packed prime buffers to be treated normally

v2: - fix earlier rebase error breaking bisect (loaderPriv -> loaderPrivate) Signed-off-by: Topi Pohjolainen Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/intel_screen.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i

[Mesa-dev] [v8 2/9] intel: do not create renderbuffers out of planar images

v2 (Chad): emit 'GL_INVALID_OPERATION' and description of error Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c ind

[Mesa-dev] [v8 3/9] intel: refactor planar format lookup

v2 (Eric): refactor both occurences, not just one v3 (Chad): replace 0 by NULL Signed-off-by: Topi Pohjolainen Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/intel_screen.c | 31 ++- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/src/mesa

[Mesa-dev] [v8 4/9] intel: set dri image dimensions even when creating out of primes

Otherwise 'intel_set_texture_image_region()' won't have enough details to work with. Signed-off-by: Topi Pohjolainen Reviewed-by: Chad Versace --- src/mesa/drivers/dri/i965/intel_screen.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_scree

[Mesa-dev] [v8 5/9] dri: propagate extra dma_buf import attributes to the drivers

): document using full extension name Signed-off-by: Topi Pohjolainen Reviewed-by: Chad Versace --- include/GL/internal/dri_interface.h | 39 - src/mesa/drivers/dri/i965/intel_regions.h | 7 + src/mesa/drivers/dri/i965/intel_screen.c | 48

[Mesa-dev] [v8 7/9] intel: restrict dma-buf-import images to external sampling only

x the comment style itself and emit description of error Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 7 +++ src/mesa/drivers/dri/i965/intel_regions.h | 9 - src/mesa/drivers/dri/i965/intel_screen.c| 1 + src/mesa/drivers/dri

[Mesa-dev] [v8 6/9] egl: definitions for EXT_image_dma_buf_import

- * line into /* Multi- * line Signed-off-by: Topi Pohjolainen Reviewed-by: Chad Versace --- src/egl/main/eglapi.c | 5 src/egl/main/egldisplay.h | 1 + src/egl/main/eglimage.c | 76 +++ src/egl/main/eglimage.h | 15

[Mesa-dev] [v8 8/9] egl/dri2: support for creating images out of dma buffers

descriptors - in case of invalid format report EGL_BAD_ATTRIBUTE instead of EGL_BAD_MATCH - take into account specific error set by the driver. v5: - fix error handling v6 (Chad): - fix invalid plane count checking Signed-off-by: Topi Pohjolainen --- src/egl/drivers/dri2/egl_dri2.c | 262

[Mesa-dev] [v8 9/9] i965: enable image external sampling for imported dma-buffers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + src/mesa/drivers/dri/i965/intel_tex_image.c | 7 +++ 2 files changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index

[Mesa-dev] [PATCH] egl/dri2: support for creating images out of dma buffers

for excess attributes Signed-off-by: Topi Pohjolainen --- src/egl/drivers/dri2/egl_dri2.c | 262 1 file changed, 262 insertions(+) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 52fcb3f..81ae271 100644 --- a/src/egl

[Mesa-dev] [RFC] OES_external_image for i965

taken quite a lot of ideas from there. Topi Pohjolainen (13): i965: extend FS sampler to surface relation to 1:N i965: extend VS sampler to surface relation to 1:N intel: support for creating planar external image textures i965: support for reserving surfaces for planar textures i965:

[Mesa-dev] [RFC 01/13] i965: extend FS sampler to surface relation to 1:N

only uses as many slots from the beginning that are really needed by the program. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 29 +++--- src/mesa/drivers/dri/i965/brw_fs.h |1 + src/mesa/drivers/dri/i965

[Mesa-dev] [RFC 02/13] i965: extend VS sampler to surface relation to 1:N

In preparation for supporting external image textures consisting of multiple planes (YUV). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h | 12 ++-- src/mesa/drivers/dri/i965/brw_vs.c | 16 src/mesa/drivers/dri

[Mesa-dev] [RFC 03/13] intel: support for creating planar external image textures

-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_tex_image.c | 21 + src/mesa/drivers/dri/intel/intel_tex_obj.h |8 2 files changed, 29 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel

[Mesa-dev] [RFC 04/13] i965: support for reserving surfaces for planar textures

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_vs.c | 22 + src/mesa/drivers/dri/i965/brw_wm.c | 25 +++- src/mesa/drivers/dri/intel/intel_tex_obj.h | 29 3 files changed, 67 insertions

[Mesa-dev] [RFC 05/13] i965: re-compile shader if external texture unit changes

. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_program.h |6 ++ src/mesa/drivers/dri/i965/brw_wm.c |7 +++ 2 files changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_program.h b/src/mesa/drivers/dri/i965/brw_program.h index 1821775..de1f111

[Mesa-dev] [RFC 06/13] intel: treat mip-tree as constant when resolving offsets

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_mipmap_tree.c |4 ++-- src/mesa/drivers/dri/intel/intel_mipmap_tree.h |2 +- src/mesa/drivers/dri/intel/intel_regions.c |2 +- src/mesa/drivers/dri/intel/intel_regions.h |2 +- 4 files changed, 5

[Mesa-dev] [RFC 07/13] i965: refactor sampling engine surface state setup

This prepares for image external textures having multiple planes and hence calling for one to set up more than one surface per texture. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 90 --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c

[Mesa-dev] [RFC 08/13] i965: support for setting surfaces for planar external

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 36 + src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 36 + 2 files changed, 72 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b

[Mesa-dev] [RFC 09/13] intel: refactor planar format lookup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 277b133..5040992 100644 --- a

[Mesa-dev] [RFC 10/13] dri: introduce YVU420 (YV12)

Signed-off-by: Topi Pohjolainen --- include/GL/internal/dri_interface.h |1 + src/mesa/drivers/dri/intel/intel_screen.c |5 + 2 files changed, 6 insertions(+) diff --git a/include/GL/internal/dri_interface.h b/include/GL/internal/dri_interface.h index 42147e9..b06bc4a 100644

[Mesa-dev] [RFC 11/13] gbm: dri: support for creating YUV formatted buffers

the image external extension as one needs a way of creating and writing YUV formatted buffers that can be further passed to EGL as images. [1] http://cgit.freedesktop.org/~krh/simple-yuv Signed-off-by: Topi Pohjolainen --- src/gbm/backends/dri/gbm_dri.c |9 src/mesa/drivers

[Mesa-dev] [RFC 12/13] i965: support for YUV formatted external textures

. I'm yet to study the vec4-backend in order to add the support for vertex shaders. (There aren't any tests or examples for them available anyway). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources |1 + src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [RFC 13/13] i965: enable image external textures

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_extensions.c |1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index bf5e2b5..33763e2 100755 --- a/src/mesa/drivers/dri/intel

[Mesa-dev] EXT_image_dma_buf_import for intel

didn't dare touching gallium side of things. Topi Pohjolainen (8): intel: do not create renderbuffers out of planar images intel: replace single region with a vector of regions intel: refactor planar format lookup intel: prepare for dri images having more than plane dri: propagate extra

[Mesa-dev] [PATCH 1/8] intel: do not create renderbuffers out of planar images

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_fbo.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index c79b56a..1b72ac6 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src

[Mesa-dev] [PATCH 3/8] intel: refactor planar format lookup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 46193b5..3d0344e 100644 --- a/src

[Mesa-dev] [PATCH 2/8] intel: replace single region with a vector of regions

No functional change in preparation for supporting multiple planes per image each having its own region. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_fbo.c | 6 +-- src/mesa/drivers/dri/intel/intel_regions.h | 7 ++- src/mesa/drivers/dri/intel/intel_screen.c

[Mesa-dev] [PATCH 4/8] intel: prepare for dri images having more than plane

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_screen.c | 101 +- 1 file changed, 71 insertions(+), 30 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 3d0344e..8716688 100644

[Mesa-dev] [PATCH 5/8] dri: propagate extra dma_buf import attributes to the drivers

Signed-off-by: Topi Pohjolainen --- include/GL/internal/dri_interface.h| 23 +++ src/egl/drivers/dri2/egl_dri2.c| 1 + src/mesa/drivers/dri/intel/intel_regions.h | 7 +++ src/mesa/drivers/dri/intel/intel_screen.c | 9 + 4 files changed, 40

[Mesa-dev] [PATCH 6/8] egl: definitions for EXT_image_dma_buf_import

As specified in: http://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_image_dma_buf_import.txt Checking for the valid fourcc values is left for drivers avoiding dependency to drm header files here. Signed-off-by: Topi Pohjolainen --- include/EGL/eglext.h | 33

[Mesa-dev] [PATCH 7/8] egl: dri2: support for creating images out of dma buffers

Signed-off-by: Topi Pohjolainen --- src/egl/drivers/dri2/egl_dri2.c | 238 1 file changed, 238 insertions(+) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 5302c0a..1ab6a82 100644 --- a/src/egl/drivers/dri2/egl_dri2

[Mesa-dev] [PATCH 8/8] intel: enable EXT_image_dma_buf_import

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/intel/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index 1ad728a..c8d6891 100755 --- a/src/mesa/drivers/dri/intel

[Mesa-dev] use fs generator to compile i965 blorp clear programs

direct EU to higher FS after which the generator can output the EU instead. This series attempts to rewrite the blorp clear programs. Topi Pohjolainen (9): i965: generate fs programs also without any 8-width instructions i965: allow fs generator use without gl_fragment_program i965: remove

[Mesa-dev] [PATCH 3/9] i965: remove redundant initialization of blorp program data

As the entire structure is memset just before compilation. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index

[Mesa-dev] [PATCH 2/9] i965: allow fs generator use without gl_fragment_program

Prepares the generator to accept hand-crafted blorp programs. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 1/9] i965: generate fs programs also without any 8-width instructions

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 6626a8c..e562db8 100644 --- a/src

[Mesa-dev] [PATCH 5/9] i965: treat the fixed blorp clear base mrf as constant

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index a937edb..d25c6cb 100644 --- a/src/mesa

[Mesa-dev] [PATCH 4/9] i965: remove unused members in blorp clear program

Documentation for R0 and R1 is taken from fs_visitor::setup_payload_gen6(). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src

[Mesa-dev] [PATCH 9/9] i965: compile replicated blorp clear program with fs generator

1 WE_normal 1H EOT }; The dump isn't available anymore with "blorp" option but with "fs". Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 77 ++- 1 file changed, 16 insertions(+), 61 deletions(-) diff --git a/src/m

[Mesa-dev] [PATCH 6/9] i965: compile non-replicated blorp clear program with fs generator

dc(16) null g114<8,8,1>F render ( RT write, 1, 0, 12) mlen 8 rlen 0 { align1 WE_normal 1H EOT }; The dump isn't available anymore with "blorp" option but with "fs". Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 27 +

[Mesa-dev] [PATCH 8/9] i965: teach fs generator to handle simd16 replicated write

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 24 2 files changed, 25 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index

[Mesa-dev] [PATCH 7/9] i965: introduce new FS IR opcode for simd16 replicated write

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers/dri/i965/brw_fs.cpp | 1 + src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 1 + src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++ 4 files changed, 5 insertions

[Mesa-dev] [PATCH 07/42] i965/blorp: unit test compiling msaa-8 cms to cms

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 62 ++ 1 file changed, 62 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index 29f815c..5d49ace

[Mesa-dev] Blorp blit compiler to use FS LIR

I'll run tests on SNB also once I get my hands on one. Topi Pohjolainen (42): i965/fs: generate fs programs also without any 8-width instructions i965/fs: allow fs-generator use without gl_fragment_program i965: dump the disassembly to the given file i965/blorp: allow unit tests to c

[Mesa-dev] [PATCH 06/42] i965/blorp: unit test compiling msaa-8 ums to cms

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 61 ++ 1 file changed, 61 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index d48c3db..29f815c

[Mesa-dev] [PATCH 14/42] i965/blorp: unit test compiling simple gen6 zero-src sampled

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 51 ++ 1 file changed, 51 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index ec590ed..1545148

[Mesa-dev] [PATCH 13/42] i965/blorp: unit test compiling gen6 msaa-8 cms alpha blend

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 57 ++ 1 file changed, 57 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index fb9a60a..ec590ed

[Mesa-dev] [PATCH 09/42] i965/blorp: unit test compiling msaa-8 cms alpha blend

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 145 + 1 file changed, 145 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index fa6b53d..9692ce4

[Mesa-dev] [PATCH 20/42] i965: rename tex_ms to tex_cms

Prepares for the introduction of non-compressed multi-sampled lookup used in the blorp programs. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h | 2 +- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_generator.cpp

[Mesa-dev] [PATCH 12/42] i965/blorp: unit test compiling bilinear filtered

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 49 ++ 1 file changed, 49 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index e87ad60..fb9a60a

[Mesa-dev] [PATCH 02/42] i965/fs: allow fs-generator use without gl_fragment_program

Prepares the generator to accept hand-crafted blorp programs. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 15/42] i965/blorp: unit test compiling integer typed texture fetches

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 86 ++ 1 file changed, 86 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index 1545148..8b0cac2

[Mesa-dev] [PATCH 03/42] i965: dump the disassembly to the given file

instead of ignoring the argument and always dumping to standard output. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_eu.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri

[Mesa-dev] [PATCH 08/42] i965/blorp: unit test compiling msaa-4 ums to cms

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 59 ++ 1 file changed, 59 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index 5d49ace..fa6b53d

[Mesa-dev] [PATCH 41/42] i965/eu: introduce blorp specific flavour of lrp

This is rather ugly but as I couldn't think of anything better for now and wanted to get the rest of the series under review, I left it as it is. Even though immediately surrounding code has tabs this piece is written space-indented. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri

[Mesa-dev] [PATCH 11/42] i965/blorp: unit test compiling simple zero-src sampled

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 56 ++ 1 file changed, 56 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index 1d57640..e87ad60

[Mesa-dev] [PATCH 05/42] i965/blorp: unit test compiling blend and scaled

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/.gitignore | 1 + src/mesa/drivers/dri/i965/Makefile.am | 8 +- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 331 + 3 files changed, 339 insertions(+), 1 deletion(-) create

[Mesa-dev] [PATCH 19/42] i965/blorp: move emission of pixel kill into eu-emitter

The combination of four separate comparison operations and and the masked "and" require special treatment when moving to FS LIR. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 26 +++-- src/mesa/drivers/dri/i965/brw_blorp_b

[Mesa-dev] [PATCH 27/42] i965/blorp: wrap LRP

The split of the emission of the two halfs into single emission call prapares for fs_generator support that already does similar thing. No regressions seen on IVB (unit tests and piglit quick). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 26

[Mesa-dev] [PATCH 36/42] i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 22/42] i965/blorp: move emission of texture lookup into eu-emitter

Resolving of the hardware message type is moved into the emitter also in preparation for switching to use fs_generator. The generator wants to translate the high level op-code into the message type and hence the emitter needs to know the original op-code. Signed-off-by: Topi Pohjolainen --- src

[Mesa-dev] [PATCH 21/42] i965/fs: introduce non-compressed equivalent of tex_cms

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h| 1 + src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 + src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++ 3 files changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b

[Mesa-dev] [PATCH 10/42] i965/blorp: unit test compiling unaligned msaa-8

Signed-off-by: Topi Pohjolainen --- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 135 + 1 file changed, 135 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp b/src/mesa/drivers/dri/i965/test_blorp_blit_eu_gen.cpp index 9692ce4..1d57640

[Mesa-dev] [PATCH 32/42] i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 24 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 29/42] i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 78 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 46 insertions(+), 39 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 34/42] i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 18 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers

[Mesa-dev] [PATCH 31/42] i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 24 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 +++ 2 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 42/42] i965/blorp: switch eu-emitter to use FS IR and fs_generator

: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp| 118 - src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 63 +-- .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp| 6 +- 3 files changed, 83 insertions(+), 104 deletions(-) diff --git a

[Mesa-dev] [PATCH 04/42] i965/blorp: allow unit tests to compile and dump assembly

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 --- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 51a3bef..112a307 100644

[Mesa-dev] [PATCH 25/42] i965/blorp: wrap emission of conditional assignment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 --- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 11 +++ 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 24/42] i965/blorp: move emission of sample combining into eu-emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 13 - src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 12 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 5 + 3 files changed, 21 insertions(+), 9 deletions(-) diff --git a

[Mesa-dev] [PATCH 26/42] i965/blorp: wrap emission of if-equal-assignment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 30 ++- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 12 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 38/42] i965/fs: allow unit tests to dump the final patched assembly

)' is run (the default dump of the fs_generator does this before). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs.h | 7 +-- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 15 +-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git

[Mesa-dev] [PATCH 18/42] i965/blorp: introduce separate eu-emitter for blit compiler

Prepares for presenting blorp blit programs using FS IR that allows EU-assembly generation using i965 glsl-compiler backend (fs_generator). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 41

[Mesa-dev] [PATCH 40/42] i965/fs: add support for BRW_OPCODE_AVG in fs_generator

Needed for compiling blorp blit programs. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 4c159e6

[Mesa-dev] [PATCH 30/42] i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)

In addition, the special case requiring explicit execution size control is wrapped manually. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 34 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 16 + 2 files changed, 32

[Mesa-dev] [PATCH 23/42] i965/blorp: move emission of rt-write into eu-emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 15 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 18 ++ src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 5 + 3 files changed, 28 insertions(+), 10 deletions(-) diff

[Mesa-dev] [PATCH 33/42] i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 48 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 7 2 files changed, 31 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 35/42] i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 ++ 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 17/42] i965/blorp: reduce the scope of the explicit compression control

By highlighting these special cases makes it clearer to switch to the fs-generator as the wider scoped compression control settings used in the current implementation can be simply dropped. No regressions on IVB (piglit quick + unit tests). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers

[Mesa-dev] [PATCH 37/42] i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitter

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 +- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 18 ++ 2 files changed, 23 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa

[Mesa-dev] [PATCH 16/42] i965/blorp: remove dependency to compression control state

the explicit compression control modifiers in the blit compiler. After this patch there are no nested state control levels making the constant nature of the compression settings more apparent. No regressions on IVB (piglit quick + unit tests). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers

[Mesa-dev] [PATCH 39/42] i965/fs: introduce blorp specific rt-write for fs_generator

update the binding tables associated with the compiler bookkeeping (this in fact gets thrown away as the blorp compiler sets the program data in its own way). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_defines.h| 1 + src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 01/42] i965/fs: generate fs programs also without any 8-width instructions

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 0cc574c..2381fb0 100644 --- a/src

[Mesa-dev] [PATCH 28/42] i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)

In addition, the two special cases requiring explicit execution size control are wrapped manually. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 68 +-- src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 12 + 2 files changed, 45

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