In preparation for supporting external image textures consisting of multiple planes (YUV).
Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/mesa/drivers/dri/i965/brw_context.h | 12 ++++++++++-- src/mesa/drivers/dri/i965/brw_vs.c | 16 ++++++++++++++++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 ++++---- 3 files changed, 30 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 531fc26..b64a39f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -259,15 +259,23 @@ static inline uint32_t AUB_TRACE_SUBTYPE(enum state_struct_type ss_type) return ss_type & 0xFFFF; } +/** Number of texture sampler units */ +#define BRW_MAX_TEX_UNIT 16 + /** Subclass of Mesa vertex program */ struct brw_vertex_program { struct gl_vertex_program program; GLuint id; + /** See equivalent member of 'brw_fragment_program' for details */ + uint32_t sampler_to_surf_state_start[BRW_MAX_TEX_UNIT]; }; +static inline uint32_t brw_surf_index_vs_texture( + const struct brw_vertex_program *vp, unsigned sampler) +{ + return vp->sampler_to_surf_state_start[sampler]; +} -/** Number of texture sampler units */ -#define BRW_MAX_TEX_UNIT 16 /** Subclass of Mesa fragment program */ struct brw_fragment_program { diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 64659c0..0d6d60b 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -205,6 +205,19 @@ brw_vs_prog_data_compare(const void *in_a, const void *in_b, return true; } +static void brw_vs_surf_setup(GLbitfield samplers, + uint32_t *sampler_to_surf_state_start) +{ + unsigned num_samplers = _mesa_fls(samplers); + unsigned surf_index = 0; + + for (unsigned s = 0; s < num_samplers; s++) { + if (samplers & (1 << s)) { + sampler_to_surf_state_start[s] = SURF_INDEX_VS_TEXTURE(surf_index++); + } + } +} + static bool do_vs_prog(struct brw_context *brw, struct gl_shader_program *prog, @@ -278,6 +291,9 @@ do_vs_prog(struct brw_context *brw, true); } + brw_vs_surf_setup(c.vp->program.Base.SamplersUsed, + c.vp->sampler_to_surf_state_start); + /* Emit GEN4 code. */ program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 7e17e5d..a65752e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -1373,16 +1373,16 @@ brw_update_texture_surfaces(struct brw_context *brw) unsigned num_samplers = _mesa_fls(vs->SamplersUsed | fs->SamplersUsed); for (unsigned s = 0; s < num_samplers; s++) { - brw->vs.surf_offset[SURF_INDEX_VS_TEXTURE(s)] = 0; - if (vs->SamplersUsed & (1 << s)) { const unsigned unit = vs->SamplerUnits[s]; /* _NEW_TEXTURE */ if (ctx->Texture.Unit[unit]._ReallyEnabled) { intel->vtbl.update_texture_surface(ctx, unit, - brw->vs.surf_offset, - SURF_INDEX_VS_TEXTURE(s)); + brw->vs.surf_offset, + brw_surf_index_vs_texture( + (const struct brw_vertex_program *)brw->vertex_program, + s)); } } -- 1.7.9.5 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev