Re: [Mesa-dev] [PATCH v3 14/14] anv: Trivially implement multiDrawIndirect

On Thu, 2017-04-27 at 09:31 -0700, Jason Ekstrand wrote: > --- >  src/intel/vulkan/anv_device.c  |  2 +- >  src/intel/vulkan/genX_cmd_buffer.c | 56 ++ > >  2 files changed, 34 insertions(+), 24 deletions(-) > > diff --git a/src/intel/vulkan/anv_device.c > b

Re: [Mesa-dev] [PATCH v3 14/14] anv: Trivially implement multiDrawIndirect

On Wed, 2017-05-03 at 09:04 +0200, Iago Toral wrote: > On Thu, 2017-04-27 at 09:31 -0700, Jason Ekstrand wrote: > > > > --- > >  src/intel/vulkan/anv_device.c  |  2 +- > >  src/intel/vulkan/genX_cmd_buffer.c | 56 ++ > > > >  2 files changed, 34 insertions(+

Re: [Mesa-dev] [PATCH v3 00/13] anv: Implement VK_KHX_multiview

Hi Jason Sorry that I missed this. All the changes look good to me and I have sent reviews for the patches that missed them. With this series we pass all the multiview tests. Iago On Thu, 2017-04-27 at 09:31 -0700, Jason Ekstrand wrote: > This is mostly a re-send of my earlier patches but there

Re: [Mesa-dev] [PATCH 2/2] mesa: make _mesa_accum() static

Why don't inline _mesa_acum()? Usually, we remove the '_' for static mesa functions right? On 05/03/2017 05:38 AM, Timothy Arceri wrote: --- src/mesa/main/accum.c | 104 +- src/mesa/main/accum.h | 3 -- 2 files changed, 52 insertions(+), 55

Re: [Mesa-dev] [PATCH 1/2] mesa: tidy up accum.h

Reviewed-by: Samuel Pitoiset On 05/03/2017 05:38 AM, Timothy Arceri wrote: These were unused. --- src/mesa/main/accum.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/main/accum.h b/src/mesa/main/accum.h index a5665c7..ede2ecc 100644 --- a/src/mesa/main/accum.h +++ b/src/mesa/

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: remove unrequired tgsi_get_opcode_info() call

Reviewed-by: Samuel Pitoiset On 05/03/2017 02:48 AM, Timothy Arceri wrote: This is already set for the instruction at initialisation. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp

[Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

Take it into account when checking if the mapping failed. Signed-off-by: Samuel Iglesias Gonsálvez --- src/intel/vulkan/anv_allocator.c | 2 +- src/intel/vulkan/anv_image.c | 4 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vu

[Mesa-dev] [PATCH] i965: Set modifier for imported and duplicated images

When a buffer is being created from FD or GEM flink import, the current API makes no provision for passing modifier information along with this. Set the modifier for such images to DRM_FORMAT_MOD_INVALID. Also preserve the modifier when duplicating an image, as will be done by GBM when importing f

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: remove unrequired tgsi_get_opcode_info() call

Reviewed-by: Marek Olšák Marek On Wed, May 3, 2017 at 2:48 AM, Timothy Arceri wrote: > This is already set for the instruction at initialisation. > --- > src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/mesa/state_tracker/s

[Mesa-dev] [PATCH] glsl: rename image_* qualifiers to memory_*

It doesn't make sense to prefix them with 'image' because they are called "Memory Qualifiers" and they can be applied to members of storage buffer blocks. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast_function.cpp | 10 +++--- src/compiler/glsl/ast_to_hir.cpp | 54 ++

[Mesa-dev] i965: Use isl for hiz and stencil

Patches 1-17 are revision that - rework hiz on gen6 to use on-demand offset calculator allowing one to drop dependency to miptree structure and - rework all auxiliary surfaces to be created against isl directly. Patches 18 and 19 introduce new surface layout in ISL. This is called back-t

[Mesa-dev] [v2 01/39] i965/dbg: Add means for forcing stencil sampling using y-tiled copy

While gen >= 8 can sample w-tiled stencil surfaces just fine, this option allows testing of the legacy behavior even on gen8+. Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp.c | 4 +++- src/intel/blorp/blorp_blit.c | 9 +++-- src/inte

[Mesa-dev] [v2 02/39] i965/gen6: Remove dead code in hiz surface setup

In intel_hiz_miptree_buf_create() the miptree is unconditionally created with MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-)

[Mesa-dev] [v2 03/39] i965/blorp/gen6: Drop unnecessary stencil/hiz surf dimension adjust

Hardware state setup only needs offset and pitch and ignores the rest. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 57 --- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/src/mesa/drivers

[Mesa-dev] [v2 04/39] i965/gen6: Calculate stencil offset on demand

This is kept on purpose in i965. It can be moved to ISL if it is needed in vulkan. Pointers to miptrees are given solely for verification purposes. These will be dropped in following patches. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layo

[Mesa-dev] [v2 05/39] i965/gen6: Calculate hiz offset on demand

This is kept on purpose in i965. It can be moved to ISL if it is needed in vulkan. Pointers to miptrees are given solely for verification purposes. These will be dropped in following patches. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layo

[Mesa-dev] [v2 06/39] i965/blorp/gen6: Use on-demand stencil/hiz offset resolvers

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index bb40885..5a9d21c 1

[Mesa-dev] [v2 08/39] i965/blorp/gen6: Set aux pitch directly

dropping dependency to intel_miptree_get_aux_isl_surf(). Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/dri

[Mesa-dev] [v2 07/39] i965/gen6: Drop miptrees in depth/stencil offset resolvers

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 8 src/mesa/drivers/dri/i965/brw_tex_layout.c| 19 +-- src/mesa/drivers/dri/i965/gen6_depth_state.c | 4 ++-- src/mesa/drivers/dri/i965/intel_mipmap_tre

[Mesa-dev] [v2 09/39] i965/gen6/hiz: Add direct buffer size resolver

The apparent hack adding unconditionally two lines into cube maps is taken directly from align_cube(). v2: Apply the cube map hack also for non-mipmapped. But apply it only for cube-map, not for cube-map-array to keep things as they were (use mt->target == GL_TEXTURE_CUBE_MAP instead o

[Mesa-dev] [v2 10/39] i965/gen6: Allocate hiz directly without miptree

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 13 +--- src/mesa/drivers/dri/i965/gen6_depth_state.c | 8 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 46 +-- src/mesa/drivers/dri/i965/intel_m

[Mesa-dev] [v2 11/39] i965/miptree: Refactor aux surface allocation

Reviewed-by: Jason Ekstrand (v1) Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 60 +-- 1 file changed, 39 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mi

[Mesa-dev] [v2 14/39] i965/miptree: Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD in mcs init

because buffers get unconditionally initialised by cpu writing. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [v2 13/39] i965/miptree: Use ISL for MCS layouts

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 6 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 101 --- src/mesa/drivers/dri/i965/intel_mi

[Mesa-dev] [v2 15/39] i965/miptree/gen7+: Use ISL for HIZ layouts

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 6 +- src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 4

[Mesa-dev] [v2 12/39] i965/miptree: Refactor ISL aux usage resolver

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 47 +++- src/mesa/drivers/dri/i965/intel_mipm

[Mesa-dev] [v2 16/39] i965/blorp: Use hiz surface instead of creating copy

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 25 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 ++ 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_

[Mesa-dev] [v2 20/39] i965/hiz/gen6: Use isl back-to-back layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 11 +++- src/mesa/drivers/dri/i965/brw_tex_layout.c| 56 -- src/mesa/drivers/dri/i965/gen6_depth_state.c | 18 +++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 84 ---

[Mesa-dev] [v2 18/39] intel/isl/gen6: Add offsetting support for back-to-back layouts

Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp_blit.c | 2 +- src/intel/isl/isl.c | 29 +--- src/intel/isl/isl.h | 14 ++-- src/intel/isl/isl_gen6.c | 46 +++ src/intel/isl/isl_st

[Mesa-dev] [v2 19/39] intel/isl/gen6: Add size calculator for back-to-back layouts

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 26 ++ src/intel/isl/isl.h | 6 ++ src/intel/isl/isl_gen6.c | 27 +++ 3 files changed, 51 insertions(+), 8 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c

[Mesa-dev] [v2 17/39] i965: Use stored hiz surface instead of creating copy

Now the last user of intel_miptree_get_aux_isl_surf() is gone. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 77 src/mesa/drivers/dri/i965/inte

[Mesa-dev] [v2 21/39] intel/isl/gen6/hack: Use hiz vertical alignment of 16 instead of 8

Looking PRMs (SNB, IVB) it also looks to me that the height of hiz buffer would need to be half the height of depth. How this is taken into account in i965 legacy or isl is unclear to me also. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_gen6.c | 40 +

[Mesa-dev] [v2 22/39] i965/miptree: Add support for resolving offsets using isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 12 +-- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 11 ++- src/mesa/drivers/dri/i965/intel_blit.c | 8 +- src/mesa/drivers/dri/i965/intel_fbo.c| 9 +- src/mesa/drivers/dri/i9

[Mesa-dev] [v2 26/39] i965: Prepare image validation for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12 1 file changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 3a4ac14..55f6027 100644 --- a/src/mesa/drivers/d

[Mesa-dev] [v2 23/39] i965/blorp: Add support for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 0235681..158cf66 100644 --- a/src/mesa/drivers/dri/i965/brw_b

[Mesa-dev] [v2 31/39] i965/tex: Prepare image update for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_image.c | 19 --- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 9aa2f70..14de748 100644 --- a/s

[Mesa-dev] [v2 29/39] i965: Prepare slice validator for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 672b5f4..e699bb9 100644 --- a/s

[Mesa-dev] [v2 25/39] i965: Prepare blit engine for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 37 +- src/mesa/drivers/dri/i965/intel_blit.h | 13 2 files changed, 41 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/

[Mesa-dev] [v2 28/39] i965: Prepare tex, img and rt state emission for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 25 +--- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 59415e1..3f

[Mesa-dev] [v2 27/39] i965: Refactor miptree to isl converter and adjustment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 69 ++-- 1 file changed, 41 insertions(+), 28 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index b3d9382..5

[Mesa-dev] [v2 30/39] i965: Prepare framebuffer validator for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 33 ++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 27446cc..0783b31 100644 --- a/src/m

[Mesa-dev] [v2 24/39] i965: Prepare up/downsampling for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 46 ++- 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index e91992c..3a4ac14

[Mesa-dev] [v2 33/39] i965: Prepare slice copy for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 55f6027..4ddcb13 100644 --- a/src/mesa

[Mesa-dev] [v2 32/39] i965: Prepare texture validator for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_validate.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c index 08cf3bf..d606922 100644 --- a/src/m

[Mesa-dev] [v2 34/39] i965/gen7: Prepare depth state emission for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_misc_state.c | 26 -- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index 8e87222..f3ecab3 100644

[Mesa-dev] [v2 39/39] i965/miptree: Represent y-tiled stencil copies with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 +- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index febe880..6280ec4 10064

[Mesa-dev] [v2 37/39] intel/isl/gen7/hack: Use stencil vertical alignment of 8 instead of 4

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_gen7.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c index 18687b5..cf5b377 100644 --- a/src/intel/isl/isl_gen7.c +++ b/src/intel/isl/isl_gen7.c @@ -375,7 +375,11 @

[Mesa-dev] [v2 38/39] i965/miptree: Represent w-tiled stencil surfaces with isl

leaving y-tiled (r8stencil) copies still as they were. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 24 +++ src/mesa/drivers/dri/i965/brw_tex_layout.c| 57 --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 31 +++---

[Mesa-dev] [v2 35/39] i965/gen8+: Prepare depth state emission for isl based miptrees

Also drops unnecessary check for stencil_mt when setting qpitch - that is inside stencil_mt guarded block already. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_depth_state.c | 38 +++- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/sr

[Mesa-dev] [v2 36/39] i965: Add isl based miptree creator

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 91 +++ 1 file changed, 91 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 4ddcb13..ced1e0e 100644 --- a/src

Re: [Mesa-dev] [PATCH 2/2] mesa: make _mesa_accum() static

On 03/05/17 17:27, Samuel Pitoiset wrote: Why don't inline _mesa_acum()? inline is only meaningful if the function is in the header. Just marking it as static will do the same thing in a c file. i.e leave it up to the compiler as to whether it should be inlined or not. At least that's how I

Re: [Mesa-dev] [PATCH 2/2] mesa: make _mesa_accum() static

On 05/03/2017 11:30 AM, Timothy Arceri wrote: On 03/05/17 17:27, Samuel Pitoiset wrote: Why don't inline _mesa_acum()? inline is only meaningful if the function is in the header. Just marking it as static will do the same thing in a c file. i.e leave it up to the compiler as to whether it

Re: [Mesa-dev] [PATCH 1/4] r600g: avoid redundant DB registerupdates

Hi Constantine, Am Mittwoch, 3. Mai 2017, 05:48:14 CEST schrieb Constantine Kharlamov: > On 03.05.2017 00:50, Constantine Kharlamov wrote: > > On 28.04.2017 10:57, Marc Dietrich wrote: > >> Hi Constantine, > >> > >> Am Donnerstag, 27. April 2017, 21:04:37 CEST schrieb Constantine Kharlamov: > >>

Re: [Mesa-dev] [PATCH 1/4] r600g: avoid redundant DB registerupdates

On 03.05.2017 12:31, Marc Dietrich wrote: > Hi Constantine, > > Am Mittwoch, 3. Mai 2017, 05:48:14 CEST schrieb Constantine Kharlamov: >> On 03.05.2017 00:50, Constantine Kharlamov wrote: >>> On 28.04.2017 10:57, Marc Dietrich wrote: Hi Constantine, Am Donnerstag, 27. April 2017, 21

Re: [Mesa-dev] [PATCH] etnaviv: add L8A8_UNORM texture format

On Tue, 2017-05-02 at 22:06 +0200, Christian Gmeiner wrote: > No piglit regressions. > > Signed-off-by: Christian Gmeiner Reviewed-by: Philipp Zabel > --- > src/gallium/drivers/etnaviv/etnaviv_format.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/src/gallium/drivers/etnaviv/etn

[Mesa-dev] [Bug 100690] [Regression, bisected] TotalWar: Warhammer corrupted graphics

https://bugs.freedesktop.org/show_bug.cgi?id=100690 --- Comment #12 from Gregor Münch --- I saw something like that before. Sometimes the red squares appeared, sometimes it was like on your picture and sometimes it was just very dark when you zoomed out. I played now different factions but after

Re: [Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

Hi Samuel, On 3 May 2017 at 08:57, Samuel Iglesias Gonsálvez wrote: > Take it into account when checking if the mapping failed. > > Signed-off-by: Samuel Iglesias Gonsálvez > --- > src/intel/vulkan/anv_allocator.c | 2 +- > src/intel/vulkan/anv_image.c | 4 > 2 files changed, 5 inserti

Re: [Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

On Wed, 2017-05-03 at 11:50 +0100, Emil Velikov wrote: > Hi Samuel, > > On 3 May 2017 at 08:57, Samuel Iglesias Gonsálvez om> wrote: > > Take it into account when checking if the mapping failed. > > > > Signed-off-by: Samuel Iglesias Gonsálvez > > --- > >  src/intel/vulkan/anv_allocator.c | 2 +

Re: [Mesa-dev] [PATCH 01/18] anv/allocator: Add no-valgrind versions of state_pool_alloc/free

On Thu, 2017-04-27 at 20:34 -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 9:20 AM, Juan A. Suarez Romero > wrote: > > On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > > > --- > > >  src/intel/vulkan/anv_allocator.c | 24 +++- > > >  1 file changed, 19 inserti

Re: [Mesa-dev] [PATCH v2 1/2] i965/vec4: fix swizzle and writemask when loading an uniform with constant offset

On Tue, 2017-05-02 at 12:23 -0700, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > > > El Viernes, 28 de abril de 2017 16:08:35 Francisco Jerez escribió: > > > Samuel Iglesias Gonsálvez writes: > > > > It was setting XYWZ swizzle and writemask to all uniforms, no > > > > matter if >

Re: [Mesa-dev] [PATCH 03/18] anv/allocator: Convert the state stream to pull from a state pool

On Fri, 2017-04-28 at 10:31 +0200, Juan A. Suarez Romero wrote: > On Thu, 2017-04-27 at 20:30 -0700, Jason Ekstrand wrote: > > On Wed, Apr 26, 2017 at 9:04 AM, Juan A. Suarez Romero > > wrote: > > > On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > > > > --- > > > >   src/intel/vulkan/an

Re: [Mesa-dev] [PATCH 06/18] anv/allocator: Roll fixed_size_state_pool into state_pool

Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > The helper functions aren't really gaining us as much as they claim and > are actually about to be in the way. > --- > src/intel/vulkan/anv_allocator.c | 85 > +---

[Mesa-dev] [PATCH v3 2/2] i965/vec4: load dvec3/4 uniforms first in the push constant buffer

Reorder the uniforms to load first the dvec4-aligned variables in the push constant buffer and then push the vec4-aligned ones. This fixes a bug were the dvec3/4 might be loaded one part on a GRF and the rest in next GRF, so the region parameters to read that could break the HW rules. v2: - Fix b

Re: [Mesa-dev] [PATCH V3] glapi: add KHR_no_error support to dispatch table generation

On 03.05.2017 06:25, Timothy Arceri wrote: This will allows us to create no error versions of functions noted by a _no_error suffix. We also need to set a no_error attribute equal to "true" in the xml. V3: stop the no_error attribute being overwritten when functions alias another. V2: tidy u

Re: [Mesa-dev] [PATCH 01/13] gallium/dri: always link against shared glapi

On 28.04.2017 15:14, Emil Velikov wrote: From: Emil Velikov In the early days of Xorg and Mesa we had multiple providers of the GLAPI. All of those were the ones responsible for dlopening the DRI module. Hence it was perfectly fine, and actually expected, for the DRI modules to have unresolved

Re: [Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

On 3 May 2017 at 12:33, Samuel Iglesias Gonsálvez wrote: > On Wed, 2017-05-03 at 11:50 +0100, Emil Velikov wrote: >> Hi Samuel, >> >> On 3 May 2017 at 08:57, Samuel Iglesias Gonsálvez > om> wrote: >> > Take it into account when checking if the mapping failed. >> > >> > Signed-off-by: Samuel Iglesi

Re: [Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

On Wed, 2017-05-03 at 14:15 +0100, Emil Velikov wrote: > On 3 May 2017 at 12:33, Samuel Iglesias Gonsálvez om> wrote: > > On Wed, 2017-05-03 at 11:50 +0100, Emil Velikov wrote: > > > Hi Samuel, > > > > > > On 3 May 2017 at 08:57, Samuel Iglesias Gonsálvez > > ia.c > > > om> wrote: > > > > Take i

[Mesa-dev] [Bug 99591] Segmentation fault when running vulkaninfo with RADV Radeon Vulkan driver

https://bugs.freedesktop.org/show_bug.cgi?id=99591 --- Comment #8 from Vasilis LIaskovitis --- I am getting a very similar backtrace in radv (with git master Vulkan-LoaderAndValidationLayers): (gdb) bt #0 0x0001e006 in ?? () #1 0x7fffedcc7e42 in radv_lookup_entrypoint (name=) at ra

Re: [Mesa-dev] [PATCH] anv: anv_gem_mmap() returns MAP_FAILED as mapping error

On 3 May 2017 at 14:26, Samuel Iglesias Gonsálvez wrote: > On Wed, 2017-05-03 at 14:15 +0100, Emil Velikov wrote: >> On 3 May 2017 at 12:33, Samuel Iglesias Gonsálvez > om> wrote: >> > On Wed, 2017-05-03 at 11:50 +0100, Emil Velikov wrote: >> > > Hi Samuel, >> > > >> > > On 3 May 2017 at 08:57, Sa

Re: [Mesa-dev] [PATCH] radv/wsi: report presentation error per image request

On 2 May 2017 at 04:41, Dave Airlie wrote: > From: Dave Airlie > > This ports > 0fcb92c17dee681bd39c08ddf0abc358a27337c7 > anv: wsi: report presentation error per image request > > This fixes: > dEQP-VK.wsi.xlib.incremental_present.scale_none.* > > Signed-off-by: Dave Airlie Worth adding to stab

[Mesa-dev] [PATCH 1/2] radeonsi: split per-patch from per-vertex indices

From: Nicolai Hähnle Make it a bit clearer that the index spaces are logically seperate by having them defined in different functions. --- src/gallium/drivers/radeonsi/si_shader.c| 56 + src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/r

[Mesa-dev] [PATCH 2/2] radeonsi: get rid of secondary input/output word

From: Nicolai Hähnle We only advertise a maximum of 32 inputs and outputs in each shader stage, so everything fits into 64 bits. --- src/gallium/drivers/radeonsi/si_shader.c| 35 +++--- src/gallium/drivers/radeonsi/si_shader.h| 6 +--- src/gallium/drivers/radeons

[Mesa-dev] [PATCH 0/4] radeonsi: fix gl_PrimitiveID bugs related to tesselation

Hi, This series fixes a few subtle bugs when using gl_PrimitiveID and tessellation. I've also sent out a bunch of new piglit tests to exercise gl_PrimitiveID + instancing (+ tessellation). Please review! Thanks, Nicolai -- src/gallium/drivers/radeonsi/si_state_draw.c | 18 +- .../drivers

[Mesa-dev] [PATCH 2/4] radeonsi: load patch_id for TES-as-ES when exporting for PS

From: Nicolai Hähnle For some reason, this change is only necessary on SI. Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/radeonsi/si_state_shaders.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gal

[Mesa-dev] [PATCH 4/4] radeonsi: clarify documentation of existing SI workaround

From: Nicolai Hähnle Limiting LS-HS to a single wave is required on all SI chips due to an issue with a power management feature. --- src/gallium/drivers/radeonsi/si_state_draw.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c

[Mesa-dev] [PATCH 1/4] radeonsi: fix primitive ID in fragment shader when using tessellation

From: Nicolai Hähnle In a VS->TCS->TES->PS pipeline, the primitive ID is read from TES exports, so it is as if TES were using the primitive ID. Specifically, this fixes a bug where the primitive ID is not reset at the start of a new instance. Cc: mesa-sta...@lists.freedesktop.org --- src/galli

[Mesa-dev] [PATCH 3/4] radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI

From: Nicolai Hähnle Cc: mesa-sta...@lists.freedesktop.org --- src/gallium/drivers/radeonsi/si_state_draw.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index e6a9ee0..3d1d1f8 1006

Re: [Mesa-dev] [PATCH] gbm/dri: Fix sign-extension in modifier query

On 2 May 2017 at 19:49, Daniel Stone wrote: > When we were assembling the unsigned 64-bit query return from its > two signed 32-bit component parts, the lower half was getting > sign-extended into the top half. Be more explicit about what we want to > do. > > Fixes gbm_bo_get_modifier() returning

Re: [Mesa-dev] [PATCH] gbm/dri: Fix sign-extension in modifier query

On 3 May 2017 at 15:15, Emil Velikov wrote: > On 2 May 2017 at 19:49, Daniel Stone wrote: >> - ret |= mod; >> + ret |= (uint64_t)(mod & 0x); >> > I was itching to suggest the following from the start, but your patch > also works ;-) > Fixes: 8378c576abd ("gbm: Export a get modifiers")

Re: [Mesa-dev] [PATCH v2 2/4] egl, dri: Propagate context priority hint to driver->CreateContext

On Wed, Apr 12, 2017 at 02:58:50PM +0100, Emil Velikov wrote: > On 11 April 2017 at 17:11, Chris Wilson wrote: > > Jump through the layers of abstraction between egl and dri in order to > > feed the context priority attribute through to the backend. This > > requires us to read the value from the

Re: [Mesa-dev] [PATCH] i965: Set modifier for imported and duplicated images

Hi Dan, On 3 May 2017 at 09:43, Daniel Stone wrote: > When a buffer is being created from FD or GEM flink import, the current > API makes no provision for passing modifier information along with this. > Set the modifier for such images to DRM_FORMAT_MOD_INVALID. > > Also preserve the modifier whe

Re: [Mesa-dev] [PATCH] gbm/dri: Fix sign-extension in modifier query

On 3 May 2017 at 15:18, Daniel Stone wrote: > On 3 May 2017 at 15:15, Emil Velikov wrote: >> On 2 May 2017 at 19:49, Daniel Stone wrote: >>> - ret |= mod; >>> + ret |= (uint64_t)(mod & 0x); >>> >> I was itching to suggest the following from the start, but your patch >> also works ;-)

Re: [Mesa-dev] [PATCH v2 2/4] egl, dri: Propagate context priority hint to driver->CreateContext

On 3 May 2017 at 15:29, Chris Wilson wrote: > On Wed, Apr 12, 2017 at 02:58:50PM +0100, Emil Velikov wrote: >> On 11 April 2017 at 17:11, Chris Wilson wrote: >> > Jump through the layers of abstraction between egl and dri in order to >> > feed the context priority attribute through to the backend

Re: [Mesa-dev] [PATCH 08/18] anv/allocator: Drop the block_size field from block_pool

Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > Since the state_stream is now pulling from a state_pool, the only thing > pulling directly off the block pool is the state pool so we can just > move the block_size there. The one exception is when we

Re: [Mesa-dev] [PATCH 09/18] anv/allocator: Add support for "back" allocations to state_pool

Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > --- > src/intel/vulkan/anv_allocator.c | 31 +-- > src/intel/vulkan/anv_private.h | 4 > 2 files changed, 33 insertions(+), 2 deletions(-) > > diff --git a/src/inte

Re: [Mesa-dev] [PATCH] radeonsi: constify a bunch of the perfcounter structs.

On 03.05.2017 00:41, Dave Airlie wrote: From: Dave Airlie This moves the structs from the data segment to the rodata segment, which seems like the more correct place for them. Signed-off-by: Dave Airlie Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_perfcounter.c | 2

Re: [Mesa-dev] [PATCH v2 2/4] egl, dri: Propagate context priority hint to driver->CreateContext

On Wed, May 03, 2017 at 03:42:42PM +0100, Emil Velikov wrote: > On 3 May 2017 at 15:29, Chris Wilson wrote: > > On Wed, Apr 12, 2017 at 02:58:50PM +0100, Emil Velikov wrote: > >> On 11 April 2017 at 17:11, Chris Wilson wrote: > >> > Jump through the layers of abstraction between egl and dri in or

Re: [Mesa-dev] [PATCH 10/18] anv: Allocate binding table blocks through the state pool

Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > --- > src/intel/vulkan/anv_batch_chain.c | 47 > +- > src/intel/vulkan/anv_private.h | 2 +- > 2 files changed, 22 insertions(+), 27 deletions(-) > > diff --g

Re: [Mesa-dev] [PATCH] i965: Set modifier for imported and duplicated images

Hey Emil, On 3 May 2017 at 15:32, Emil Velikov wrote: > On 3 May 2017 at 09:43, Daniel Stone wrote: >> @@ -805,6 +807,7 @@ intel_create_image_from_fds(__DRIscreen *dri_screen, >> if (image == NULL) >>return NULL; >> >> + image->modifier = DRM_FORMAT_MOD_INVALID; > I think we want t

Re: [Mesa-dev] [PATCH 12/18] anv/allocator: Embed the block_pool in the state_pool

Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > Now that the state stream is allocating off of the state pool, there's > no reason why we need the block pool to be separate. > --- > src/intel/vulkan/anv_allocator.c | 30 +++

[Mesa-dev] [Bug 100916] Multiple definition of `glwMDrawingAreaWidgetClass'

https://bugs.freedesktop.org/show_bug.cgi?id=100916 Bug ID: 100916 Summary: Multiple definition of `glwMDrawingAreaWidgetClass' Product: Mesa Version: 8.0 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW

Re: [Mesa-dev] [RFC 1/2] glx|egl: allow to test if glthread is safe enough on X11 platform

On 28.04.2017 23:11, Gregory Hainaut wrote: I extended the struct __DRIbackgroundCallableExtensionRec because the other function pointer is already related for glthread. DRI2/DRI3 glx code path check that display can be locked (basically XInitThread was called) EGL code path is more tricky as w

Re: [Mesa-dev] [RFC 2/2] glthread/gallium: require safe_glthread to start glthread

On 28.04.2017 23:11, Gregory Hainaut wrote: Otherwise print a warning Signed-off-by: Gregory Hainaut --- src/gallium/state_trackers/dri/dri_context.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/gallium/state_trackers/dri/dri_context.c b/src/gallium/state

Re: [Mesa-dev] [PATCH 2/3] glsl: reject format qualifiers with non-image types everywhere

On 01.05.2017 12:34, Samuel Pitoiset wrote: Including structures, interfaces and uniform blocks. Fixes the following ARB_shader_image_load_store test: format-layout-with-non-image-type.frag Signed-off-by: Samuel Pitoiset Patches 1&2: Reviewed-by: Nicolai Hähnle --- src/compiler/glsl/a

Re: [Mesa-dev] [PATCH 3/3] glsl: validate memory qualifiers inside structures/interfaces

On 01.05.2017 12:34, Samuel Pitoiset wrote: This relaxes using memory qualifiers for buffer variables because they are allowed. Fixes the following ARB_shader_image_load_store test: memory-qualifier-with-non-image-type.frag Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast_to_hir.cpp

Re: [Mesa-dev] [PATCH 2/2] radeonsi/gfx9: fix gl_ViewportIndex

On 02.05.2017 16:25, Marek Olšák wrote: From: Marek Olšák Cc: 17.1 --- src/gallium/drivers/radeonsi/si_shader.c| 43 + src/gallium/drivers/radeonsi/si_state_shaders.c | 13 ++-- 2 files changed, 48 insertions(+), 8 deletions(-) diff --git a/src/gallium/dri

[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

https://bugs.freedesktop.org/show_bug.cgi?id=100613 Rob Clark changed: What|Removed |Added CC||robcl...@freedesktop.org -- You are receiv

Re: [Mesa-dev] [PATCH v2] mesa/vbo: reduce prim array size

Reviewed-by: Nicolai Hähnle Do you need somebody to push this? On 02.05.2017 13:19, Bartosz Tomczyk wrote: We always use only single element. v2: Change signle element arrays to variables --- src/mesa/vbo/vbo_exec_array.c | 74 +-- 1 file changed, 37 i

Re: [Mesa-dev] [PATCH 06/17] st/mesa: unify TCS, TES, GS st_*_program structures

With Gustaw's and possibly Brian's comment addressed, patches 1, 3-6: Reviewed-by: Nicolai Hähnle On 01.05.2017 14:52, Marek Olšák wrote: From: Marek Olšák --- src/mesa/state_tracker/st_atom.c | 12 ++--- src/mesa/state_tracker/st_atom_constbuf.c | 6 +-- src/mesa/state_tracker

[Mesa-dev] [PATCH kmscube] HACK: automatic modifier selection

This lacks proper abstractions and error checks, but sending out anyways, as it might be helpful for other people testing the whole modifier chain. This works on top of Ben's plane property blob patches. Signed-off-by: Lucas Stach --- common.c | 29 ++-- common.h |

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