From: Nicolai Hähnle <nicolai.haeh...@amd.com>
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeonsi/si_state_draw.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index e6a9ee0..3d1d1f8 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -181,20 +181,34 @@ static void si_emit_derived_tess_state(struct si_context
*sctx,
/* Not necessary for correctness, but improves performance. The
* specific value is taken from the proprietary driver.
*/
*num_patches = MIN2(*num_patches, 40);
/* SI bug workaround - limit LS-HS threadgroups to only one wave. */
if (sctx->b.chip_class == SI) {
unsigned one_wave = 64 / MAX2(num_tcs_input_cp,
num_tcs_output_cp);
*num_patches = MIN2(*num_patches, one_wave);
+
+ if (sctx->screen->b.info.max_se == 1) {
+ /* The VGT HS block increments the patch ID
unconditionally
+ * within a single threadgroup. This results in
incorrect
+ * patch IDs when instanced draws are used.
+ *
+ * The intended solution is to restrict threadgroups to
+ * a single instance by setting SWITCH_ON_EOI, which
+ * should cause IA to split instances up. However, this
+ * doesn't work correctly on SI when there is no other
+ * SE to switch to.
+ */
+ *num_patches = 1;
+ }
}
sctx->last_num_patches = *num_patches;
output_patch0_offset = input_patch_size * *num_patches;
perpatch_output_offset = output_patch0_offset +
pervertex_output_patch_size;
/* Compute userdata SGPRs. */
assert(((input_vertex_size / 4) & ~0xff) == 0);
assert(((output_vertex_size / 4) & ~0xff) == 0);
--
2.9.3
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