Re: [Mesa-dev] [PATCH 09/22] i965/fs: add lowering x2d step for IVB/VLV

On Fri, 2017-01-13 at 14:36 -0800, Matt Turner wrote: > On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez > wrote: > > From: "Juan A. Suarez Romero" > > > > On Ivybridge/Valleyview, when converting a float (F) to a double > > precision float (DF), the hardware automatically duplicates th

Re: [Mesa-dev] [PATCH 17/22] i965/vec4: fix register_coalesce() for partial writes

On Fri, 2017-01-13 at 15:46 -0800, Matt Turner wrote: > On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez > wrote: > > From: "Juan A. Suarez Romero" > > > > When lowering double_to_single() we added a final mov() that puts > > 32-bit > > I can't confirm that this patch is necessary in t

Re: [Mesa-dev] [PATCH 14/22] i965/vec4: fix double_to_single() for IVB/VLV

On Fri, 2017-01-13 at 14:40 -0800, Matt Turner wrote: > On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez > wrote: > > From: "Juan A. Suarez Romero" > > > > In the generator we must generate slightly different code for > > Ivybridge/Valleview, because of the way the stride works in > > t

[Mesa-dev] [PATCH v2] anv: increase ANV_MAX_STATE_SIZE_LOG2 limit to 1 MB

Fixes crash in dEQP-VK.ubo.random.all_shared_buffer.48 due to a fragment shader code bigger than 128 kB. This patch increases the allocation size limit to 1 MB. v2: - Increase it to 1 MB (Jason) - Increase device->instruction_block_pool allocation size in anv_device.c (Jason) Signed-off-by: Sa

Re: [Mesa-dev] [PATCH] i965: Enable OpenGL 4.5 on Haswell.

On Fri, 2017-01-13 at 22:53 -0800, Kenneth Graunke wrote: > Everything is in place and the test results look solid. > > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/intel_extensions.c | 2 +- > src/mesa/drivers/dri/i965/intel_screen.c | 2 +- > 2 files changed, 2 insertio

Re: [Mesa-dev] [PATCH 2/2] gallium/hud: disable queries during HUD draw calls

For the series: Reviewed-by: Nicolai Hähnle On 16.01.2017 02:59, Marek Olšák wrote: From: Marek Olšák --- src/gallium/auxiliary/hud/hud_context.c | 10 ++ src/gallium/auxiliary/hud/hud_driver_query.c | 18 +- src/gallium/auxiliary/hud/hud_private.h | 2 ++

Re: [Mesa-dev] [PATCH 6/6] gallium/radeon: add GPU-shaders-busy HUD query

This series is: Reviewed-by: Nicolai Hähnle On 16.01.2017 03:00, Marek Olšák wrote: From: Marek Olšák It should be close to the GPU load, but it can be much lower if something is stalling shader execution (e.g. CP DMA). --- src/gallium/drivers/radeon/r600_gpu_load.c| 16

[Mesa-dev] [PATCH 05/27] i965: Replace open coded with intel_miptree_get_image_offset()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 2563897..ace94a0 100644 --- a/s

[Mesa-dev] [PATCH 13/27] i965/gen6: Calculate hiz offset on demand

This is kept on purpose in i965. It can be moved to ISL if it is needed in vulkan. Pointers to miptrees are given solely for verification purposes. These will be dropped in following patches. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 44

[Mesa-dev] [PATCH 11/27] i965/hiz/gen6: Stop setting false qpitch

which is not applicable for "all slices at each lod". Current logic makes one to believe it has some purpose. When miptree layout is calculated brw_miptree_layout_texture_array() sets the qpitch unconditionally but later on ignores it altogether for ALL_SLICES_AT_EACH_LOD. Signed-off-by: Topi Pohj

[Mesa-dev] [PATCH 02/27] i965/miptree: Remove redundant check for null texture

There exact same check earlier in brw_miptree_layout() which intel_miptree_create_layout() in turn calls unconditionally. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/mesa/drivers/d

[Mesa-dev] [PATCH 03/27] i965: Remove check for hiz on earlier gens than SNB

Only caller, brw_workaround_depthstencil_alignment(), returns early for gen6+. While at it, reduce scope for brw_get_depthstencil_tile_masks() as well. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_context.h| 6 -- src/mesa/drivers/dri/i965/brw_misc_state.c | 18 ++-

[Mesa-dev] [PATCH 04/27] i965/gen6: Remove check for stencil format

There are is no alternative. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 22 -- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c i

[Mesa-dev] i965: Use ISL for auxiliary buffer layout

This series is a step towards using ISL instead of current intel_mipnap_tree/brw_tex_layout logic in i965. First 11 patches simplify the workspace for the rest and more functional changes. Next seven patches introduce simple on-demand calculators for stencil and hiz offsets on gen6. On gen6 hardw

[Mesa-dev] [PATCH 01/27] i965/meta: Remove unused brw_get_rb_for_slice()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_util.c | 44 --- src/mesa/drivers/dri/i965/brw_meta_util.h | 5 2 files changed, 49 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_u

[Mesa-dev] [PATCH 12/27] i965/gen6: Calculate stencil offset on demand

This is kept on purpose in i965. It can be moved to ISL if it is needed in vulkan. Pointers to miptrees are given solely for verification purposes. These will be dropped in following patches. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 65

[Mesa-dev] [PATCH 08/27] i965/blorp/gen6: Remove dead code in hiz setup

Such as comment states for intel_miptree_hiz_buffer::mt, hiz_mt only exists for gen6. In addition, intel_hiz_miptree_buf_create() uses MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD unconditionally. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 18 +- 1 file

[Mesa-dev] [PATCH 06/27] i965/blorp/gen6: Simplify hiz surface setup

In intel_hiz_miptree_buf_create() intel_miptree_aux_buffer::bo is unconditionally initialised to point to the same buffer object as hiz_mt does. Also intel_miptree_aux_buffer::offset is initialised to zero (calloc()). This will make following patches significantly simpler to read. Signed-off-by:

[Mesa-dev] [PATCH 16/27] i965/blorp/gen6: Set aux pitch directly

dropping dependency to intel_miptree_get_aux_isl_surf(). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c ind

[Mesa-dev] [PATCH 19/27] i965/miptree: Refactor aux surface allocation

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 67 --- 1 file changed, 41 insertions(+), 26 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 3914506..cdfd49d

[Mesa-dev] [PATCH 18/27] i965/gen6: Allocate hiz directly without miptree

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 13 +--- src/mesa/drivers/dri/i965/gen6_depth_state.c | 8 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 43 +-- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 4 fil

[Mesa-dev] [PATCH 17/27] i965/gen6/hiz: Add direct buffer size resolver

The apparent hack adding unconditionally two lines into cube maps is taken directly from align_cube(). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c| 39 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23 ++-- src/mesa

[Mesa-dev] [PATCH 24/27] i965/miptree: Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD in mcs init

because buffers get unconditionally initialised by cpu writing. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/i

[Mesa-dev] [PATCH 23/27] i965/miptree: Use ISL for MCS layouts

This changes the size of the auxiliary buffer on gen7 and gen8 for arrayed surfaces. Current i965 logic uses qpitch height per slice whereas ISL knows that msaa is never mipmapped and more compact layout is sufficient. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c

[Mesa-dev] [PATCH 07/27] i965/gen6: Simplify hiz surface setup

In intel_hiz_miptree_buf_create() intel_miptree_aux_buffer::bo is unconditionally initialised to point to the same buffer object as hiz_mt does. The same goes for intel_miptree_aux_buffer::pitch/qpitch. This will make following patches simpler to read. Signed-off-by: Topi Pohjolainen --- src/me

[Mesa-dev] [PATCH 26/27] i965/blorp: Use hiz surface instead of creating copy

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 25 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 ++ 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/d

[Mesa-dev] [PATCH 20/27] i965/miptree: Refactor ISL aux usage resolver

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 47 +++- src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 9 - 4 fi

[Mesa-dev] [PATCH 14/27] i965/blorp/gen6: Use on-demand stencil/hiz offset resolvers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 2001cf3..632f5f3 100644 --- a/src/mesa/drivers/

[Mesa-dev] [PATCH 09/27] i965/gen6: Remove dead code in hiz surface setup

In intel_hiz_miptree_buf_create() the miptree is unconditionally created with MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_depth_state.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers

[Mesa-dev] [PATCH 27/27] i965: Use stored hiz surface instead of creating copy

Now the last user of intel_miptree_get_aux_isl_surf() is gone. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 77 src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 6 -- 3

[Mesa-dev] [PATCH 15/27] i965/gen6: Drop miptrees in depth/stencil offset resolvers

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 8 src/mesa/drivers/dri/i965/brw_tex_layout.c| 19 +-- src/mesa/drivers/dri/i965/gen6_depth_state.c | 4 ++-- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 + 4 files chang

[Mesa-dev] [PATCH 10/27] i965/blorp/gen6: Drop unnecessary stencil/hiz surf dimension adjust

Hardware state setup only needs offset and pitch and ignores the rest. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 57 --- 1 file changed, 20 insertions(+), 37 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/

[Mesa-dev] [PATCH 22/27] intel/isl: Apply render target alignment constraints for MCS

Otherwise i965 driver will start experiencing failures with "texelFetch fs sampler2DMSArray 4 98x1x9-98x129x9 -auto -fbo" on IVB, HSW and BDW when starts to use ISL to calculate the layout. The test is fine on SKL because one already hits: if (isl_format_is_compressed(info->format)) { /*

[Mesa-dev] [PATCH 21/27] intel/isl/gen7: Add CCS alignment restrictions

Gen8 and Gen9 are already more heavily constrained as one applies arrayed/mipmapped alignment even for non-arrayed and non-mipmapped. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_gen7.c | 39 +++ 1 file changed, 39 insertions(+) diff --git a/src/inte

[Mesa-dev] [PATCH 25/27] i965/miptree/gen7+: Use ISL for HIZ layouts

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 6 +- src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 4 +- src/mesa/drivers/dri/i965

Re: [Mesa-dev] [PATCH 17/22] i965/vec4: fix register_coalesce() for partial writes

On Mon, 2017-01-16 at 09:01 +0100, Samuel Iglesias Gonsálvez wrote: > On Fri, 2017-01-13 at 15:46 -0800, Matt Turner wrote: > > On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez > > wrote: > > > From: "Juan A. Suarez Romero" > > > > > > When lowering double_to_single() we added a final m

[Mesa-dev] [Bug 97102] [dri][swr] stack overflow / infinite loop with GALLIUM_DRIVER=swr

https://bugs.freedesktop.org/show_bug.cgi?id=97102 --- Comment #12 from Jan Ziak <0xe2.0x9a.0...@gmail.com> --- (In reply to Bruce Cherniak from comment #11) > As Tim suggests, pruning empty nodes is probably the best solution for the > crash. > > For performance, however, I'm not sure how many c

Re: [Mesa-dev] [PATCH] mesa/main: Fix FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE for NONE attachment type

On 16/01/17 05:13, Iago Toral wrote: > On Fri, 2017-01-13 at 12:15 -0200, Alejandro Piñeiro wrote: >> When the attachment type is NONE (att->Type), >> FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE should be NONE too. >> >> Note that technically, the current behaviour follows the spec. From >> OpenGL 4.5 spec,

Re: [Mesa-dev] [PATCH] nvc0: allow TK1 (NVEA) queries to work

On 07:13 pm - Jan 15 2017, Samuel Pitoiset wrote: > > > On 01/14/2017 02:35 AM, Ilia Mirkin wrote: > > The NVEA 3D class is numerically larger than the NVF0 3D class. The TK1 > > chip uses the SM35 ISA and likely has the same hw counters. Allow these > > to be used like on all the other supported

Re: [Mesa-dev] [PATCH] mesa/main: fix version/extension checks in _mesa_ClampColor

Emil, I'm going to follow up with a patch to try to fix the reported i915 regression, but feel free to drop the patch from this thread from mesa-stable entirely. It's not an important fix. Cheers, Nicolai On 13.01.2017 21:23, Mark Janes wrote: This patch regressed i915 systems: https://bugs.

Re: [Mesa-dev] [PATCH 04/27] i965/gen6: Remove check for stencil format

On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > There are is no alternative. > There is no alternative. Reviewed-by: Samuel Iglesias Gonsálvez > Signed-off-by: Topi Pohjolainen > --- >  src/mesa/drivers/dri/i965/gen6_depth_state.c | 22 > -- >  1 file changed,

Re: [Mesa-dev] [PATCH 03/27] i965: Remove check for hiz on earlier gens than SNB

Reviewed-by: Samuel Iglesias Gonsálvez On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > Only caller, brw_workaround_depthstencil_alignment(), returns > early for gen6+. > > While at it, reduce scope for brw_get_depthstencil_tile_masks() as > well. > > Signed-off-by: Topi Pohjolainen

Re: [Mesa-dev] [PATCH 01/27] i965/meta: Remove unused brw_get_rb_for_slice()

Reviewed-by: Samuel Iglesias Gonsálvez On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- >  src/mesa/drivers/dri/i965/brw_meta_util.c | 44 --- > >  src/mesa/drivers/dri/i965/brw_meta_util.h |  5 >  2 files changed

Re: [Mesa-dev] [PATCH 02/27] i965/miptree: Remove redundant check for null texture

Reviewed-by: Samuel Iglesias Gonsálvez On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > There exact same check earlier in brw_miptree_layout() which > intel_miptree_create_layout() in turn calls unconditionally. > > Signed-off-by: Topi Pohjolainen > --- >  src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH] nir/spirv/glsl450: rewrite atan2 to deal with denorms / infinities

Rewrite atan2(y,x) to cover (+/-)INF values. Also, in case either 'y' or 'x' is a denorm value, flush it to 0 at the very beginning. The reason is that in other case, the hardware will do the flush in some of the steps, but not in order. So we end up handling in some steps a denorm value and in o

Re: [Mesa-dev] [PATCH 05/27] i965: Replace open coded with intel_miptree_get_image_offset()

Reviewed-by: Samuel Iglesias Gonsálvez On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- >  src/mesa/drivers/dri/i965/intel_pixel_read.c | 16 ++-- >  1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/drivers/d

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks fullscreen frame updates

https://bugs.freedesktop.org/show_bug.cgi?id=98833 Eero Tamminen changed: What|Removed |Added Attachment #128240|0 |1 is obsolete|

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks fullscreen frame updates

https://bugs.freedesktop.org/show_bug.cgi?id=98833 --- Comment #13 from Eero Tamminen --- (In reply to Pekka Paalanen from comment #11) > Hi, sorry, just back from holidays. The patch looks fine so would be nice to > have that on wayland-devel@ mailing list if you didn't send it already. I > thin

[Mesa-dev] [PATCH] anv: set UAV coherence required bit when needed

The same we do in the OpenGL driver (comment copied from there). This is required to ensure that we execute the fragment shader stage when side-effects (such as image or ssbo stores) are present but there are no color writes. I found this while writing a test to check rendering to a framebuffer w

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

Hi Vladislav, On 14 January 2017 at 01:50, Vladislav Egorov wrote: > 14.01.2017 01:45, Timothy Arceri пишет: >> >> I'm asking for a chance to test before we jump in, its probably not a >> big deal and I may even still be able to reduce my use of hashing but >> it would be nice to be given a few d

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

On 14 January 2017 at 06:25, Jonathan Gray wrote: > On Fri, Jan 13, 2017 at 04:51:31PM +, Emil Velikov wrote: >> From: Emil Velikov >> >> At the moment we support 5+ different implementations each with varying >> amount of bugs - from thread safely problems [1], to outright broken >> implemen

Re: [Mesa-dev] [PATCH] st/va: delay calling begin_frame until we have all parameters

Hi Christian, Please push this patch. There are a couple of patches [1] which are not yet reviewed. They are trivial and are tested by Andy. Please have a look at them. Regards, Nayan [1] https://lists.freedesktop.org/archives/mesa-dev/2017-January/140395.html On Fri, Jan 13, 2017 at 11:17 PM,

Re: [Mesa-dev] [PATCH] gallivm: correctly manage MCJIT at run-time

On 14 January 2017 at 08:46, Jose Fonseca wrote: > I suspect this might break builds with LLVM 3.6 or higher. > > The LLVMLinkInJIT must be inside #if ... #endif, and it must not be expanded > when HAVE_LLVM >= 0x0306, since LLVMLinkInJIT(), > > That is, when HAVE_LLVM >= 0x0306: > - USE_MCJIT sho

Re: [Mesa-dev] [PATCH 2/3] radv: rename global extension properties structs

On 14 January 2017 at 02:31, Andres Rodriguez wrote: > On Fri, Jan 13, 2017 at 8:13 PM, Emil Velikov > wrote: >> >> On 13 January 2017 at 23:44, Andres Rodriguez wrote: >> > All extension arrays are global, but only one of them refers to instance >> > extensions. >> > >> > The device extension a

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

16.01.2017 16:13, Emil Velikov пишет: Hi Vladislav, On 14 January 2017 at 01:50, Vladislav Egorov wrote: 14.01.2017 01:45, Timothy Arceri пишет: I'm asking for a chance to test before we jump in, its probably not a big deal and I may even still be able to reduce my use of hashing but it wou

[Mesa-dev] [PATCH] radeonsi: make fix_fetch 64-bit

From: Marek Olšák v2: add u_bit_consecutive64 --- src/gallium/drivers/radeonsi/si_shader.c| 4 ++-- src/gallium/drivers/radeonsi/si_shader.h| 4 ++-- src/gallium/drivers/radeonsi/si_state.c | 6 +++--- src/gallium/drivers/radeonsi/si_state.h | 2 +- src/gallium/dr

Re: [Mesa-dev] [PATCH] radeonsi: make fix_fetch 64-bit

On Mon, Jan 16, 2017 at 3:00 PM, Marek Olšák wrote: > From: Marek Olšák > > v2: add u_bit_consecutive64 > --- > src/gallium/drivers/radeonsi/si_shader.c| 4 ++-- > src/gallium/drivers/radeonsi/si_shader.h| 4 ++-- > src/gallium/drivers/radeonsi/si_state.c | 6 +++--- > sr

Re: [Mesa-dev] [PATCH 2/3] radv: rename global extension properties structs

On Mon, Jan 16, 2017 at 2:51 PM, Emil Velikov wrote: > On 14 January 2017 at 02:31, Andres Rodriguez wrote: >> On Fri, Jan 13, 2017 at 8:13 PM, Emil Velikov >> wrote: >>> >>> On 13 January 2017 at 23:44, Andres Rodriguez wrote: >>> > All extension arrays are global, but only one of them refers

Re: [Mesa-dev] [PATCH 1/2] gallium: correctly manage libsensors link flags

On 8 December 2016 at 17:58, Emil Velikov wrote: > From: Emil Velikov > > We should be using LIBS rather than the LDFLAGS variable. Furthermore > try to keep the linking to the final stage, rather than intermetent > static library. > > Cc: Steven Toth > Signed-off-by: Emil Velikov > --- > Steve

Re: [Mesa-dev] [PATCH 1/5] configure: forbid static EGL/GBM

On 7 December 2016 at 13:24, Emil Velikov wrote: > From: Emil Velikov > > Both libraries implicitly require shared GLAPI which in itself mandates > shared libraries. > > Stop pretending that one can use it and error out at configure stage. > Humble ping on the series ? Barring any objections I'll

Re: [Mesa-dev] [PATCH 1/7] glx: remove always false ifdef GLX_NO_STATIC_EXTENSION_FUNCTIONS

On 5 December 2016 at 19:52, Emil Velikov wrote: > From: Emil Velikov > > Quick search through git history (of both mesa and xserver) hows no > instances where this was ever set. > Some of the series is short on reviews - 1, 2, 4, 5, 6. Barring any objections I'll me merging the lot in the next f

Re: [Mesa-dev] [PATCH v2 1/2] egl/wayland: use the destroy_window_callback for swrast

On 28 November 2016 at 18:25, Emil Velikov wrote: > From: Emil Velikov > > As described in commit 690ead4a135 ("egl/wayland-egl: Fix for segfault > in dri2_wl_destroy_surface.") if we attempt to destroy a EGL surface > attached to already destroyed Wayland window we'll get a segfault. > > v2: set

Re: [Mesa-dev] [PATCH] gallivm: correctly manage MCJIT at run-time

On 16/01/17 13:46, Emil Velikov wrote: On 14 January 2017 at 08:46, Jose Fonseca wrote: I suspect this might break builds with LLVM 3.6 or higher. The LLVMLinkInJIT must be inside #if ... #endif, and it must not be expanded when HAVE_LLVM >= 0x0306, since LLVMLinkInJIT(), That is, when HAVE_L

Re: [Mesa-dev] [PATCH v2 1/2] egl/wayland: use the destroy_window_callback for swrast

Hi Emil, On 16 January 2017 at 14:25, Emil Velikov wrote: > On 28 November 2016 at 18:25, Emil Velikov wrote: >> As described in commit 690ead4a135 ("egl/wayland-egl: Fix for segfault >> in dri2_wl_destroy_surface.") if we attempt to destroy a EGL surface >> attached to already destroyed Wayland

[Mesa-dev] [Bug 97967] glsl/tests/cache-test regression

https://bugs.freedesktop.org/show_bug.cgi?id=97967 --- Comment #4 from Emil Velikov --- Fwiw I've ran into identical issue whist importing a SHA1 implementation. The issue here is buggy SHA1 implementation. As such if you print the result of _mesa_sha1_compute and match that across sha1 implemen

Re: [Mesa-dev] [PATCH v2] anv: increase ANV_MAX_STATE_SIZE_LOG2 limit to 1 MB

Rb On Jan 16, 2017 12:15 AM, "Samuel Iglesias Gonsálvez" wrote: > Fixes crash in dEQP-VK.ubo.random.all_shared_buffer.48 due to a > fragment shader code bigger than 128 kB. > > This patch increases the allocation size limit to 1 MB. > > v2: > - Increase it to 1 MB (Jason) > - Increase device->in

[Mesa-dev] [PATCH 03/19] i965: automake: include builddir prior to srcdir

From: Emil Velikov The latter can contain stale generated file, which, as-is, we'll end up using. Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR." Cc: "12.0 13.0" Cc: Kenneth Graunke Signed-off-by: Emil Velikov --- Strictly speaking not introduced with the above commit. --- src/m

[Mesa-dev] [PATCH 02/19] freedreno: automake: correctly set MKDIR_GEN

From: Emil Velikov Analogous to previous commit. Fixes: 4610e5ef28e "freedreno/ir3: fix sin/cos" Cc: "12.0 13.0" Cc: Rob Clark Cc: Nicolas Dechesne Reported-by: Nicolas Dechesne Signed-off-by: Emil Velikov --- src/gallium/drivers/freedreno/Makefile.am | 1 + 1 file changed, 1 insertion(+)

[Mesa-dev] [PATCH 01/19] i965: automake: correctly set MKDIR_GEN

From: Emil Velikov Otherwise we might end up w/o the respective folder (depending on autotools version) and fail at build time. Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR." Cc: "12.0 13.0" Cc: Kenneth Graunke Signed-off-by: Emil Velikov --- Worth setting in configure and/or us

[Mesa-dev] [PATCH 07/19] clover: automake: remove -I$(srcdir)

From: Emil Velikov Already implicitly handled by the build system. Signed-off-by: Emil Velikov --- src/gallium/state_trackers/clover/Makefile.am | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/gallium/state_trackers/clover/Makefile.am b/src/gallium/state_trackers/clo

[Mesa-dev] [PATCH 04/19] i915: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i915/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i915/Makefile.am b/src/mesa/drivers/dri/i915/Makefile.am index 822f7

[Mesa-dev] [PATCH 06/19] clover: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Cc: Aaron Watry Cc: Francisco Jerez Signed-off-by: Emil Velikov --- src/gallium/state_trackers/clover/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/clover/Makefile.a

[Mesa-dev] [PATCH 08/19] st/dri: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/gallium/state_trackers/dri/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/dri/Makefile.am b/src/gallium/state_trackers/dri/Makefile

[Mesa-dev] [PATCH 09/19] d3dadapter9: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Cc: Axel Davy Signed-off-by: Emil Velikov --- src/gallium/targets/d3dadapter9/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/targets/d3dadapter9/Makefile.am b/src/gallium/targets/d3

[Mesa-dev] [PATCH 12/19] glx/windows: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Cc: Jon Turney Signed-off-by: Emil Velikov --- src/glx/windows/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glx/windows/Makefile.am b/src/glx/windows/Makefile.am index 9806988236..6de3cf22

[Mesa-dev] [PATCH 13/19] loader: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/loader/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am index ba2e65c371..eff85af42d 100644 --- a/src/loader/Make

[Mesa-dev] [PATCH 11/19] glx/apple: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Cc: Jeremy Huddleston Sequoia Signed-off-by: Emil Velikov --- src/glx/apple/Makefile.am | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/glx/apple/Makefile.am b/src/glx/apple/Makefile.am index 2cbff9e

[Mesa-dev] [PATCH 05/19] egl: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/egl/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/egl/Makefile.am b/src/egl/Makefile.am index 7c5abd2114..407c69a992 100644 --- a/src/egl/Makefile.am +++

[Mesa-dev] [PATCH 16/19] dri/swrast: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/swrast/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/swrast/Makefile.am b/src/mesa/drivers/dri/swrast/Makefile.am index

[Mesa-dev] [PATCH 15/19] radeon, r200: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/r200/Makefile.am | 2 +- src/mesa/drivers/dri/radeon/Makefile.am | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/r200/Makefile.am

[Mesa-dev] [PATCH 10/19] glx: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/glx/Makefile.am | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/glx/Makefile.am b/src/glx/Makefile.am index 5884e33f80..79d416abca 100644 --- a/src/glx/Makefile.am

[Mesa-dev] [PATCH 18/19] mesa/tests: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mesa/main/tests/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/tests/Makefile.am b/src/mesa/main/tests/Makefile.am index d6977e20e8..18f750e4d4 1

[Mesa-dev] [PATCH 19/19] i915, i965: automake: remove NA include directive

From: Emil Velikov The path in question (... dri/intel/server) was removed years ago. Signed-off-by: Emil Velikov --- src/mesa/drivers/dri/i915/Makefile.am | 1 - src/mesa/drivers/dri/i965/Makefile.am | 1 - 2 files changed, 2 deletions(-) diff --git a/src/mesa/drivers/dri/i915/Makefile.am b

[Mesa-dev] [PATCH 14/19] mapi: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mapi/Makefile.am | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mapi/Makefile.am b/src/mapi/Makefile.am index 5013e9af5e..7ebe14f520 100644 --- a/src/mapi/Makefile

[Mesa-dev] [PATCH 17/19] dri/osmesa: automake: include builddir prior to srcdir

From: Emil Velikov Analogous to previous commit. Cc: "12.0 13.0" Signed-off-by: Emil Velikov --- src/mesa/drivers/osmesa/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/osmesa/Makefile.am b/src/mesa/drivers/osmesa/Makefile.am index 5525687c5b.

Re: [Mesa-dev] [PATCH] radeonsi: make fix_fetch 64-bit

On 16.01.2017 15:04, Marek Olšák wrote: On Mon, Jan 16, 2017 at 3:00 PM, Marek Olšák wrote: From: Marek Olšák v2: add u_bit_consecutive64 --- src/gallium/drivers/radeonsi/si_shader.c| 4 ++-- src/gallium/drivers/radeonsi/si_shader.h| 4 ++-- src/gallium/drivers/radeonsi/si_st

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

I guess doing this makes sense even while the GL extension discussion is stalled because of these wacky hardware differences. Reviewed-by: Nicolai Hähnle On 15.01.2017 19:36, Ilia Mirkin wrote: This will be useful for proper D3D9 emulation, where this behavior is expected by some shaders. Si

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

Yeah, Axel also asked for a cap. I tend to agree. I just didn't want to have two outstanding changes to add caps, since they'd conflict with each other. (My advanced blend series also adds a cap for FBFETCH.) Once that lands, I can resend adding a cap for this. On Mon, Jan 16, 2017 at 10:51 AM, Ro

Re: [Mesa-dev] [PATCH 2/2] configure: remove unused AC_SUBST variables

Not a build system guru, but both patches make sense to me, so: Reviewed-by: Nicolai Hähnle On 08.12.2016 18:58, Emil Velikov wrote: From: Emil Velikov Signed-off-by: Emil Velikov --- configure.ac | 10 -- 1 file changed, 10 deletions(-) diff --git a/configure.ac b/configure.ac in

[Mesa-dev] [PATCH] radeonsi: fix R600_DEBUG=nooptvariant

From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 9967837..9d30b90 100644 --- a/src/gallium/drivers/

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

I think you'd also want a cap bit - I don't think it's reasonable to expect all drivers to implement this (e.g. I really don't feel like doing that for llvmpipe, there is no way to do that natively obviously), and I'd think it's better that it would be the fault of the st and not the driver if the

Re: [Mesa-dev] [PATCH] nv50, nvc0: disable depth offsets when there is no depth buffer

I'm pretty sure it's undefined in GL (because there's no defined minimum resolvable difference in depth buffer format), IIRC this is stated somewhere but can't remember. d3d10 has a definition which doesn't make much sense (as it still says to use the unorm formula in this case for which "r is the

[Mesa-dev] [PATCH 1/4] glsl: split DIV_TO_MUL_RCP into single- and double-precision flags

From: Nicolai Hähnle --- src/compiler/glsl/ir_optimization.h | 4 +++- src/compiler/glsl/lower_instructions.cpp | 19 +++ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h index 0d6c4e6

[Mesa-dev] [PATCH 0/4] radeonsi: add DDIV for double division instead of RCP+MUL

Hi all, This series fixes one of the last remaining CTS failures for radeonsi, GL45-CTS.gpu_shader_fp64.built_in_functions. Specifically, that test checks that mod(13.375, 13.375) == 0.0. As part of the lowering of modulo, we compute 13.375 / 13.375, which is of course 1.0. Unfortunately, when ea

[Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

From: Nicolai Hähnle Double-precision division, to allow more precision than a DRCP + DMUL sequence. --- src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 2 ++ src/gallium/auxiliary/tgsi/tgsi_info.c | 2 ++ src/gallium/docs/source/tgsi.rst | 9 + src/gal

[Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

From: Nicolai Hähnle For drivers to indicate that they don't want double-precision divides to be lowered into rcp+mul. --- src/gallium/docs/source/screen.rst | 2 ++ src/gallium/drivers/freedreno/freedreno_screen.c | 3 ++- src/gallium/drivers/i915/i915_screen.c | 1 + sr

[Mesa-dev] [PATCH 4/4] st/glsl_to_tgsi: use DDIV if the driver requests it

From: Nicolai Hähnle Fixes GL45-CTS.gpu_shader_fp64.built_in_functions. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 93

[Mesa-dev] [PATCH] nouveau: remove always false argument in nouveau_fence_new()

No point in having the extra argument considering that it's effectively unused since the function was introduced. Cc: Ilia Mirkin Signed-off-by: Emil Velikov --- src/gallium/drivers/nouveau/nouveau_fence.c| 8 ++-- src/gallium/drivers/nouveau/nouveau_fence.h| 3 +-- src/gallium/driv

[Mesa-dev] [PATCH 2/4] graw: provide static inline draw_create_with_llvm_context()

From: Emil Velikov Analogous to previous commit. Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_context.h | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/draw/draw_context.h b/src/gallium/auxiliary/draw/draw_context.h index 145fc2ed46..d6b85e20cf

[Mesa-dev] [PATCH 4/4] graw: trivial coding style fixes

From: Emil Velikov Remove trailing whitespace and properly use brackets. Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_vs.c | 47 +++- 1 file changed, 20 insertions(+), 27 deletions(-) diff --git a/src/gallium/auxiliary/draw/draw_vs.c b/src/g

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