dropping dependency to intel_miptree_get_aux_isl_surf().
Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/mesa/drivers/dri/i965/brw_blorp.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 6cc8b2e..655a961 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -237,12 +237,6 @@ blorp_surf_for_miptree(struct brw_context *brw,
/* gen6 requires the HiZ buffer to be manually offset to the
* right location.
- * In depth state setup only surf->aux_surf.row_pitch gets
- * consulted. Otherwise surf->aux_surf is ignored and there is
- * no need to adjust it. See blorp_emit_depth_stencil_config().
- *
- * surf->aux_surf.row_pitch in turn is set by
- * intel_miptree_get_aux_isl_surf().
*/
surf->aux_addr.offset = brw_hiz_all_slices_at_each_lod_offset(
&surf->surf->phys_level0_sa, surf->surf->dim,
@@ -253,7 +247,13 @@ blorp_surf_for_miptree(struct brw_context *brw,
hiz_mt,
hiz_mt->level[*level].level_x,
hiz_mt->level[*level].level_y));
- assert(hiz_mt->pitch == aux_surf->row_pitch);
+ assert(mt->hiz_buf->aux_base.pitch == hiz_mt->pitch);
+
+ /* In depth state setup only surf->aux_surf.row_pitch gets
+ * consulted. Otherwise surf->aux_surf is ignored and there is
+ * no need to adjust it. See blorp_emit_depth_stencil_config().
+ */
+ aux_surf->row_pitch = mt->hiz_buf->aux_base.pitch;
}
}
} else {
--
2.5.5
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