I suppose that 16 is enough because Mesa always uses floats as intermediates
(and never doubles), right?
Either way is a good cleanup.
Jose
- Original Message -
> In a few places we need to allocate space for some number of generic
> pixels. Use this new define instead of a magic numbe
And the rest of the series looks good to me too.
Jose
- Original Message -
> I suppose that 16 is enough because Mesa always uses floats as
> intermediates (and never doubles), right?
>
> Either way is a good cleanup.
>
> Jose
>
> - Original Message -
> > In a few places we nee
Some hardware can't reinterpret the format of hardware buffers and thus
the X server needs to know the format when the buffer is created.
Signed-off-by: Thomas Hellstrom
---
src/gallium/state_trackers/dri/drm/dri2.c | 43 +++--
1 files changed, 40 insertions(+), 3 delet
Signed-off-by: Michael Karcher
---
src/gallium/drivers/i915/i915_debug.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/i915/i915_debug.c
b/src/gallium/drivers/i915/i915_debug.c
index 295c47e..b6c442d 100644
--- a/src/gallium/drivers/i915/i915_debu
On 12/05/2011 11:38 PM, Eric Anholt wrote:
On Mon, 05 Dec 2011 15:21:57 +0100, Thomas Hellstrom
wrote:
Hi!
Currently the DRI state tracker sends the bits per pixel (bpp) value in
the format member of a
getbufferswithformat request, and assumes it can reinterpret the format
of the returned
On Mon, 2011-12-05 at 14:38 -0800, Eric Anholt wrote:
> On Mon, 05 Dec 2011 15:21:57 +0100, Thomas Hellstrom
> wrote:
> >
> > Currently the DRI state tracker sends the bits per pixel (bpp) value in
> > the format member of a
> > getbufferswithformat request, and assumes it can reinterpret the f
- Original Message -
> On 12/05/2011 08:02 PM, Jose Fonseca wrote:
> >
> >
> > - Original Message -
> >> On 11/19/2011 09:44 PM, Marek Olšák wrote:
> >>> Hi everyone,
> >>>
> >>> this patch series implements all the core Mesa and Gallium
> >>> support
> >>> for EXT_transform_fee
On Die, 2011-12-06 at 10:19 +0100, Thomas Hellstrom wrote:
> Some hardware can't reinterpret the format of hardware buffers and thus
> the X server needs to know the format when the buffer is created.
>
> Signed-off-by: Thomas Hellstrom
> ---
> src/gallium/state_trackers/dri/drm/dri2.c | 43
On 12/06/2011 10:19 AM, Thomas Hellstrom wrote:
> Some hardware can't reinterpret the format of hardware buffers and thus
> the X server needs to know the format when the buffer is created.
>
> Signed-off-by: Thomas Hellstrom
> ---
> src/gallium/state_trackers/dri/drm/dri2.c | 43
> ++
2011/12/5 Kristian Høgsberg :
> 2011/12/5 zhigang gong :
>> Hi Kristian,
>>
>> I'm integrating glamor with intel's video driver now. The basic idea
>> is to allocate a BO
>> by calling libdrm directly in intel uxa code path, then latter create
>> an EGL image from
>> that BO's handle. And then bin
On 12/06/2011 02:10 AM, Jose Fonseca wrote:
I suppose that 16 is enough because Mesa always uses floats as intermediates
(and never doubles), right?
Correct.
Either way is a good cleanup.
-Brian
___
mesa-dev mailing list
mesa-dev@lists.freedeskt
On 5 December 2011 14:50, Eric Anholt wrote:
>
>
> These statechanges should probably be flagged using FLUSH_VERTICES(ctx,
> _NEW_TRANSFORM_FEEDBACK), since we're about to change something that
> would be used by existing glBegin()/glEnd() rendering that is batched up
> in the vbo module.
>
Ok,
On 6 December 2011 07:31, Paul Berry wrote:
> On 5 December 2011 14:50, Eric Anholt wrote:
>
>>
>>
>> These statechanges should probably be flagged using FLUSH_VERTICES(ctx,
>> _NEW_TRANSFORM_FEEDBACK), since we're about to change something that
>> would be used by existing glBegin()/glEnd() ren
On 12/05/2011 11:34 AM, Ian Romanick wrote:
On 12/03/2011 09:07 AM, Brian Paul wrote:
No driver implemented this and we always returned "True" for residence
queries.
Most useless query evar.
Reviewed-by: Ian Romanick
Is there's some similar infrastructure for querying residence of ARB
verte
On 12/06/2011 02:00 PM, Christoph Bumiller wrote:
On 12/06/2011 10:19 AM, Thomas Hellstrom wrote:
Some hardware can't reinterpret the format of hardware buffers and thus
the X server needs to know the format when the buffer is created.
Signed-off-by: Thomas Hellstrom
---
src/gallium/state
On 12/06/2011 11:54 AM, Michel Dänzer wrote:
On Die, 2011-12-06 at 10:19 +0100, Thomas Hellstrom wrote:
Some hardware can't reinterpret the format of hardware buffers and thus
the X server needs to know the format when the buffer is created.
Signed-off-by: Thomas Hellstrom
---
src/gallium
On 5 December 2011 14:57, Eric Anholt wrote:
> On Mon, 5 Dec 2011 09:40:50 -0800, Paul Berry
> wrote:
> > From: Kenneth Graunke
> >
> > The 50/50 split is just an attempt to get things working. We likely
> > want to tune this, and probably want to avoid allocating the GS any
> > space if we'r
Hi,
So GLX has a rule about not swapping pixmaps, and I've been trying to
track down why with DRI2 my driver gets requests for swapping pixmaps
(piglit glx-swap-pixmap test).
So it appears in the DRI2 buffer swap case, we bypass the GLX protocol
and use the DRI2SwapBuffers protocol, now nowhere o
On 5 December 2011 15:14, Paul Berry wrote:
> On 5 December 2011 14:53, Eric Anholt wrote:
>
>
>> What I really want is to compute the vue map at the top of the pipeline
>> and reuse it from the various places that want it.
>>
>
> Yeah, me too. I'll write a follow-up patch that fixes that.
>
T
https://bugs.freedesktop.org/show_bug.cgi?id=43128
--- Comment #1 from Michel Dänzer 2011-12-06 09:30:08 PST
---
Presumably running blender with the environment variable
XLIB_SKIP_ARGB_VISUALS=1 works around this. Some Mesa X11 code needs to learn
to properly handle the depth 32 visual created b
Some hardware can't reinterpret the format of hardware buffers and thus
the X server needs to know the format when the buffer is created.
Signed-off-by: Thomas Hellstrom
---
src/gallium/state_trackers/dri/drm/dri2.c | 43 +++--
1 files changed, 40 insertions(+), 3 delet
Hi Thomas,
Just a couple nit-picky things below:
On 12/06/2011 10:32 AM, Thomas Hellstrom wrote:
Some hardware can't reinterpret the format of hardware buffers and thus
the X server needs to know the format when the buffer is created.
Signed-off-by: Thomas Hellstrom
---
src/gallium/state_tra
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This required is_hiz_depth_format to start returning true on S8_Z24 as
> well, since that's the format we have here. The two previous callers
> are only calling it on non-depthstencil formats.
>
> This avo
On 9 November 2011 11:09, Paul Berry wrote:
> On 31 October 2011 11:59, Ian Romanick wrote:
>
>> On 10/28/2011 02:59 PM, Eric Anholt wrote:
>>
>>> On Fri, 28 Oct 2011 10:42:44 -0700, "Ian Romanick"
>>> wrote:
>>>
From: Ian Romanick
>
_mesa_ir_link_shader needs to be called b
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> Right now the fake packed d/s RBs are creating two sub-renderbuffers
> with their own storage, and the hardware setup and the mapping code
> have been explicitly referencing them. By setting miptrees on the
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This will be used for things like packed depth/stencil temporaries and
> making LLC-cached temporary mappings using blits.
> ---
> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 37 -
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This will let us share teximage mapping logic with renderbuffer
> mapping, which has an intel_mipmap_tree but not a gl_texture_image.
> ---
> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 80
> +++
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This code will be incrementally moving to a model like intel_fbo.c's
> renderbuffer mapping with helper functions, as I move that code here.
> ---
> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 120
>
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> We're going to want to reuse this logic in mapping of fake packed
> miptrees wrapping separate depth/stencil miptrees.
> ---
> src/mesa/drivers/dri/intel/intel_fbo.c | 139
> +-
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> We don't gripe about void * arithmetic for our driver, and this
> prevents silly casting when assigning the result of mapping to
> non-byte types.
> ---
> src/mesa/drivers/dri/intel/intel_regions.c |2 +
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> Before, we had an uncached read of S8 to untile, then a RMW (so
> uncached penalty) of the packed S8Z24 to store the value, then the
> consumer would uncached read that once per pixel. If data was written
>
On Die, 2011-12-06 at 19:33 +0100, Hendrik Sattler wrote:
> Am Montag, 5. Dezember 2011, 17:57:00 schrieb Michel Dänzer:
> > On Son, 2011-11-27 at 15:15 +0100, Hendrik Sattler wrote:
> > > I just upgraded to KDE-4.7.2 and Linux-3.1 and mostly when using Firefox,
> > > I get issues like a stall scr
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This gets the same performance win as the miptree maps did, and
> removes a pile of code duplication.
> ---
> src/mesa/drivers/dri/intel/intel_fbo.c | 140
> +---
> 1 files cha
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This mimics the MapRenderbuffer code, and should improve the
> performance of glGetTexImage().
> ---
> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 83
>
> src/mesa/drivers/d
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> Now that all RBs have miptrees, and miptree mapping covered these last
> two code paths, consistently use them.
> ---
> src/mesa/drivers/dri/intel/intel_fbo.c | 219
> +++-
> s
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On 12/05/2011 11:42 AM, Eric Anholt wrote:
> This evolved over several commits, and I also wanted to document some
> new information about how we handle formats.
> ---
> src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 24
> ++--
From: Anuj Phogat
This patch fixes the samplerCubeShadow support in GLSL shader compiler. shader
compiler was picking
the 'r' texture coordinate for shadow comparison when the expected behaviour is
to use 'q' texture coordinate
in case of cube shadow maps.
Signed-off-by: Anuj Phogat
---
src/
On Mon, 5 Dec 2011 20:42:39 -0700, Brian Paul wrote:
> Copying these files is the first step in moving the software buffer
> code from main/renderbuffer.c to swrast/s_renderbuffer.c
This series is:
Reviewed-by: Eric Anholt
pgpnRAjWW95HZ.pgp
Description: PGP signature
On Mon, 5 Dec 2011 20:43:17 -0700, Brian Paul wrote:
> diff --git a/src/mesa/swrast/s_zoom.c b/src/mesa/swrast/s_zoom.c
> index 16bb997..e832121 100644
> --- a/src/mesa/swrast/s_zoom.c
> +++ b/src/mesa/swrast/s_zoom.c
> @@ -299,11 +299,17 @@ zoom_span( struct gl_context *ctx, GLint imgX, GLint
>
On Tue, 6 Dec 2011 16:44:30 +, Dave Airlie wrote:
> Hi,
>
> So GLX has a rule about not swapping pixmaps, and I've been trying to
> track down why with DRI2 my driver gets requests for swapping pixmaps
> (piglit glx-swap-pixmap test).
>
> So it appears in the DRI2 buffer swap case, we bypass
When driCreateScreen calls driConvertConfigs to try to convert the
configs for swrast, it fails and returns NULL. Instead of checking,
it just clobbers psc->base.configs. Then, when the application asks
for the FBconfigs, there aren't any.
Instead, make the caller responsible for freeing the old
Am Montag, 5. Dezember 2011, 17:57:00 schrieb Michel Dänzer:
> [ Moving to the mesa-dev mailing list ]
>
> On Son, 2011-11-27 at 15:15 +0100, Hendrik Sattler wrote:
> > I just upgraded to KDE-4.7.2 and Linux-3.1 and mostly when using Firefox,
> > I get issues like a stall screen, then a short blan
On Mon, 5 Dec 2011 20:43:14 -0700, Brian Paul wrote:
> In a few places we need to allocate space for some number of generic
> pixels. Use this new define instead of a magic number like 16 or
> 4 * sizeof(GLuint).
Just one comment to patch 4/4, other than that, the series is:
Reviewed-by: Eric
On Mon, 5 Dec 2011 20:41:25 -0700, Brian Paul wrote:
> Implemented in terms of renderbuffer mapping/unmapping and format
> packing/unpacking functions.
>
> The swrast and state tracker code for implementing accumulation are
> unused and will be removed in the next commit.
>
> v2: don't use memc
On Mon, 5 Dec 2011 20:01:52 -0800, Paul Berry wrote:
> On 5 December 2011 18:42, Eric Anholt wrote:
>
> > On Mon, 5 Dec 2011 15:14:13 -0800, Paul Berry
> > wrote:
> > > On 5 December 2011 14:53, Eric Anholt wrote:
> > >
> > > > On Mon, 5 Dec 2011 09:40:45 -0800, Paul Berry <
> > stereotype...
On Tue, 6 Dec 2011 09:19:15 -0800, Paul Berry wrote:
> On 5 December 2011 15:14, Paul Berry wrote:
>
> > On 5 December 2011 14:53, Eric Anholt wrote:
> >
> >
> >> What I really want is to compute the vue map at the top of the pipeline
> >> and reuse it from the various places that want it.
> >>
On Mon, 5 Dec 2011 09:40:46 -0800, Paul Berry wrote:
> Previously, GS generation code contained a lookup table that mapped
> primitive types POLYGON, TRISTRIP, and TRIFAN to TRILIST, mapped
> LINESTRIP to LINELIST, and left all other primitives unchanged. This
> was silly, because we never gener
On Mon, 5 Dec 2011 14:24:08 -0800, Paul Berry wrote:
> On 5 December 2011 11:54, Kenneth Graunke wrote:
>
> > On 12/05/2011 09:40 AM, Paul Berry wrote:
> > > Normally when outputting instructions in SPF (single program flow)
> > > mode, we convert IF and ELSE instructions to conditional ADD
> >
On Tue, 6 Dec 2011 08:17:57 -0800, Paul Berry wrote:
> On 5 December 2011 14:57, Eric Anholt wrote:
>
> > On Mon, 5 Dec 2011 09:40:50 -0800, Paul Berry
> > wrote:
> > > From: Kenneth Graunke
> > >
> > > The 50/50 split is just an attempt to get things working. We likely
> > > want to tune th
On 12/06/2011 12:07 PM, Eric Anholt wrote:
On Mon, 5 Dec 2011 20:43:17 -0700, Brian Paul wrote:
diff --git a/src/mesa/swrast/s_zoom.c b/src/mesa/swrast/s_zoom.c
index 16bb997..e832121 100644
--- a/src/mesa/swrast/s_zoom.c
+++ b/src/mesa/swrast/s_zoom.c
@@ -299,11 +299,17 @@ zoom_span( struct g
https://bugs.freedesktop.org/show_bug.cgi?id=43520
--- Comment #1 from corecode 2011-12-06 12:05:39
PST ---
hello, i'm the developer of the game in question.
i've had a look at this problem to see if there is an easy workaround - however
even simplifying the shader in question very much the pro
https://bugs.freedesktop.org/show_bug.cgi?id=43520
--- Comment #2 from corecode 2011-12-06 12:10:50
PST ---
sorry not sure about the videowall (plasma.frag) thing anymore, there seems to
be one "disabled" videowall in this racetrack ;-)
--
Configure bugmail: https://bugs.freedesktop.org/userpr
On 12/06/2011 12:27 PM, Eric Anholt wrote:
On Mon, 5 Dec 2011 20:41:25 -0700, Brian Paul wrote:
Implemented in terms of renderbuffer mapping/unmapping and format
packing/unpacking functions.
The swrast and state tracker code for implementing accumulation are
unused and will be removed in the
On 12/06/2011 11:11 AM, Anuj Phogat wrote:
> From: Anuj Phogat
>
> This patch fixes the samplerCubeShadow support in GLSL shader compiler.
> shader compiler was picking
> the 'r' texture coordinate for shadow comparison when the expected behaviour
> is to use 'q' texture coordinate
> in case of
On 6 December 2011 11:53, Eric Anholt wrote:
> On Tue, 6 Dec 2011 08:17:57 -0800, Paul Berry
> wrote:
> > On 5 December 2011 14:57, Eric Anholt wrote:
> >
> > > On Mon, 5 Dec 2011 09:40:50 -0800, Paul Berry <
> stereotype...@gmail.com>
> > > wrote:
> > > > From: Kenneth Graunke
> > > >
> > >
We forgot to implement the color conversions in the new fragment shader
backend, so YCBCR + GLSL has been broken since Mesa 7.10. Additionally,
with the fixed function fragment shader rework, YCBCR + FF is broken in
master. The only combination that should still work is YCBCR + ARB_fp.
Presumabl
This is a similar cleanup to what we did for brw_IF(), brw_ELSE(),
brw_ENDIF() handling.
---
src/mesa/drivers/dri/i965/brw_clip_line.c |5 +--
src/mesa/drivers/dri/i965/brw_clip_tri.c | 15 +---
src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 14 +--
src/mesa/drive
The codegen backends all had this same tracking, so just do it at the
EU level.
---
src/mesa/drivers/dri/i965/brw_eu.c |1 +
src/mesa/drivers/dri/i965/brw_eu.h | 10 --
src/mesa/drivers/dri/i965/brw_eu_emit.c | 13 +
src/mesa/drivers/dri/i965/brw_f
The EU code itself can just do this work, since all the consumers were
duplicating it.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 36 +-
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 33 +++-
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 33
The branch distances get patched up later at the WHILE instruction.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c |3 +--
src/mesa/drivers/dri/i965/brw_fs_emit.cpp |2 +-
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp |2 +-
src/mesa/drivers/dri/i965/brw_vs_emit.c |2 +-
4 fil
On 6 December 2011 11:43, Eric Anholt wrote:
> On Tue, 6 Dec 2011 09:19:15 -0800, Paul Berry
> wrote:
> > On 5 December 2011 15:14, Paul Berry wrote:
> >
> > > On 5 December 2011 14:53, Eric Anholt wrote:
> > >
> > >
> > >> What I really want is to compute the vue map at the top of the
> pipel
Maarten Lankhorst wrote:
No point in having it when just having sampler_view_planes is good enough. :-)
This patch causes R600 xvmc to render incorrect chroma for me.
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mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.o
Maarten Lankhorst wrote:
The brokenness in vlVdpVideoMixerRender was compensating for
brokenness in vlVdpPresentationQueueDisplay, so fix both at
the same time.
These fix the two remaining issues (aspect not maintained when
fullscreen and subtitle position getting changed when toggling back fr
Maarten Lankhorst wrote:
create_buffer, destroy_buffer and set_buffer are a curiosity of
vl_mpeg12_decoder
and shouldn't be part of the api.
set_quant_matrix and set_reference_frames shouldn't be separate calls, but part
of
picparm, which is a requirement for h264 to work.
set_decode_target an
On Tue, 6 Dec 2011 13:29:43 -0800, Paul Berry wrote:
> At this point I'm tempted to drop this patch entirely (and the idea of
> precomputing the VUE map), and instead have brw_vs_prog store the VUE map
> in brw->vs.prog_data, where gen{6,7}_sf_state.c can examine it later. This
> would be safe, s
On Tue, 6 Dec 2011 11:02:56 +0800, Yuanhan Liu
wrote:
> On Fri, Dec 02, 2011 at 11:25:55AM -0800, Eric Anholt wrote:
> > As far as I
> > can see, it should be possible to store the DO/WHILE/BRK/CONT
> > information in struct brw_compile so that the only long-lived
> > brw_instruction * pointers o
On Tue, 06 Dec 2011 10:43:15 -0800, Chad Versace
wrote:
> On 12/05/2011 11:42 AM, Eric Anholt wrote:
> > --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> > +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
> > @@ -808,8 +808,9 @@ intel_miptree_map_depthstencil(struct intel_context
> >
On 12/06/2011 11:20 AM, Aaron Plattner wrote:
When driCreateScreen calls driConvertConfigs to try to convert the
configs for swrast, it fails and returns NULL. Instead of checking,
it just clobbers psc->base.configs. Then, when the application asks
for the FBconfigs, there aren't any.
Instead,
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On 12/06/2011 02:43 PM, Eric Anholt wrote:
> On Tue, 06 Dec 2011 10:43:15 -0800, Chad Versace
> wrote:
>> On 12/05/2011 11:42 AM, Eric Anholt wrote:
>
>>> --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
>>> +++ b/src/mesa/drivers/dri/intel/inte
Fixes a regression on Ivybridge (didn't track it down). +3992 piglits.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen7_sf_state.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c
b/src/mesa/drivers/dri/i
On Tue, 6 Dec 2011 13:13:59 -0800, Kenneth Graunke
wrote:
> We forgot to implement the color conversions in the new fragment shader
> backend, so YCBCR + GLSL has been broken since Mesa 7.10. Additionally,
> with the fixed function fragment shader rework, YCBCR + FF is broken in
> master. The
This mimics the MapRenderbuffer code, and should improve the
performance of glGetTexImage().
v2: Fix broken error handling.
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 81
src/mesa/drivers/dri/intel/intel_mipmap_tree.h |2 +
2 files changed, 83 insertions(+
On Tue, 6 Dec 2011 16:12:56 -0800, Kenneth Graunke
wrote:
> Fixes a regression on Ivybridge (didn't track it down). +3992 piglits.
>
> Signed-off-by: Kenneth Graunke
My regression.
I'd be tempted to just put the !drb check in brw_depthbuffer_format and
return D32_FLOAT there. It's what we
Fixes many crashes on Ivybridge due to upload_sf_state calling
brw_depthbuffer_format without an actual depth buffer. This was a
recent regression on master.
+3992 piglits on Ivybridge.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_misc_state.c |3 +++
1 files changed, 3
On 12/05/2011 09:40 AM, Paul Berry wrote:
> R02_PRIM_END and R02_PRIM_START don't actually refer to bits in DWORD
> 2 of R0 (as the name, and comments in the code, would seem to
> indicate). Actually they refer to bits in DWORD 2 of the header for
> URB_WRITE messages.
>
> This patch renames the
On 12/05/2011 09:40 AM, Paul Berry wrote:
> In Gen6, transform feedback is accomplished by having the geometry
> shader send vertex data to the data port using "Streamed Vertex Buffer
> Write" messages, while simultaneously passing vertices through to the
> rest of the graphics pipeline (if renderi
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