[Mesa-dev] [PATCH v5 REBASE] anv: enable VK_EXT_shader_stencil_export

v2: An attempt to support SpvExecutionModeStencilRefReplacingEXT's behavior also follows, with the interpretation to said mode being we prevent writes to the built-in FragStencilRefEXT variable when the execution mode isn't set. v3: A more cautious reading of 1db44252d01bf7539452ccc2b5210c74b8dcd5

Re: [Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

On Tue, Mar 20, 2018 at 2:55 AM, Emil Velikov wrote: > Hi Lepton, > > On 19 March 2018 at 17:33, Lepton Wu wrote: >> If user calls map twice for kms_sw_displaytarget, the first mapped >> buffer could get leaked. Instead of calling mmap every time, just >> reuse previous mapping. Since user could

[Mesa-dev] [PATCH 2/2] ac/nir_to_llvm: add frexp support

Fixes CTS tests: KHR-GL40.gpu_shader_fp64.builtin.frexp_double KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec2 KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec3 KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec4 And piglit test: tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_t

[Mesa-dev] [PATCH 1/2] nir: add frexp_exp and frexp_sig opcodes

--- src/compiler/glsl/glsl_to_nir.cpp | 2 ++ src/compiler/nir/nir_opcodes.py | 3 +++ 2 files changed, 5 insertions(+) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index 4e5d36e972..1e3488ca4c 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compi

[Mesa-dev] [Bug 105613] Compute shader locks up within nested "for" loop

https://bugs.freedesktop.org/show_bug.cgi?id=105613 --- Comment #4 from Philip Rebohle --- Reverting that specific commit did not fix the hang. It also happens with mesa 17.3.6 and LLVM 5.0.1. Given that moving the loop counter to a separate variable fixes the hang, I wonder if this is related t

[Mesa-dev] [Bug 105613] Compute shader locks up within nested "for" loop

https://bugs.freedesktop.org/show_bug.cgi?id=105613 --- Comment #3 from Bas Nieuwenhuizen --- Random guess based on the title is that it is a regression with the following LLVM commit: commit b0efc4fd6672f27ae2cbf28ef290d25a0da1dc08 Author: Alexander Timofeev Date: Fri Dec 1 11:56:34 2017 +00

Re: [Mesa-dev] Create texture2D from NV12

The only way is to use GL_OES_EGL_image_external to load an NV12 image. kmscube does that. Marek On Fri, Mar 16, 2018 at 4:10 AM, Zong, Wei wrote: > Hello, > > May I ask a question? I got a NV12 image buffer and I want to render it > with OpenGL. I know a method to do this is to bind Y/UV plane

[Mesa-dev] [Bug 105613] Compute shader locks up within nested "for" loop

https://bugs.freedesktop.org/show_bug.cgi?id=105613 --- Comment #2 from Philip Rebohle --- Created attachment 138210 --> https://bugs.freedesktop.org/attachment.cgi?id=138210&action=edit GPU hang report -- You are receiving this mail because: You are the QA Contact for the bug. You are the as

[Mesa-dev] [Bug 105613] Compute shader locks up within nested "for" loop

https://bugs.freedesktop.org/show_bug.cgi?id=105613 --- Comment #1 from Philip Rebohle --- Created attachment 138209 --> https://bugs.freedesktop.org/attachment.cgi?id=138209&action=edit Compute shader (GLSL version) -- You are receiving this mail because: You are the QA Contact for the bug.

[Mesa-dev] [Bug 105613] Compute shader locks up within nested "for" loop

https://bugs.freedesktop.org/show_bug.cgi?id=105613 Bug ID: 105613 Summary: Compute shader locks up within nested "for" loop Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/4] Revert "mesa: simplify _mesa_is_image_unit_valid for buffers"

Reviewed-by: Marek Olšák Marek On Mon, Mar 19, 2018 at 2:26 PM, Francisco Jerez wrote: > This reverts commit c0ed52f6146c7e24e1275451773bd47c1eda3145. It was > preventing the image format validation from being done on buffer > textures, which is required to ensure that the application doesn't

Re: [Mesa-dev] [PATCH 14/14] st/radeonsi: enable uniform packing in NIR backend

On 20/03/18 11:41, Marek Olšák wrote: If you rename the function in patch 10, patches 10-14 are: Will do. Reviewed-by: Marek Olšák mailto:marek.ol...@amd.com>> Thanks for the review! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https:

Re: [Mesa-dev] [PATCH] st/nir: fix atomic lowering for gallium drivers

Reviewed-by: Marek Olšák Marek On Mon, Mar 19, 2018 at 8:32 AM, Timothy Arceri wrote: > i965 and gallium handle the atomic buffer index differently. It was > just by luck that the single piglit test for this was passing. > > For gallium we use the atomic binding so that we match the handling

Re: [Mesa-dev] [PATCH 14/14] st/radeonsi: enable uniform packing in NIR backend

If you rename the function in patch 10, patches 10-14 are: Reviewed-by: Marek Olšák Marek On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri wrote: > --- > src/gallium/drivers/radeonsi/si_get.c | 6 +- > src/mesa/state_tracker/st_glsl_to_nir.cpp | 10 ++ > 2 files changed, 7 in

Re: [Mesa-dev] [PATCH v2 8/8] i965: add performance query support on CNL

On Wednesday, March 14, 2018 10:19:14 AM PDT Lionel Landwerlin wrote: > v2: Add brw_oa_cnl.xml to EXTRA_DIST (Emil) > > Signed-off-by: Lionel Landwerlin > --- > src/mesa/drivers/dri/i965/Makefile.am | 1 + > src/mesa/drivers/dri/i965/Makefile.sources| 4 +- > src/mesa

Re: [Mesa-dev] [PATCH v2 5/8] intel: devinfo: add helper functions to fill fusing masks values

On Wednesday, March 14, 2018 10:19:11 AM PDT Lionel Landwerlin wrote: > There are a couple of ways we can get the fusing information from the > kernel : > > - Through DRM_I915_GETPARAM with the SLICE_MASK/SUBSLICE_MASK > parameters > > - Through the new DRM_IOCTL_I915_QUERY by requesting

Re: [Mesa-dev] [PATCH v3 2/2] nir/dead_cf: also remove useless ifs

Both are Reviewed-by: Jason Ekstrand On Mon, Mar 19, 2018 at 4:34 PM, Caio Marcelo de Oliveira Filho < caio.olive...@intel.com> wrote: > Generalize the code for remove dead loops to also remove dead if > nodes. The conditions are the same in both cases, if the node (and > it's children) don't h

Re: [Mesa-dev] [PATCH v2 4/8] intel: devinfo: meson: include drm uapi

On Wednesday, March 14, 2018 10:19:10 AM PDT Lionel Landwerlin wrote: > Already available with the autotools build. > > Signed-off-by: Lionel Landwerlin > --- > src/intel/dev/meson.build | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/intel/dev/meson.build b/src/int

Re: [Mesa-dev] [PATCH v2 7/8] i965: perf: add support for new equation operators

On Wednesday, March 14, 2018 10:19:13 AM PDT Lionel Landwerlin wrote: > Some equations of the CNL metrics started to use operators we haven't > defined yet, just add those. > > Signed-off-by: Lionel Landwerlin > --- > src/mesa/drivers/dri/i965/brw_oa.py | 15 +++ > 1 file changed, 15

Re: [Mesa-dev] [PATCH v2 6/8] i965: perf: query topology

On Wednesday, March 14, 2018 10:19:12 AM PDT Lionel Landwerlin wrote: > With the introduction of asymmetric slices in CNL, we cannot rely on > the previous SUBSLICE_MASK getparam to tell userspace what subslices > are available. > > We introduce a new uAPI in the kernel driver to report exactly wh

Re: [Mesa-dev] [PATCH v2 2/8] intel: devinfo: store slice/subslice/eu masks

On Wednesday, March 14, 2018 10:19:08 AM PDT Lionel Landwerlin wrote: > We want to store values coming from the kernel but as a first step, we > can generate mask values out the numbers already stored in the > gen_device_info masks. > > Signed-off-by: Lionel Landwerlin > --- > src/intel/dev/gen_

Re: [Mesa-dev] [PATCH 10/14] st: add st_glsl_type_size_scalar() helper

On Mon, Mar 19, 2018 at 7:37 PM, Timothy Arceri wrote: > > > On 20/03/18 10:27, Marek Olšák wrote: > >> On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri > > wrote: >> >> This will be used to support uniform packing. >> --- >> src/mesa/state_tracker/st_gls

Re: [Mesa-dev] [PATCH 10/14] st: add st_glsl_type_size_scalar() helper

On 20/03/18 10:27, Marek Olšák wrote: On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri > wrote: This will be used to support uniform packing. ---  src/mesa/state_tracker/st_glsl_types.cpp | 43  src/mesa/state_tra

Re: [Mesa-dev] [PATCH v2 1/8] intel: devinfo: store number of EUs per subslice

On Wednesday, March 14, 2018 10:19:07 AM PDT Lionel Landwerlin wrote: > This will be reused to store values reported by the kernel. The main > use case will be for use as the input values of the metric sets > equations for the INTEL_performance_queries extension. By storing this > information in th

[Mesa-dev] [PATCH v3 2/2] nir/dead_cf: also remove useless ifs

Generalize the code for remove dead loops to also remove dead if nodes. The conditions are the same in both cases, if the node (and it's children) don't have side-effects AND the nodes after it don't use the values produced by the node. The only difference is when evaluating side effects: loops co

[Mesa-dev] [PATCH 1/2] nir/dead_cf: rephrase definition of a dead loop node

--- src/compiler/nir/nir_opt_dead_cf.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/src/compiler/nir/nir_opt_dead_cf.c b/src/compiler/nir/nir_opt_dead_cf.c index 53c92ecc28..b15dfdd0c9 100644 --- a/src/compiler/nir/nir_opt_dead_cf.c +++ b/src/compiler/nir/ni

Re: [Mesa-dev] [PATCH 10/14] st: add st_glsl_type_size_scalar() helper

On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri wrote: > This will be used to support uniform packing. > --- > src/mesa/state_tracker/st_glsl_types.cpp | 43 > > src/mesa/state_tracker/st_glsl_types.h | 1 + > 2 files changed, 44 insertions(+) > > diff --git a

Re: [Mesa-dev] [PATCH v4 04/18] intel/genxml: Add Clear Color struct.

On Thu, Mar 8, 2018 at 8:48 AM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > The size of the clear color struct (expected by the hardware) is 8 > dwords (isl_dev.ss.clear_value_state_size here). But we still need to > track the size of the clear color, used when memcopying it to/from

Re: [Mesa-dev] [PATCH 09/14] st/glsl_to_nir: add support for packed builtin uniforms

For patches 8, 9: Reviewed-by: Marek Olšák Marek On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri wrote: > --- > src/mesa/state_tracker/st_glsl_to_nir.cpp | 42 > +++ > 1 file changed, 37 insertions(+), 5 deletions(-) > > diff --git a/src/mesa/state_tracker/st_glsl

Re: [Mesa-dev] [PATCH v4 01/18] anv/image: Do not override lower bits of dword.

On Thu, Mar 8, 2018 at 8:48 AM, Rafael Antognolli < rafael.antogno...@intel.com> wrote: > The lower bits seem to have extra fields in every platform but gen8 > (even though we don't use them in gen9). So just go ahead and avoid > using them for the address. > > v4: Use Jason's suggestion for comme

Re: [Mesa-dev] [PATCH] anv: off-by-one in GetDescriptorSetLayoutSupport

On Mon, Mar 19, 2018 at 03:39:25PM -0700, Scott D Phillips wrote: > Loop was accessing one more than bindingCount elements from > pBindings, accessing uninitialized memory. > > Fixes: ddc4069122 ("anv: Implement VK_KHR_maintenance3") > --- > src/intel/vulkan/anv_descriptor_set.c | 2 +- > 1 file

Re: [Mesa-dev] [PATCH v2] nir/dead_cf: also remove useless ifs

> > @@ -136,17 +136,27 @@ static bool > > cf_node_has_side_effects(nir_cf_node *node) > > { > > nir_foreach_block_in_cf_node(block, node) { > > + bool inside_loop = node->type == nir_cf_node_loop; > > + for (nir_cf_node *n = &block->cf_node; !inside_loop && n != node; n > > = n->par

Re: [Mesa-dev] [PATCH v0] nir: mako all the intrinsics

On Mon, Mar 19, 2018 at 10:21 AM, Dylan Baker wrote: > Quoting Jason Ekstrand (2018-03-17 23:37:51) > > On Sat, Mar 17, 2018 at 10:32 PM, Dylan Baker > wrote: > > > > Quoting Jason Ekstrand (2018-03-17 09:53:13) > > > On March 16, 2018 23:36:50 Dylan Baker > wrote: > > > > > > >

Re: [Mesa-dev] [PATCH v2] nir/dead_cf: also remove useless ifs

On Mon, Mar 19, 2018 at 1:00 PM, Caio Marcelo de Oliveira Filho < caio.olive...@intel.com> wrote: > Generalize the code for remove dead loops to also remove dead if > nodes. The conditions are the same in both cases, if the node (and > it's children) don't have side-effects AND the nodes after it

[Mesa-dev] [PATCH] anv: off-by-one in GetDescriptorSetLayoutSupport

Loop was accessing one more than bindingCount elements from pBindings, accessing uninitialized memory. Fixes: ddc4069122 ("anv: Implement VK_KHR_maintenance3") --- src/intel/vulkan/anv_descriptor_set.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_descri

[Mesa-dev] [PATCH v7 2/2] gallium/winsys/kms: Add support for multi-planes

Add a new struct kms_sw_plane which delegate a plane and use it in place of sw_displaytarget. Multiple planes share same underlying kms_sw_displaytarget. v2: - add more check for plane size (Tomasz) v3: - split from larger patch (Emil) v4: - no change from v3 v5: - remove mapped field (Tomasz)

[Mesa-dev] [PATCH v7 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

If user calls map twice for kms_sw_displaytarget, the first mapped buffer could get leaked. Instead of calling mmap every time, just reuse previous mapping. Since user could map same displaytarget with different flags, we have to keep two different pointers, one for rw mapping and one for ro mappin

Re: [Mesa-dev] [PATCH 2/4] i965: pipecontrol: add LRI write immediate flag

On Thursday, March 15, 2018 7:24:31 AM PDT Lionel Landwerlin wrote: > Signed-off-by: Lionel Landwerlin > --- > src/mesa/drivers/dri/i965/brw_pipe_control.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.h > b/src/mesa/drivers/dri/i965/brw_pip

Re: [Mesa-dev] [PATCH 4/4] intel: genxml: add INSTPM/CS_DEBUG_MODE2 registers

On Thursday, March 15, 2018 7:24:33 AM PDT Lionel Landwerlin wrote: > Signed-off-by: Lionel Landwerlin > --- > src/intel/genxml/gen10.xml | 6 ++ > src/intel/genxml/gen11.xml | 6 ++ > src/intel/genxml/gen6.xml | 7 +++ > src/intel/genxml/gen7.xml | 7 +++ > src/intel/genxml/gen

Re: [Mesa-dev] [PATCH 07/14] mesa: add support propagate uniform support for packed uniforms

Reviewed-by: Marek Olšák Marek On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri wrote: > --- > src/mesa/program/ir_to_mesa.cpp | 20 ++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/program/ir_to_mesa.cpp > b/src/mesa/program/ir_to_mesa.cpp > in

Re: [Mesa-dev] [PATCH 2/2] i965: perf: reduce i965 binary size

On Friday, March 16, 2018 8:03:59 AM PDT Lionel Landwerlin wrote: > Performance metric numbers are calculated the following way : > >- out of the 256 bytes long OA reports, we accumulate the deltas > into an array of uint64_t > >- the equations' generated code reads the accumulated u

Re: [Mesa-dev] [PATCH 03/14] mesa: create copy uniform to storage helpers

For patches 1-3: Reviewed-by: Marek Olšák Marek On Wed, Mar 14, 2018 at 2:01 AM, Timothy Arceri wrote: > These will be used in the following patch to allow copying directly > to the param list when packing is enabled. > > Reviewed-by: Nicolai Hähnle > --- > src/mesa/main/uniform_query.cpp |

Re: [Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

On 19 March 2018 at 20:00, Lepton Wu wrote: > On Mon, Mar 19, 2018 at 10:55 AM, Emil Velikov > wrote: >> Hi Lepton, >> >> On 19 March 2018 at 17:33, Lepton Wu wrote: >>> If user calls map twice for kms_sw_displaytarget, the first mapped >>> buffer could get leaked. Instead of calling mmap every

Re: [Mesa-dev] [PATCH 1/2] st/glsl_to_nir: gather next_stage in shader_info

On Sun, Mar 18, 2018 at 11:10 PM, Timothy Arceri wrote: > > > On 28/02/18 03:45, Marek Olšák wrote: > >> On Mon, Feb 26, 2018 at 10:43 AM, Timothy Arceri >> wrote: >> >>> --- >>> src/compiler/shader_info.h| 5 + >>> src/mesa/state_tracker/st_glsl_to_nir.cpp | 13 +

Re: [Mesa-dev] [PATCH 1/2] i965: perf: fix a counter return type on hsw

On Friday, March 16, 2018 8:03:58 AM PDT Lionel Landwerlin wrote: > The equation code computes a float (percentage) yet the return type > was an uint64_t. > > Signed-off-by: Lionel Landwerlin > --- > src/mesa/drivers/dri/i965/brw_oa_hsw.xml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Mesa-dev] [PATCH v2 2/5] dri_util: don't fail when not supporting ARB_compatibility with GL3.1

Reviewed-by: Marek Olšák Marek On Sun, Mar 18, 2018 at 8:41 PM, Andres Gomez wrote: > Currently, any driver that does not support the ARB_compatibility > extension will fail on GL3.1 context creation if the application does > not request the forward-compatiblity flag. > > Restore the original

Re: [Mesa-dev] [RFC] radeonsi: guard against indexbuf not being set

Can you test this? diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index b95a2522b2e..73f936bb4a9 100644 --- a/src/mesa/state_tracker/st_draw.c +++ b/src/mesa/state_tracker/st_draw.c @@ -173,6 +173,13 @@ st_draw_vbo(struct gl_context *ctx, /* indices are

Re: [Mesa-dev] [PATCH 2/3] glsl_types: vec8/vec16 support

Patches 1-2 are: Reviewed-by: Timothy Arceri I'll let someone more heavily involved in NIRs design comment on patch 3. On 15/03/18 01:52, Rob Clark wrote: Not used in GL but 8 and 16 component vectors exist in OpenCL. Signed-off-by: Rob Clark --- OpenCL committee: "Sure everyone switched to

Re: [Mesa-dev] Uniform packing for radeonsi NIR

Ping? Would be good to get this in, some of the patches can be painful to rebase. On 14/03/18 17:01, Timothy Arceri wrote: I've dusted off my old uniform packing patches and made it work with the radeonsi NIR backend. This was much simpler than the messing around needed for tgsi (which I never

Re: [Mesa-dev] [RFC] radeonsi: guard against indexbuf not being set

Hi Marek and Roman, > Set this environment variable to disable multithreading: > GALLIUM_THREAD=0 Thanks, so at least I get now a proper stacktrace (at the bottom). I am no OpenGL expert, the only thing I find suspicious is that the last function before entering mesa code actually has a paramete

[Mesa-dev] [PATCH 1/2] ac/nir: add txf_op_ms_mcs support

From: Dave Airlie This opcode is used to retrieve the fmask value for the pixel, we need this to write some meta shaders for multisample image copies. --- src/amd/common/ac_nir_to_llvm.c | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac

[Mesa-dev] [PATCH 2/2] radv: implement multisample image copies (v2)

From: Dave Airlie It appears its quite legal to do image copies on multisample images, however due to a bug in our txf handling and incomplete tests we never actually noticed we didn't do it properly in radv. This patch implements a compute shader to copy multiple samples of an image to another

[Mesa-dev] [PATCH] radv: don't export NULL layer.

From: Dave Airlie We have some cases where in subpass we want the layer but having it be 0 and loaded in the frag shader without the vertex shader exporting it is fine. So don't export the layer if we don't have a value to put in it. Fixes: d4c74aed7a8 (radv/multiview: mark layer_input if we ha

[Mesa-dev] [PATCH v2] nir/dead_cf: also remove useless ifs

Generalize the code for remove dead loops to also remove dead if nodes. The conditions are the same in both cases, if the node (and it's children) don't have side-effects AND the nodes after it don't use the values produced by the node. The only difference is when evaluating side effects: loops co

Re: [Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

On Mon, Mar 19, 2018 at 10:55 AM, Emil Velikov wrote: > Hi Lepton, > > On 19 March 2018 at 17:33, Lepton Wu wrote: >> If user calls map twice for kms_sw_displaytarget, the first mapped >> buffer could get leaked. Instead of calling mmap every time, just >> reuse previous mapping. Since user could

[Mesa-dev] [Bug 105494] UT2004 cube map reflection problem

https://bugs.freedesktop.org/show_bug.cgi?id=105494 almos changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED

Re: [Mesa-dev] [PATCH] dri3: Don't fail on version mismatch

On 20 March 2018 at 01:36, Daniel Stone wrote: > The previous commit to make DRI3 modifier support optional, breaks with > an updated server and old client. > > Make sure we never set multibuffers_available unless we also support it > locally. Make sure we don't call stubs of new-DRI3 functions (o

Re: [Mesa-dev] [PATCH 0/8] Fix several issues/missings in make dist/distcheck

On 19 March 2018 at 17:49, Juan A. Suarez Romero wrote: > This series fix several issues that happen when running "./autogen.sh && make > {dist, distcheck}". > Sigh, I should really send local patches as soon as I write them - 1-6 have been sitting locally for about a week :-\ 1-7 are Reviewed-by

Re: [Mesa-dev] [PATCH 8/8] vc4: autotools: fix header inclusion in CFLAGS

On 19 March 2018 at 17:49, Juan A. Suarez Romero wrote: > Load NIR compiler headers from srcdir, not builddir. > --- > src/gallium/drivers/vc4/Makefile.am | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/vc4/Makefile.am > b/src/gallium/drivers/vc4/Make

[Mesa-dev] [PATCH] fixup! nir: mako all the intrinsics

--- src/compiler/nir/nir_builder_opcodes_h.py | 4 +- src/compiler/nir/nir_intrinsics.py| 865 +++--- src/compiler/nir/nir_intrinsics_c.py | 4 +- src/compiler/nir/nir_intrinsics_h.py | 4 +- 4 files changed, 450 insertions(+), 427 deletions(-) diff

[Mesa-dev] [PATCH 4/4] i965: Use intel_bufferobj_buffer() wrapper in image surface state setup.

Instead of directly using intel_obj->buffer. Among other things intel_bufferobj_buffer() will update intel_buffer_object:: gpu_active_start/end, which are used by glBufferSubData() to decide which path to take. Fixes a failure in the Piglit ARB_shader_image_load_store-host-mem-barrier Buffer Upda

[Mesa-dev] [PATCH 3/4] i965: Handle non-zero texture buffer offsets in buffer object range calculation.

Otherwise the specified surface state will allow the GPU to access memory up to BufferOffset bytes past the end of the buffer. Found by inspection. Cc: mesa-sta...@lists.freedesktop.org --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[Mesa-dev] [PATCH 2/4] i965: Move buffer texture size calculation into a common helper function.

The buffer texture size calculations (should be easy enough, right?) are repeated in three different places, each of them subtly broken in a different way. E.g. the image load/store path was never fixed to clamp to MaxTextureBufferSize, and none of them are taking into account the buffer offset co

[Mesa-dev] [PATCH 1/4] Revert "mesa: simplify _mesa_is_image_unit_valid for buffers"

This reverts commit c0ed52f6146c7e24e1275451773bd47c1eda3145. It was preventing the image format validation from being done on buffer textures, which is required to ensure that the application doesn't attempt to create a buffer texture with an internal format incompatible with the image unit forma

Re: [Mesa-dev] [RFC] radeonsi: guard against indexbuf not being set

Set this environment variable to disable multithreading: GALLIUM_THREAD=0 Marek On Mon, Mar 19, 2018 at 1:05 PM, Clemens Eisserer wrote: > Hi, > > >> This is a RFC because I don't really know what I'm doing here. But we > >> have this problem with AMD and KWin already for quite a long time and

[Mesa-dev] [Bug 105444] Enable GL disk shader cache when transform feedback is enabled

https://bugs.freedesktop.org/show_bug.cgi?id=105444 Jordan Justen changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

Hi Lepton, On 19 March 2018 at 17:33, Lepton Wu wrote: > If user calls map twice for kms_sw_displaytarget, the first mapped > buffer could get leaked. Instead of calling mmap every time, just > reuse previous mapping. Since user could map same displaytarget with > different flags, we have to keep

[Mesa-dev] [PATCH 8/8] vc4: autotools: fix header inclusion in CFLAGS

Load NIR compiler headers from srcdir, not builddir. --- src/gallium/drivers/vc4/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/vc4/Makefile.am b/src/gallium/drivers/vc4/Makefile.am index d65bf20e26d..abcad54f087 100644 --- a/src/gallium/driver

[Mesa-dev] [PATCH 7/8] autotools: add tegra header files

--- Makefile.am | 1 + src/gallium/winsys/tegra/drm/Makefile.sources | 1 + 2 files changed, 2 insertions(+) diff --git a/Makefile.am b/Makefile.am index de6921bf1fc..804b1d85353 100644 --- a/Makefile.am +++ b/Makefile.am @@ -75,6 +75,7 @@ noinst_HEADERS = \

[Mesa-dev] [PATCH 6/8] swr/rast: autotools: add events_private.proto in dist tarball.

--- src/gallium/drivers/swr/Makefile.am | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/Makefile.am b/src/gallium/drivers/swr/Makefile.am index 13c7f8b7345..5ec9213c349 100644 --- a/src/gallium/drivers/swr/Makefile.am +++ b/src/gallium/drivers/swr/Makefile.am @@ -368,6

[Mesa-dev] [PATCH 4/8] anv/radv: autotools: include vulkan_*.h headers

--- src/amd/vulkan/Makefile.am | 4 src/intel/Makefile.vulkan.am | 4 2 files changed, 8 insertions(+) diff --git a/src/amd/vulkan/Makefile.am b/src/amd/vulkan/Makefile.am index cc1b53980fd..00b808229fa 100644 --- a/src/amd/vulkan/Makefile.am +++ b/src/amd/vulkan/Makefile.am @@ -23,6

[Mesa-dev] [PATCH 3/8] nir: autotools, meson: add GLSL.ext.AMD.h in the files list

--- src/compiler/Makefile.sources | 1 + src/compiler/nir/meson.build | 1 + 2 files changed, 2 insertions(+) diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources index 55143dbc66a..5150f56b6a9 100644 --- a/src/compiler/Makefile.sources +++ b/src/compiler/Makefile.sources @

[Mesa-dev] [PATCH 5/8] radv: autotools: add radv_extensions.h in the generated VULKAN list

--- src/amd/vulkan/Makefile.sources | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources index b0a8f8b97d8..ccb956a2396 100644 --- a/src/amd/vulkan/Makefile.sources +++ b/src/amd/vulkan/Makefile.sources @@ -83,5 +83

[Mesa-dev] [PATCH 2/8] vulkan: autotools: build Wayland part conditionally

Build vulkan/wsi/wayland if Wayland platform is enabled. CC: Daniel Stone Fixes: bfa22266cd4d ("vulkan/wsi/wayland: Add support for zwp_dmabuf") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105211 --- configure.ac | 7 +-- src/vulkan/Makefile.am | 4 2 files changed,

[Mesa-dev] [PATCH 1/8] Revert "build: Move wayland-scanner check into platform"

This reverts commit 61d6ff3ba3c0a21239641f4d5fe8d4fa9c864325. We need to unconditionally check for wayland-scanner, so make dist/distcheck is not broken. CC: Daniel Stone --- configure.ac | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/configure.ac b/configure

[Mesa-dev] [PATCH 0/8] Fix several issues/missings in make dist/distcheck

This series fix several issues that happen when running "./autogen.sh && make {dist, distcheck}". The first two patches in the series is a new fix for issue https://bugs.freedesktop.org/show_bug.cgi?id=105211, as the current version breaks when running the above command, due "make dist/distcheck"

[Mesa-dev] [PATCH v6 2/2] gallium/winsys/kms: Add support for multi-planes

Add a new struct kms_sw_plane which delegate a plane and use it in place of sw_displaytarget. Multiple planes share same underlying kms_sw_displaytarget. Reviewed-by: Tomasz Figa Reviewed-by: Emil Velikov Signed-off-by: Lepton Wu --- .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 152

[Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

If user calls map twice for kms_sw_displaytarget, the first mapped buffer could get leaked. Instead of calling mmap every time, just reuse previous mapping. Since user could map same displaytarget with different flags, we have to keep two different pointers, one for rw mapping and one for ro mappin

Re: [Mesa-dev] [PATCH v0] nir: mako all the intrinsics

Quoting Jason Ekstrand (2018-03-17 23:37:51) > On Sat, Mar 17, 2018 at 10:32 PM, Dylan Baker wrote: > > Quoting Jason Ekstrand (2018-03-17 09:53:13) > > On March 16, 2018 23:36:50 Dylan Baker wrote: > > > > > Quoting Rob Clark (2018-03-16 14:25:09) > > >> On Fri, Mar 16, 2018

[Mesa-dev] [PATCH] radeon/vce: move feedback command inside of destroy function

On the CI family, firmware requires the destory command have to be the last command in the IB, moving feedback command after destroy is causing issues on CI cards, so we have to keep the previous logic that moves destroy back to the last command. But as the original issue fixed previously, with th

Re: [Mesa-dev] [RFC] radeonsi: guard against indexbuf not being set

Hi, >> This is a RFC because I don't really know what I'm doing here. But we >> have this problem with AMD and KWin already for quite a long time and >> I hope it can be fixed now. > If index_size > 0, indexbuf should always be non-NULL. This is a bug > somewhere else. I've also been bitten by th

[Mesa-dev] [AppVeyor] mesa master #7217 completed

Build mesa 7217 completed Commit e10dc12f6f by Jose Fonseca on 3/19/2018 3:41 PM: scons: need to split CC or things might fail\n\nWe've seen this fail internally.\n\nReviewed-by: Roland Scheidegger Configure your notification preferences ___

[Mesa-dev] [PATCH v6 28/34] nvir/nir: implement geometry shader nir_intrinsics

v4: use smarter getIndirect helper use new getSlotAddress helper use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_

[Mesa-dev] [PATCH v6 29/34] nvir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cp

[Mesa-dev] [PATCH v6 31/34] nvir/nir: implement images

v3: fix compiler warnings v4: use loadFrom helper v5: fix signed min/max v6: set tex mask add support for indirect image access set cache mode Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 395 +++-- 1 file changed, 375 insertions(+)

[Mesa-dev] [PATCH v6 26/34] nvir/nir: implement vote and ballot

v2: add vote_eq support use the new subop intrinsic helper add ballot v3: add read_(first_)invocation Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 42 ++ 1 file changed, 42 insertions(+) diff --git a/src/gallium/drivers/nouveau

[Mesa-dev] [PATCH v6 34/34] nvir/nir: implement intrinsic shader_clock

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 19086157baa..2f831bfe487

[Mesa-dev] [PATCH v6 23/34] nvir/nir: implement nir_ssa_undef_instr

v2: use mkOp Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 43a1

[Mesa-dev] [PATCH v6 33/34] nvir/nir: implement load_per_vertex_output

v4: use smarter getIndirect helper use new getSlotAddress helper v5: use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 23 ++ 1 file changed, 23 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_

[Mesa-dev] [PATCH v6 32/34] nvir/nir: add memory barriers

v5: add more barrier intrinsics Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_f

[Mesa-dev] [PATCH v6 27/34] nvir/nir: implement variable indexing

we store those arrays in local memory and reserve some space for each of the arrays. The arrays are stored in a packed format, because we know quite easily the context of each index. We don't do that in TGSI so far. This causes various issues to come up in the MemoryOpt pass, because ld/st with in

[Mesa-dev] [PATCH v6 30/34] nvir/nir: implement ssbo intrinsics

v4: use loadFrom helper v5: support indirect buffer access Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 90 ++ 1 file changed, 90 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/driver

[Mesa-dev] [PATCH v6 22/34] nvir/nir: implement loading system values

v2: support more sys values fixed a bug where for multi component reads all values ended up in x v3: add load_patch_vertices_in v4: add subgroup stuff v5: add helper invocation v6: fix loading 64 bit system values Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.c

[Mesa-dev] [PATCH v6 16/34] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 17 + 1 file changed, 17 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 2a9c0929e90..3b

[Mesa-dev] [PATCH v6 20/34] nvir/nir: implement nir_intrinsic_load_(interpolated_)input

v3: and load_output v4: use smarter getIndirect helper use new getSlotAddress helper v5: don't use const_offset directly fix for indirects v6: add support for interpolateAt Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 97 ++ 1 f

[Mesa-dev] [PATCH v6 15/34] nvir/nir: implement nir_load_const_instr

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index a10038f9a88..2a

[Mesa-dev] [PATCH v6 18/34] nvir/nir: implement nir_intrinsic_load_uniform

v2: use new getIndirect helper fixes symbols for 64 bit types v4: use smarter getIndirect helper simplify address calculation use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 10 ++ 1 file changed, 10 insertions(+)

[Mesa-dev] [PATCH v6 21/34] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 04a0f03ae2f..2bd4

[Mesa-dev] [PATCH v6 19/34] nvir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues indirects have to be multiplied by 0x10 fix indirect access v4: use smarter getIndirect helper use storeTo helper v5: don't use const_offset directly Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 46 +

[Mesa-dev] [PATCH v6 12/34] nvir/nir: add loadFrom and storeTo helpler

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 72 ++ 1 file changed, 72 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 8d547dbbea4..d4

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