On Wednesday, March 14, 2018 10:19:12 AM PDT Lionel Landwerlin wrote:
> With the introduction of asymmetric slices in CNL, we cannot rely on
> the previous SUBSLICE_MASK getparam to tell userspace what subslices
> are available.
>
> We introduce a new uAPI in the kernel driver to report exactly what
> part of the GPU are fused and require this to be available on Gen10+.
>
> Prior generations can continue to rely on GETPARAM on older kernels.
>
> This patch is quite a lot of code because we have to support lots of
> different kernel versions, ranging from not providing any information
> (for Haswell on 4.13 through 4.17), to being able to query through
> GETPARAM (for gen8/9 on 4.13 through 4.17), to finally requiring 4.17
> for Gen10+.
>
> This change stores topology information in a unified way on
> brw_context.topology from the various kernel APIs. And then generates
> the appropriate values for the equations from that unified topology.
>
> v2: Move slice/subslice masks fields to gen_device_info (Rafael)
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
> Acked-by: Rafael Antognolli <rafael.antogno...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_performance_query.c | 182
> +++++++++++++---------
> 1 file changed, 111 insertions(+), 71 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c
> b/src/mesa/drivers/dri/i965/brw_performance_query.c
> index 13eff31ee61..3b52db6e74e 100644
> --- a/src/mesa/drivers/dri/i965/brw_performance_query.c
> +++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
> @@ -1921,6 +1921,101 @@ init_oa_configs(struct brw_context *brw)
> }
> }
>
> +static bool
> +query_topology(struct brw_context *brw)
> +{
> + __DRIscreen *screen = brw->screen->driScrnPriv;
> + struct drm_i915_query_item item = {
> + .query_id = DRM_I915_QUERY_TOPOLOGY_INFO,
> + };
> + struct drm_i915_query query = {
> + .num_items = 1,
> + .items_ptr = (uintptr_t) &item,
> + };
> +
> + if (drmIoctl(screen->fd, DRM_IOCTL_I915_QUERY, &query))
> + return false;
> +
> + struct drm_i915_query_topology_info *topo_info =
> + (struct drm_i915_query_topology_info *) calloc(1, item.length);
> + item.data_ptr = (uintptr_t) topo_info;
> +
> + if (drmIoctl(screen->fd, DRM_IOCTL_I915_QUERY, &query) ||
> + item.length <= 0)
> + return false;
> +
> + gen_device_info_update_from_topology(&brw->screen->devinfo,
> + topo_info);
> +
> + free(topo_info);
> +
> + return true;
> +}
> +
> +static bool
> +getparam_topology(struct brw_context *brw)
> +{
> + __DRIscreen *screen = brw->screen->driScrnPriv;
> + drm_i915_getparam_t gp;
> + int ret;
> +
> + int slice_mask = 0;
> + gp.param = I915_PARAM_SLICE_MASK;
> + gp.value = &slice_mask;
> + ret = drmIoctl(screen->fd, DRM_IOCTL_I915_GETPARAM, &gp);
> + if (ret)
> + return false;
> +
> + int subslice_mask = 0;
> + gp.param = I915_PARAM_SUBSLICE_MASK;
> + gp.value = &subslice_mask;
> + ret = drmIoctl(screen->fd, DRM_IOCTL_I915_GETPARAM, &gp);
> + if (ret)
> + return false;
> +
> + gen_device_info_update_from_masks(&brw->screen->devinfo,
> + slice_mask,
> + subslice_mask,
> + brw->screen->eu_total);
> +
> + return true;
> +}
> +
> +static void
> +compute_topology_builtins(struct brw_context *brw)
> +{
> + const struct gen_device_info *devinfo = &brw->screen->devinfo;
> +
> + brw->perfquery.sys_vars.slice_mask = devinfo->slice_masks;
> + brw->perfquery.sys_vars.n_eu_slices = devinfo->num_slices;
> +
> + for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
> + brw->perfquery.sys_vars.n_eu_sub_slices +=
> + __builtin_popcount(devinfo->subslice_masks[i]);Probably best to use _mesa_bitcount() here and elsewhere. Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
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