Oh. You're right about this. It seems that my logic failed somehow thinking
this was available to ES 2.0
On Thu, Nov 19, 2015 at 1:44 AM, Tapani Pälli
wrote:
> The extension spec mentions modification to functions GetTexEnvfv,
> GetTexEnviv, TexEnvi, TexEnvf, Texenviv, and TexEnvfv which are not
On 19/11/15 00:08, Brian Paul wrote:
Protect signal-related code with PIPE_OS_UNIX test.
---
src/gallium/auxiliary/hud/hud_context.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index a055480..24a68
The extension spec mentions modification to functions GetTexEnvfv,
GetTexEnviv, TexEnvi, TexEnvf, Texenviv, and TexEnvfv which are not part
of ES 2.0 API. Also the parameter enums are not part of ES2 header. I
does not seem like we would want to expose this extension on ES2?
On 11/19/2015 09:
https://bugs.freedesktop.org/show_bug.cgi?id=93003
le...@thefnords.org changed:
What|Removed |Added
CC||le...@thefnords.org
--
You are rec
https://bugs.freedesktop.org/show_bug.cgi?id=93003
Bug ID: 93003
Summary: mesa 11.x with vmwgfx (vmware Fusion 8.x) graphical
corruption under gnome-shell on GTK applications.
Product: Mesa
Version: 11.0
Hardware: x86-64 (A
Basically the reason for needing ES 3.1 is because it relies on glMemoryBarrier.
This change puts buffer_storage in the same position in both ES and GL, since
mesa exposes buffer_storage on a much older version of GL than it is suppose to.
---
docs/relnotes/11.1.0.html| 2 +-
src/mapi/glap
This should also be available there, so this was simple.
---
src/mesa/main/extensions_table.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index a5d88d9..0095c85 100644
--- a/src/mesa/main/extensions_table.h
This fixes teximage-colors, fbo-generatemipmap-formats, and probably
others (in relation to the RGB5 formats, others still fail).
Signed-off-by: Ilia Mirkin
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/freedreno/a4xx/a4xx.xml.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(
On 11/18/2015 08:59 PM, Emil Velikov wrote:
Hi Tapani,
On 28 October 2015 at 13:27, Tapani Pälli wrote:
On 10/27/2015 06:42 PM, Ian Romanick wrote:
On 10/27/2015 12:11 AM, Tapani Pälli wrote:
Fixes following failing dEQP test:
dEQP-GLES3.functional.fbo.api.attachment_query_empty_fbo
Patch adds additional mask for tracking which vertex buffer bindings
are set. This array can be directly compared to which vertex arrays
are enabled and should match when drawing.
Fixes following CTS tests:
ES31-CTS.draw_indirect.negative-noVBO-arrays
ES31-CTS.draw_indirect.negative-noVBO-e
On Nov 18, 2015 6:38 PM, "Ian Romanick" wrote:
>
> From: Ian Romanick
>
> v2: Handle immediate value for MCS smarter. Rebase on changes to
> nir_texop_sampels_identical (missing second parameter). Suggested by
> Jason. This still doesn't handle the 16x MSAA case.
We could always just enable i
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a4xx/a4xx.xml.h | 2 ++
src/gallium/drivers/freedreno/a4xx/fd4_rasterizer.c | 5 +
src/gallium/drivers/freedreno/freedreno_screen.c| 6 ++
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/gallium/driv
On Nov 18, 2015 5:02 PM, "Jason Ekstrand" wrote:
>
> On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke
wrote:
> > On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
> >> From: Ian Romanick
> >>
> >> Signed-off-by: Ian Romanick
> >> ---
> >> src/mesa/drivers/dri/i965/brw_fs_nir.cpp
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a4xx/a4xx.xml.h| 1 +
src/gallium/drivers/freedreno/a4xx/fd4_texture.c | 1 +
src/gallium/drivers/freedreno/freedreno_screen.c | 2 +-
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a4xx/
The lower layers assume that we support this, and it's been core since
GL 1.4. This fixes a slew of piglit tests, especially around
tex-miplevel-selection.
Signed-off-by: Ilia Mirkin
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/freedreno/a4xx/a4xx.xml.h| 6 ++
src/galliu
On Wednesday, November 18, 2015 06:25:45 PM Ian Romanick wrote:
> On 11/18/2015 06:15 PM, Matt Turner wrote:
> > On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote:
> >> On 11/18/2015 03:01 PM, Nanley Chery wrote:
> >>> From: Nanley Chery
> >>>
> >>> Make it easier to determine where to add new
On Thu, Nov 19, 2015 at 11:31:55AM +0900, Michel Dänzer wrote:
> From: Michel Dänzer
>
> llvm.exp2.f32 doesn't work in some cases yet.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709
> Signed-off-by: Michel Dänzer
> ---
>
> Once the problem is fixed in the LLVM AMDGPU backend,
From: Ian Romanick
v2: Handle immediate value for MCS smarter. Rebase on changes to
nir_texop_sampels_identical (missing second parameter). Suggested by
Jason. This still doesn't handle the 16x MSAA case.
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4 ++
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 3c2674d..c93227c 1
From: Ian Romanick
This is the NIR analog to GLSL IR ir_samples_identical. However, the
NIR has an extra source. This is a fake sample index with a type
nir_tex_src_ms_index. This enables backends to (likely) share more code
with the existing nir_texop_txf_ms implementation.
v2: Don't add the
From: Michel Dänzer
llvm.exp2.f32 doesn't work in some cases yet.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709
Signed-off-by: Michel Dänzer
---
Once the problem is fixed in the LLVM AMDGPU backend, we can re-enable
llvm.exp2.f32 for the fixed LLVM version.
src/gallium/drivers
On 11/18/2015 06:15 PM, Matt Turner wrote:
> On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote:
>> On 11/18/2015 03:01 PM, Nanley Chery wrote:
>>> From: Nanley Chery
>>>
>>> Make it easier to determine where to add new extensions.
>>> Performed with the vim sort command.
>>
>> Uh... no, please.
On 11/18/2015 03:01 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Enable developers to know if the table's alphabetical sorting
> is maintained or lost.
I like this in principle, but let's be honest. Almost all of the time,
the people who don't sort (by whatever order we agree) also don't ru
On Wed, Nov 18, 2015 at 6:07 PM, Ian Romanick wrote:
> On 11/18/2015 03:01 PM, Nanley Chery wrote:
>> From: Nanley Chery
>>
>> Make it easier to determine where to add new extensions.
>> Performed with the vim sort command.
>
> Uh... no, please. Extensions should be sorted in each group, but wha
On Wednesday, November 18, 2015 05:20:29 PM Ian Romanick wrote:
> On 11/18/2015 04:07 PM, Kenneth Graunke wrote:
> > On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
> >> From: Ian Romanick
> >>
> >> Signed-off-by: Ian Romanick
> >> ---
> >> src/mesa/drivers/dri/i965/brw_fs_nir.cp
On 11/18/2015 03:01 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Make it easier to determine where to add new extensions.
> Performed with the vim sort command.
Uh... no, please. Extensions should be sorted in each group, but what
is wrong with the old group ordering? ARB, KHR, OES, EXT, t
On Wed, Nov 18, 2015 at 3:47 PM, Matt Turner wrote:
>
> On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery
wrote:
> > From: Nanley Chery
> >
> > Make it easier to determine where to add new extensions.
> > Performed with the vim sort command.
>
> Well, I think I'm obligated to review such a patch :)
On Wed, Nov 18, 2015 at 5:23 PM, Ian Romanick wrote:
> On 11/18/2015 04:06 PM, Kenneth Graunke wrote:
>> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> Signed-off-by: Ian Romanick
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 +
>
On Wed, Nov 18, 2015 at 5:31 PM, Ian Romanick wrote:
> On 11/18/2015 05:02 PM, Jason Ekstrand wrote:
>> On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke
>> wrote:
>>> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
From: Ian Romanick
Signed-off-by: Ian Romanick
>
On 11/18/2015 05:02 PM, Jason Ekstrand wrote:
> On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke
> wrote:
>> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> Signed-off-by: Ian Romanick
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp |
On 11/18/2015 04:06 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16 +++
On 11/18/2015 04:57 PM, Jason Ekstrand wrote:
> On Wed, Nov 18, 2015 at 4:07 PM, Kenneth Graunke
> wrote:
>> On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> Signed-off-by: Ian Romanick
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16
On 11/18/2015 04:07 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++-
>> 1 file changed, 7 insertions(+), 9 deletions(-)
>>
On Wed, Nov 18, 2015 at 4:23 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:46 PM Ian Romanick wrote:
>> This patch series implements a new GL extension,
>> EXT_shader_samples_identical. This extension allows shaders to
>> determine when all of the samples in a particular texe
On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 +
>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |
On Wed, Nov 18, 2015 at 03:50:32PM -0800, Ben Widawsky wrote:
> On Wed, Nov 18, 2015 at 11:10:12AM +0200, Pohjolainen, Topi wrote:
> > On Tue, Nov 17, 2015 at 05:30:06PM -0800, Ben Widawsky wrote:
> > > Background: Prior to Skylake and since Ivybridge Intel hardware has had
> > > the
> > > ability
On Wed, Nov 18, 2015 at 4:07 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++-
>> 1 file changed, 7 insertions(+), 9 delet
On Wed, Nov 18, 2015 at 4:23 PM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 03:46:52 PM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> This is the NIR analog to GLSL IR ir_samples_identical. However, the
>> NIR has an extra source. This is a fake sample index with a type
>> nir_t
On Wed, Nov 18, 2015 at 12:15:40PM +0200, Pohjolainen, Topi wrote:
> On Tue, Nov 17, 2015 at 05:31:12PM -0800, Ben Widawsky wrote:
> > Some of the information originally in this commit message is now in the
> > patch
> > before this.
> >
> > SKL adds compressible render targets and as a result mu
On Wed, Nov 18, 2015 at 6:47 PM, Matt Turner wrote:
> On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote:
>> From: Nanley Chery
>>
>> Make it easier to determine where to add new extensions.
>> Performed with the vim sort command.
>
> Well, I think I'm obligated to review such a patch :)
>
>> S
On 19 November 2015 at 00:16, Nanley Chery wrote:
> On Wed, Nov 18, 2015 at 4:08 PM, Emil Velikov
> wrote:
>>
>> On 18 November 2015 at 23:40, Nanley Chery wrote:
>> > On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin
>> > wrote:
>> >>
>> >> Why have the count as an entry in the enum? Can't you just
On Wed, Nov 18, 2015 at 4:17 PM, Emil Velikov
wrote:
> On 18 November 2015 at 22:39, Nanley Chery wrote:
> > On Wed, Nov 18, 2015 at 12:33 PM, Emil Velikov >
> > wrote:
> >>
> >> Hi Nanley,
> >>
> >> On 18 November 2015 at 20:29, Nanley Chery
> wrote:
> >> > From: Nanley Chery
> >> >
> >> > H
On Wed, Nov 18, 2015 at 4:08 PM, Emil Velikov wrote:
> On 18 November 2015 at 23:40, Nanley Chery wrote:
>> On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin wrote:
>>>
>>> Why have the count as an entry in the enum? Can't you just do
>>> ARRAY_SIZE(_mesa_extension_table) ?
>>>
>>
>> The compiler doe
On Wednesday, November 18, 2015 03:46:52 PM Ian Romanick wrote:
> From: Ian Romanick
>
> This is the NIR analog to GLSL IR ir_samples_identical. However, the
> NIR has an extra source. This is a fake sample index with a type
> nir_tex_src_ms_index. This enables backends to (likely) share more
On Wednesday, November 18, 2015 03:46:46 PM Ian Romanick wrote:
> This patch series implements a new GL extension,
> EXT_shader_samples_identical. This extension allows shaders to
> determine when all of the samples in a particular texel are the same.
> This takes advantage of the way compressed m
On Wednesday, November 18, 2015 03:46:47 PM Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> Cc: "Chris Forbes"
> ---
> docs/specs/EXT_shader_samples_identical.txt | 174
>
> 1 file changed, 174 insertions(+)
> create mode 100644 docs/sp
On Wed, Nov 18, 2015 at 4:08 PM, Emil Velikov
wrote:
> On 18 November 2015 at 23:40, Nanley Chery wrote:
> > On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin
> wrote:
> >>
> >> Why have the count as an entry in the enum? Can't you just do
> >> ARRAY_SIZE(_mesa_extension_table) ?
> >>
> >
> > The co
On 18 November 2015 at 22:39, Nanley Chery wrote:
> On Wed, Nov 18, 2015 at 12:33 PM, Emil Velikov
> wrote:
>>
>> Hi Nanley,
>>
>> On 18 November 2015 at 20:29, Nanley Chery wrote:
>> > From: Nanley Chery
>> >
>> > Help developers understand the table's organization.
>> >
>> > Suggested-by: Jas
On Wed, Nov 18, 2015 at 7:05 PM, Samuel Pitoiset
wrote:
> The hardware can actually generates vertexid when vertices come from
> a client-side buffer like when glDrawElements is used.
>
> This doesn't fix (or break) any piglit tests but it improves the
> previous attempt of Ilia (c830d19 "nv50: av
On Wed, Nov 18, 2015 at 10:28:27AM -0800, Chad Versace wrote:
> On Tue 17 Nov 2015, Ben Widawsky wrote:
> > Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> > ability to use a MCS (Multisample Control Surface) as auxiliary data in
> > "compression" operations on the sur
On 18 November 2015 at 23:40, Nanley Chery wrote:
> On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin wrote:
>>
>> Why have the count as an entry in the enum? Can't you just do
>> ARRAY_SIZE(_mesa_extension_table) ?
>>
>
> The compiler doesn't know the size of the array by just looking at the
> header
Protect signal-related code with PIPE_OS_UNIX test.
---
src/gallium/auxiliary/hud/hud_context.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/auxiliary/hud/hud_context.c
b/src/gallium/auxiliary/hud/hud_context.c
index a055480..24a68dd 100644
--- a/src/gallium/auxiliary/hud
On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++-
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.c
On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 +
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16
> src/mesa/drivers/dri/i965/brw_vec4_nir.cp
The hardware can actually generates vertexid when vertices come from
a client-side buffer like when glDrawElements is used.
This doesn't fix (or break) any piglit tests but it improves the
previous attempt of Ilia (c830d19 "nv50: avoid using inline vertex
data submit when gl_VertexID is used")
Th
It lives! Thanks for picking this up, Ian.
Had a very brief look at the series as it arrived, looks good; will try to
do a real review later today.
- Chris
On Nov 19, 2015 12:47 PM, "Ian Romanick" wrote:
> This patch series implements a new GL extension,
> EXT_shader_samples_identical. This ex
On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Enable developers to know if the table's alphabetical sorting
> is maintained or lost.
My hero.
> Signed-off-by: Nanley Chery
> ---
> src/mesa/main/extensions.h | 1 +
> src/mesa/main/tests/Makefile.am
On Wed, Nov 18, 2015 at 10:28:27AM -0800, Chad Versace wrote:
> On Tue 17 Nov 2015, Ben Widawsky wrote:
> > Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> > ability to use a MCS (Multisample Control Surface) as auxiliary data in
> > "compression" operations on the sur
On Wed, Nov 18, 2015 at 11:10:12AM +0200, Pohjolainen, Topi wrote:
> On Tue, Nov 17, 2015 at 05:30:06PM -0800, Ben Widawsky wrote:
> > Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> > ability to use a MCS (Multisample Control Surface) as auxiliary data in
> > "compres
From: Ian Romanick
Signed-off-by: Ian Romanick
Cc: "Chris Forbes"
---
docs/specs/EXT_shader_samples_identical.txt | 174
1 file changed, 174 insertions(+)
create mode 100644 docs/specs/EXT_shader_samples_identical.txt
diff --git a/docs/specs/EXT_shader_samples_id
On Wed, Nov 18, 2015 at 3:01 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Make it easier to determine where to add new extensions.
> Performed with the vim sort command.
Well, I think I'm obligated to review such a patch :)
> Signed-off-by: Nanley Chery
> ---
> src/mesa/main/extensions_ta
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/glsl/ir.cpp| 6 +-
src/glsl/ir.h | 2 ++
src/glsl/ir_clone.cpp | 1 +
src/glsl/ir_equals.cpp | 1 +
src/glsl/ir_hv_accept.cpp
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index cdd470b..1f71f66 100644
---
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/glsl/builtin_functions.cpp | 44 ++
1 file changed, 44 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index eb438d9..db01810 100644
--- a/src/glsl/builtin_
This patch series implements a new GL extension,
EXT_shader_samples_identical. This extension allows shaders to
determine when all of the samples in a particular texel are the same.
This takes advantage of the way compressed multisample surfaces are
stored on modern Intel and AMD hardware. This e
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/glsl/glcpp/glcpp-parse.y| 3 +++
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
3 files changed, 6 insertions(+)
diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcpp-parse.y
index 6aa7abe..8f
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/mtypes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 8685a89..87b6645 100644
--- a/src/mesa/main
From: Ian Romanick
This is the NIR analog to GLSL IR ir_samples_identical. However, the
NIR has an extra source. This is a fake sample index with a type
nir_tex_src_ms_index. This enables backends to (likely) share more code
with the existing nir_texop_txf_ms implementation.
Signed-off-by: Ia
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 11 +++
On Tue, Nov 17, 2015 at 9:54 PM, Jordan Justen
wrote:
> From: Francisco Jerez
>
> This calculates a rather conservative partitioning of the L3 cache
> based on the shaders currently bound to the pipeline and whether they
> use SLM, atomics, images or scratch space. The result is intended to
> be
On Wed, Nov 18, 2015 at 3:07 PM, Ilia Mirkin wrote:
> Why have the count as an entry in the enum? Can't you just do
> ARRAY_SIZE(_mesa_extension_table) ?
>
>
The compiler doesn't know the size of the array by just looking at the
header. To use ARRAY_SIZE, I'd have to modify the declaration of
_me
On Wed, Nov 18, 2015 at 3:09 PM, Ilia Mirkin wrote:
> On Wed, Nov 18, 2015 at 6:06 PM, Matt Turner wrote:
>> In most cases (when the negate is copy propagated and the MOV removed),
>> this is two instructions on Gen >= 8 and only two instructions on
>> earlier platforms -- and it doesn't use the
On Wed, Nov 18, 2015 at 6:06 PM, Matt Turner wrote:
> In most cases (when the negate is copy propagated and the MOV removed),
> this is two instructions on Gen >= 8 and only two instructions on
> earlier platforms -- and it doesn't use the flag register.
> ---
> Thanks Ilia!
>
> src/mesa/drivers/
Why have the count as an entry in the enum? Can't you just do
ARRAY_SIZE(_mesa_extension_table) ?
On Wed, Nov 18, 2015 at 6:01 PM, Nanley Chery wrote:
> From: Nanley Chery
>
> Enable developers to know if the table's alphabetical sorting
> is maintained or lost.
>
> Signed-off-by: Nanley Chery
In most cases (when the negate is copy propagated and the MOV removed),
this is two instructions on Gen >= 8 and only two instructions on
earlier platforms -- and it doesn't use the flag register.
---
Thanks Ilia!
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 52
1 f
From: Nanley Chery
Enable developers to know if the table's alphabetical sorting
is maintained or lost.
Signed-off-by: Nanley Chery
---
src/mesa/main/extensions.h | 1 +
src/mesa/main/tests/Makefile.am | 1 +
src/mesa/main/tests/mesa_extensions.cpp | 47 +
From: Nanley Chery
Make it easier to determine where to add new extensions.
Performed with the vim sort command.
Signed-off-by: Nanley Chery
---
src/mesa/main/extensions_table.h | 173 +--
1 file changed, 92 insertions(+), 81 deletions(-)
diff --git a/src/m
On Wed, Oct 14, 2015 at 5:11 AM, Michel Thierry
wrote:
> On 10/14/2015 8:19 AM, Daniel Vetter wrote:
>>
>> On Tue, Oct 13, 2015 at 02:51:36PM -0700, Kristian Høgsberg wrote:
>>>
>>> On Tue, Oct 13, 2015 at 7:55 AM, Michel Thierry
>>> wrote:
On 10/13/2015 3:13 PM, Emil Velikov wrote:
>>>
From: Nanley Chery
Suggested-by: Marek Olšák
Suggested-by: Emil Velikov
Signed-off-by: Nanley Chery
---
src/mesa/main/extensions_table.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index d12fd9f..87f
On Wed, Nov 18, 2015 at 12:33 PM, Emil Velikov
wrote:
> Hi Nanley,
>
> On 18 November 2015 at 20:29, Nanley Chery wrote:
> > From: Nanley Chery
> >
> > Help developers understand the table's organization.
> >
> > Suggested-by: Jason Ekstrand
> > Signed-off-by: Nanley Chery
> Can you bring bac
On Wed, Nov 18, 2015 at 1:54 PM, Sarah Sharp
wrote:
> On Tue, Nov 17, 2015 at 02:20:28PM -0800, Ben Widawsky wrote:
>> On Tue, Nov 17, 2015 at 11:40:53AM -0800, Sarah Sharp wrote:
>> > Add PCI IDs for the Intel Kabylake platforms. The IDs are taken
>> > directly from the Linux kernel patches, whi
On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote:
> ---
> This fails... for reasons I cannot determine. Can anyone spot what's wrong?
Ilia identified the problem in 10 seconds -- I need to NOT the pixel
mask. A set bit in the mask means the channel is enabled, and that's
the opposite of what gl
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_reg.h| 9 +
2 files changed, 12 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e5a286a..78c10e9 100644
-
---
This fails... for reasons I cannot determine. Can anyone spot what's wrong?
I'm okay with just committing the v1 of 2/2 and not blocking this feature on
this optimization.
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 43
1 file changed, 43 insertions(+)
diff -
The region fields are unioned with the immediate storage.
---
src/mesa/drivers/dri/i965/brw_reg.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 3da83b4..759bd93 100644
--- a/src/mesa/drivers/dri/i965/brw_re
From: Rob Clark
Note these are a bit uglier, due to avoidance of GNU C extensions. But
drivers which do not need to be built with compilers that don't support
the extension can wrap these macros with their own.
Signed-off-by: Rob Clark
---
src/glsl/nir/nir.h | 35
From: Rob Clark
Kind of a handy function. And I'll what it available outside of i965
for common nir-pass helpers.
Signed-off-by: Rob Clark
---
src/mesa/drivers/dri/i965/brw_context.c | 5 +++--
src/mesa/drivers/dri/i965/brw_nir.c | 4 +++-
src/mesa/drivers/dri/i965/brw_shader.cpp | 3
On Wed, Nov 18, 2015 at 4:54 PM, Sarah Sharp
wrote:
>> There's not really a consensus I guess, but most people do leave the version
>> information in the final commit message.
>
> I personally feel like that's leaving boredom doodles on a final
> architectural drawing. If people want to know the b
On Tue, Nov 17, 2015 at 02:20:28PM -0800, Ben Widawsky wrote:
> On Tue, Nov 17, 2015 at 11:40:53AM -0800, Sarah Sharp wrote:
> > Add PCI IDs for the Intel Kabylake platforms. The IDs are taken
> > directly from the Linux kernel patches, which are under review:
> >
> > http://lists.freedesktop.org
On Sat, Nov 7, 2015 at 9:04 PM, Kenneth Graunke wrote:
> This allows arbitrary non-constant indices on GS input arrays,
> both for the vertex index, and any array offsets beyond that.
>
> All indirects are handled via the pull model. We could potentially
> handle indirect addressing of pushed dat
On Wed, 2015-11-18 at 09:44 -0800, Ian Romanick wrote:
> From: Ian Romanick
>
> I think the intention was to mark the "this" parameter as const, but
> const goes on the other end to do that.
>
> In file included from glsl_symbol_table.cpp:26:0:
> ast.h:339:35: warning: type qualifiers ignored on
On Tue, Nov 10, 2015 at 12:48 AM, Kenneth Graunke wrote:
> I've been carrying around a patch to do this for the last few months,
> and it's been exceedingly useful for debugging GS and tessellation
> problems. I've caught lots of bugs by inspecting the interface
> expectations of two adjacent sta
From: Rob Clark
For gallium, at least, we'll need this to manage shader's lifetimes,
since in some cases both the driver and the state tracker will need
to hold on to a reference for variant managing.
Use nir_shader_mutable() before doing any IR opt/lowering/etc, to
ensure you are not modifying
From: Rob Clark
Reference counting (which is introduced in a subsequent patch) basically
should only be done on root nodes in the ralloc tree. In particular,
having multiple threads calling in to ralloc for the same graph will not
work.
Whereas reference-counting of shaders will be a useful thi
Hi Nanley,
On 18 November 2015 at 20:29, Nanley Chery wrote:
> From: Nanley Chery
>
> Help developers understand the table's organization.
>
> Suggested-by: Jason Ekstrand
> Signed-off-by: Nanley Chery
Can you bring back the comments that were in here, please. They might
have cause issues with
From: Nanley Chery
Help developers understand the table's organization.
Suggested-by: Jason Ekstrand
Signed-off-by: Nanley Chery
---
src/mesa/main/extensions_table.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensi
On Wed, Nov 18, 2015 at 2:06 PM, Ilia Mirkin wrote:
> On Wed, Nov 18, 2015 at 2:03 PM, Emil Velikov
> wrote:
>> Hi Ilia,
>>
>> On 11 November 2015 at 00:28, Ilia Mirkin wrote:
>>> On Tue, Nov 10, 2015 at 7:24 PM, Connor Abbott wrote:
On Tue, Nov 10, 2015 at 7:02 PM, Ilia Mirkin wrote:
>>
On Wed, Nov 18, 2015 at 11:50 AM, Jason Ekstrand wrote:
> Reviwed-by: Jason Ekstrand
idr: Please fix Jason's typo when you amend the patch.
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Reviwed-by: Jason Ekstrand
On Wed, Nov 18, 2015 at 9:44 AM, Ian Romanick wrote:
> From: Ian Romanick
>
> There are no shaders, so it doesn't even make sense to expose the
> extension.
>
> Signed-off-by: Ian Romanick
> Cc: Nanley Chery
> ---
> src/mesa/main/extensions_table.h | 2 +-
> 1 file
On 11/18/2015 10:05 AM, Kenneth Graunke wrote:
> On Wednesday, November 18, 2015 09:44:34 AM Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Apparently, this has been a bug since 2010 (c30f6e5d).
>>
>> Also use ARRAY_SIZE instead of open coding it.
>>
>> Signed-off-by: Ian Romanick
>> Cc: Kenneth
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