On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
> From: Ian Romanick <ian.d.roman...@intel.com>
>
> Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++++++---------
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index cdd470b..1f71f66 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -2579,6 +2579,13 @@ fs_visitor::nir_emit_texture(const fs_builder &bld,
> nir_tex_instr *instr)
> break;
> case nir_tex_src_ms_index:
> sample_index = retype(src, BRW_REGISTER_TYPE_UD);
> + if (devinfo->gen >= 7 &&
> + key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
> + mcs = emit_mcs_fetch(coordinate, instr->coord_components,
> sampler_reg);
> + } else {
> + mcs = fs_reg(0u);
> + }
> + mcs = retype(mcs, BRW_REGISTER_TYPE_UD);
No need for this line - emit_mcs_fetch already returns a UD register,
and fs_reg(0u) is already UD as well.
> break;
> case nir_tex_src_offset:
> tex_offset = retype(src, BRW_REGISTER_TYPE_D);
> @@ -2612,15 +2619,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld,
> nir_tex_instr *instr)
> }
> }
>
> - if (instr->op == nir_texop_txf_ms) {
> - if (devinfo->gen >= 7 &&
> - key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
> - mcs = emit_mcs_fetch(coordinate, instr->coord_components,
> sampler_reg);
> - } else {
> - mcs = fs_reg(0u);
> - }
> - }
> -
> for (unsigned i = 0; i < 3; i++) {
> if (instr->const_offset[i] != 0) {
> assert(offset_components == 0);
>
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