On 11/18/2015 04:57 PM, Jason Ekstrand wrote:
> On Wed, Nov 18, 2015 at 4:07 PM, Kenneth Graunke <kenn...@whitecape.org>
> wrote:
>> On Wednesday, November 18, 2015 03:46:53 PM Ian Romanick wrote:
>>> From: Ian Romanick <ian.d.roman...@intel.com>
>>>
>>> Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 +++++++---------
>>> 1 file changed, 7 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>>> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>>> index cdd470b..1f71f66 100644
>>> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>>> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>>> @@ -2579,6 +2579,13 @@ fs_visitor::nir_emit_texture(const fs_builder &bld,
>>> nir_tex_instr *instr)
>>> break;
>>> case nir_tex_src_ms_index:
>>> sample_index = retype(src, BRW_REGISTER_TYPE_UD);
>>> + if (devinfo->gen >= 7 &&
>>> + key_tex->compressed_multisample_layout_mask & (1 << sampler))
>>> {
>>> + mcs = emit_mcs_fetch(coordinate, instr->coord_components,
>>> sampler_reg);
>>> + } else {
>>> + mcs = fs_reg(0u);
>>> + }
>>> + mcs = retype(mcs, BRW_REGISTER_TYPE_UD);
>>
>> No need for this line - emit_mcs_fetch already returns a UD register,
>> and fs_reg(0u) is already UD as well.
>>
>>> break;
>>> case nir_tex_src_offset:
>>> tex_offset = retype(src, BRW_REGISTER_TYPE_D);
>>> @@ -2612,15 +2619,6 @@ fs_visitor::nir_emit_texture(const fs_builder &bld,
>>> nir_tex_instr *instr)
>>> }
>>> }
>>>
>>> - if (instr->op == nir_texop_txf_ms) {
>>> - if (devinfo->gen >= 7 &&
>>> - key_tex->compressed_multisample_layout_mask & (1 << sampler)) {
>>> - mcs = emit_mcs_fetch(coordinate, instr->coord_components,
>>> sampler_reg);
>>> - } else {
>>> - mcs = fs_reg(0u);
>>> - }
>>> - }
>
> Looking at the code in both back-ends, I think that if you made the
> vec4 do it like FS, you could just change the above condition to
> "instr->op == nir_texop_txf_ms || instr->op ==
> nir_texop_samples_identical" and you wouldn't need the extra dummy
> source. Am I missing something?
That is probably true. I started with vec4, and that's why things ended
up this way. I'll try the other way and report back.
>>> -
>>> for (unsigned i = 0; i < 3; i++) {
>>> if (instr->const_offset[i] != 0) {
>>> assert(offset_components == 0);
>>>
>>
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>>
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