Re: [U-Boot] sram overflowed

[Grant]

>> As an aside, I noticed omap3_beagle in board.cfg, so I tried 'make
>> omap3_beagle_config && make' but the resultant MLO and u-boot.img did
>> not work at all.  am335x_evm_config works fine, but I'm curious what
>> omap3_beagle_config is for if anyone knows.
>
> omap3_beagle is for the beagleboard and beagleboard xM boards.
> am335x_evm as you noticed is for the beaglebone (And am335x GP EVM and
> am335x EVM SK).

Got it, thank you Tom.

- Grant
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[U-Boot] phy device driver issues

[Aaron Williams]

Hi,

I haven't been following the list closely for a while but I have run 
into some issues when writing some drivers for some non-standard PHY 
devices.


One PHY I am supporting is the Cortina CS4321 device. This PHY can be 
configured in various modes such as XAUI, RXAUI, SGMII, and several FC 
implementations. My problem is that this PHY does not follow any of the 
standards as far as register usage and it requires a significant amount 
of configuration to make it work, including downloading firmware into 
the device.


One problem I have is that phy_connect ends up calling the probe 
function before phy_device has had the dev field connected. This is a 
problem because the easiest way for me to tell is by looking at 
information associated with the Ethernet device which we pull from the 
device tree. I reordered the code in phy_connect so it hooks up the 
Ethernet device to phy_device before calling reset, though ideally that 
information should be present when probe is called.


 In my driver, I created a call-back function in order to determine 
what mode the PHY should operate in, but in order for the callback 
function to know it needs to know what Ethernet device it is connected to.


Both probe and reset are called before this information is available.

Another issue I have is that since the Cortina CS4321 uses non-standard 
registers, get_phy_id() does not work. In our tree I just declared the 
function as weak but I don't think this is a good long-term solution.


Ideally device tree support should be integrated more deeply into U-Boot 
so each PHY device would have its node offset stored like in the Linux 
driver.


-Aaron

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Re: [U-Boot] [PATCH] arm: trats: Power down core 1

[Minkyu Kang]

Dear Piotr Wilczek,

On 9 October 2012 15:45, Piotr Wilczek  wrote:
> This patch turns power down for unused core 1
>
> Signed-off-by: Piotr Wilczek 
> Signed-off-by: Kyungmin Park 
> CC: Minkyu Kang 
> ---
>  board/samsung/trats/trats.c |4 
>  1 files changed, 4 insertions(+), 0 deletions(-)
>

applied to u-boot-samsung.

Thanks.
Minkyu Kang.
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Re: [U-Boot] [PATCH v2 3/3] mx35: Clean up lowlevel_init

[Stefano Babic]

On 20/08/2012 21:54, Benoît Thébaudeau wrote:
> Clean up mx35 lowlevel_init:
>  - Indent with tabs.
>  - Fix comments.
>  - Use defined values instead of literal constants.
>  - Use defined macros instead of duplicating code.
>  - Use macro parameters with default values instead of #define'd configs.
> 
> Signed-off-by: Benoît Thébaudeau 
> Cc: Stefano Babic 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v2] mx35: Fix eSDHC clocks

[Stefano Babic]

On 27/09/2012 22:26, Benoît Thébaudeau wrote:
> Each eSDHC instance has a dedicated clock.
> 
> gd->sdhc_clk must also be set accordingly. This is good for the case only a
> single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). 
> A
> future patch will fix the multi-instance use case (initialization made 
> directly
> with fsl_esdhc_initialize()).
> 
> Signed-off-by: Benoît Thébaudeau 
> Cc: Stefano Babic 
> Cc: Eric Bénard 
> Cc: Otavio Salvador 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH v2] mxc: Fix SDHC multi-instance clock

[Stefano Babic]

On 01/10/2012 20:36, Benoît Thébaudeau wrote:
> On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
> suitable for the multi-instance use case (initialization made directly with
> fsl_esdhc_initialize()).
> 
> This patch fixes this issue by adding a configuration field for the SDHC input
> clock frequency.
> 
> Signed-off-by: Benoît Thébaudeau 
> Cc: Stefano Babic 
> Cc: Eric Bénard 
> Cc: Otavio Salvador 
> Cc: Fabio Estevam 
> Cc: Jason Liu 
> Cc: Matt Sealey 
> Cc: Andy Fleming 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic


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[U-Boot] [PATCH V2] i.MX: iomux: input pad array can be const

[Stefano Babic]

From: Eric Nelson 

Signed-off-by: Eric Nelson 
Signed-off-by: Stefano Babic 
---

Changes since V1:
- stack variable must be also declared const to avoid
gcc warnings (Stefano Babic)

 arch/arm/imx-common/iomux-v3.c |5 +++--
 arch/arm/include/asm/imx-common/iomux-v3.h |3 ++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index da093fb..08fad78 100644
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -54,9 +54,10 @@ int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
return 0;
 }
 
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count)
+int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+unsigned count)
 {
-   iomux_v3_cfg_t *p = pad_list;
+   iomux_v3_cfg_t const *p = pad_list;
int i;
int ret;
 
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h 
b/arch/arm/include/asm/imx-common/iomux-v3.h
index 4558f4f..c34bb76 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -98,6 +98,7 @@ typedef u64 iomux_v3_cfg_t;
 #define MUX_CONFIG_SION(0x1 << 4)
 
 int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count);
+int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+unsigned count);
 
 #endif /* __MACH_IOMUX_V3_H__*/
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v3 0/2] Exynos4: add software SPI support on Universal C210 board

[Minkyu Kang]

Dear Piotr Wilczek,

On 24 September 2012 20:56, Piotr Wilczek  wrote:
> This patchset add software SPI support on Samsung Universal C210 board.
> In SPI software driver #ifdef CONFIG_SYS_IMMR in spi_init function is added.
>
> Changes in v2:
> - removed space between # and include;
> - changed return in spi_cs_is_valid function;
> Changes in v3:
> - Patch is split in two patches:
>   - the first modifies software SPI driver;
>   - the second patch add support for SPI on Universal C210 board
>
> Piotr Wilczek (2):
>   drivers: spi: modify soft spi driver
>   exynos4: universal_C210: use software SPI
>
>  board/samsung/universal_c210/universal.c |   34 
> ++
>  drivers/spi/soft_spi.c   |3 ++
>  include/configs/s5pc210_universal.h  |   19 
>  3 files changed, 56 insertions(+), 0 deletions(-)
>

applied to u-boot-samsung.

Thanks.
Minkyu Kang.
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Re: [U-Boot] [PATCH] mx25: Clean up imx-regs.h

[Stefano Babic]

On 08/10/2012 20:34, Benoît Thébaudeau wrote:
> Clean up i.MX25 imx-regs.h:
>  - Update mx31 imx-regs.h filename.
>  - Test for __KERNEL_STRICT_NAMES just in case.
>  - Define internal RAM size.
> 
> Signed-off-by: Benoît Thébaudeau 
> Cc: Stefano Babic 
> ---
Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic




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Re: [U-Boot] [PATCH] mx25: Clean up imx-regs.h

[Stefano Babic]

On 08/10/2012 20:34, Benoît Thébaudeau wrote:
> Clean up i.MX25 imx-regs.h:
>  - Update mx31 imx-regs.h filename.
>  - Test for __KERNEL_STRICT_NAMES just in case.
>  - Define internal RAM size.
> 
> Signed-off-by: Benoît Thébaudeau 
> Cc: Stefano Babic 
> ---


Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic




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Re: [U-Boot] [PATCH] mx6qsabreauto: Change mmcroot so it works out of box

[Stefano Babic]

On 02/10/2012 21:22, Otavio Salvador wrote:
> The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
> move this to the board configuration file.
> 
> Signed-off-by: Otavio Salvador 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic



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Re: [U-Boot] [PATCH] mx6qsabreauto: Pass the board revision to the kernel

[Stefano Babic]

On 02/10/2012 23:20, Fabio Estevam wrote:
> The kernel from Freescale expects that the bootloader passes the board 
> revision.
> 
> Read the board revision and pass it via get_board_rev().
> 
> Without passing the board revision the kernel does not operate properly as the
> initialization of peripherals are different in revA versus revB boards.
> 
> Signed-off-by: Fabio Estevam 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 2/2] i.MX: declare iomux_v3_cfg_t arrays as const

[Stefano Babic]

On 03/10/2012 19:26, Eric Nelson wrote:
> Signed-off-by: Eric Nelson 
> ---
>  board/freescale/mx6qarm2/mx6qarm2.c   |8 
>  board/freescale/mx6qsabreauto/mx6qsabreauto.c |6 +++---
>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   18 +-
>  board/freescale/mx6qsabresd/mx6qsabresd.c |6 +++---
>  board/genesi/mx51_efikamx/efikamx.c   |   16 
>  5 files changed, 27 insertions(+), 27 deletions(-)
> 

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 1/2] i.MX video: struct fb_videomode can be const

[Stefano Babic]

On 03/10/2012 19:27, Eric Nelson wrote:
> Signed-off-by: Eric Nelson 
> ---
>  drivers/video/mxc_ipuv3_fb.c |8 +---
>  include/ipu_pixfmt.h |4 +++-
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 


Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic



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Re: [U-Boot] [PATCH 2/2] i.MX: ipufb: add const to fb_videomode declarations

[Stefano Babic]

On 03/10/2012 19:27, Eric Nelson wrote:
> Signed-off-by: Eric Nelson 
> ---
>  board/freescale/mx51evk/mx51evk.c   |2 +-
>  board/freescale/mx53loco/mx53loco.c |2 +-
>  board/ttcontrol/vision2/vision2.c   |2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic





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Re: [U-Boot] [PATCH 0/5] EXYNOS4: Enable I2C support

[Minkyu Kang]

Dear Piotr Wilczek,

On 24 September 2012 15:49, Piotr Wilczek  wrote:
> This patchset enables hardware I2C support for Exynos 4.
> The s3c24x0 I2C driver is modified to use for for both Exynos 4 and Exynos 5.
> Pinmux setting is add for Exynos 4.
> PMIC MAX8997 driver is modified to support multi channel hardware I2C.
>
> Piotr Wilczek (5):
>   EXYNOS: CLK: Add i2c clock
>   EXYNOS: Add Exynos4 I2C spacing
>   EXYNOS: PINMUX: Add pinmux support for i2c
>   DRIVERS: I2C: Modify I2C driver for EXYNOS4
>   DRIVERS: MISC: PMIC: Modify pmic driver to support multibus I2C
>
>  arch/arm/cpu/armv7/exynos/clock.c  |7 
>  arch/arm/cpu/armv7/exynos/pinmux.c |   51 
> 
>  arch/arm/include/asm/arch-exynos/cpu.h |2 +
>  drivers/i2c/s3c24x0_i2c.c  |   19 +++
>  drivers/misc/pmic_max8997.c|7 +++-
>  5 files changed, 77 insertions(+), 9 deletions(-)
>

Codes look good to me.
But I couldn't find usage of hardware at your patch.
So I couldn't check what patch is working correctly.
Please update the patch.

Thanks.
Minkyu Kang.
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Re: [U-Boot] [PATCH 1/3] i.MX6: set drive strength for parallel RGB pads

[Stefano Babic]

On 03/10/2012 19:28, Eric Nelson wrote:
> Default drive strength is disabled and won't function.
> 
> Signed-off-by: Eric Nelson 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 2/3] i.MX6: add HDMI transmitter register declarations from kernel WIP.

[Stefano Babic]

On 03/10/2012 19:28, Eric Nelson wrote:
> Original source from Pengutronix HDMI driver work:
> 
>   
> http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0
> 
> Signed-off-by: Eric Nelson 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic





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Re: [U-Boot] [PATCH 3/3] i.MX6: mx6qsabrelite: Add splash screen support

[Stefano Babic]

On 03/10/2012 19:28, Eric Nelson wrote:
> Adds support for HDMI, two LVDS panels and one RGB panel to
> the SABRE-Lite board.
> 
> Displays supported:
>  HDMI - 1024 x 768 for maximum compatibility
>  Hannstar-XGA   - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
>  wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
>  wvga-rgb   - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
> 
> Since the ipuv3_fb display driver currently supports only a single display,
> this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
> or the I2C touch controller of the LVDS and RGB displays in the priority
> listed above.
> 
> Setting 'panel' environment variable to one of the names above will
> override auto-detection.
> 
> Signed-off-by: Eric Nelson 
> ---

Applied to u-boot-imx, next branch, thanks.

Best regards,
Stefano Babic




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[U-Boot] please pull u-boot-samsung master

[Minkyu Kang]

Dear Albert,

The following changes since commit 28e5ac2d974547bde0c72aa0c1d66fd22c6ef3ad:

  arm: armv7: temporarily set -mno-unaligned-access (2012-10-05 21:24:22 +0200)

are available in the git repository at:

  git://git.denx.de/u-boot-samsung master

for you to fetch changes up to 9b5dba537473578153961ee96ed23e37e1fde3f7:

  exynos4: universal_C210: use software SPI (2012-10-10 20:37:39 +0900)


Chander Kashyap (1):
  Exynos5250: Enable PXE Support

Piotr Wilczek (9):
  arm:exynos4:trats: Correct SDRAM configuration for trats
  arm:exynos4:trats: Fix SDRAM size
  arm:exynos4:pinmux: Modify the gpio function for mmc
  arm:exynos4:trats: Use pinmux for mmc configuration
  arm:exynos4:universal: Use pinmux for mmc configuration
  arm:exynos4:universal: Eliminated low level init
  arm: trats: Power down core 1
  drivers: spi: modify soft spi driver
  exynos4: universal_C210: use software SPI

Łukasz Majewski (1):
  gpio:fix: Proper handling of GPIO subsystem parts at Samsung devices

 arch/arm/cpu/armv7/exynos/pinmux.c   |   58 
 arch/arm/include/asm/arch-exynos/gpio.h  |   19 ++
 arch/arm/include/asm/arch-exynos/periph.h|1 +
 arch/arm/include/asm/arch-s5pc1xx/gpio.h |7 +-
 board/samsung/trats/trats.c  |   80 ++
 board/samsung/universal_c210/Makefile|1 -
 board/samsung/universal_c210/lowlevel_init.S |  395 --
 board/samsung/universal_c210/universal.c |  116 
 drivers/gpio/s5p_gpio.c  |6 +-
 drivers/spi/soft_spi.c   |3 +
 include/configs/s5pc210_universal.h  |   21 ++
 include/configs/smdk5250.h   |6 +
 include/configs/trats.h  |   17 +-
 13 files changed, 209 insertions(+), 521 deletions(-)
 delete mode 100644 board/samsung/universal_c210/lowlevel_init.S
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[U-Boot] [NOTE] Mailing List / git / FTP / Web Server Outage

[Wolfgang Denk]

Hello all,

we have a dying disk drive on our main web server, and our hoster
(Strato) claims they have to take down the machine and replace _all_
disks in the RAID array, so we have to reinstall from scratch [*].

This means the Mailing List / git / FTP / Web Server will be down for
some time, starting any time soon now.

Keep your fingers crossed the restore goes fast and smooth.



[*] No, I cannot understand either why this is handled this way.
But there is no quick way to help it.  Sorry for the inconvenience.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 4/6] console & omap-common/spl: Enable use of eserial

[Andrew Bradford]

Dear Marek Vasut,

On Thu, 27 Sep 2012 18:34:18 +0200
Marek Vasut  wrote:

> Dear Andrew Bradford,
> 
> > Enable use of eserial devices for common and omap-common/spl.
> > 
> > This probably isn't the right way to do this as the changes aren't
> > needed for 'common' configurations, just for one case.
> > 
> > Signed-off-by: Andrew Bradford 
> > ---
> >  arch/arm/cpu/armv7/omap-common/spl.c |7 ++-
> >  common/console.c |   24
> >  include/common.h |
> > 5 + 3 files changed, 31 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
> > b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644
> > --- a/arch/arm/cpu/armv7/omap-common/spl.c
> > +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> > @@ -210,7 +210,12 @@ void preloader_console_init(void)
> > gd->flags |= GD_FLG_RELOC;
> > gd->baudrate = CONFIG_BAUDRATE;
> > 
> > -   serial_init();  /* serial communications
> > setup */
> > +   /* serial communications setup */
> > +#ifdef CONFIG_SERIAL_MULTI
> > +   ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();
> 
> Uh, if you implement default_serial_console properly(), you won't
> need this. Actually, I'm in the process of rolling out V2 of my
> serial patchset, which will make your life much more easier. Can you
> rebase the patchset on my series? I'll poke you about it.

I see that your serial patches have made it into u-boot/next, should I
rebase this patch set with the requested changes on top of u-boot/next
and resubmit?  Sorry, I'm not entirely clear on the role /next plays.

Or is it recommended to rebase my changes on top of the tree I worked
with before but with your serial patches applied?  Or some other method?

Thanks,
Andrew
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[U-Boot] [PATCH 3/3] mx25pdk: Add FEC support

[Fabio Estevam]

From: Fabio Estevam 

mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the PMIC via I2C.

Make FEC ethernet functional.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx25pdk/mx25pdk.c |   64 +
 include/configs/mx25pdk.h |   15 +
 2 files changed, 79 insertions(+)

diff --git a/board/freescale/mx25pdk/mx25pdk.c 
b/board/freescale/mx25pdk/mx25pdk.c
index e850b3e..e1fa2be 100644
--- a/board/freescale/mx25pdk/mx25pdk.c
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@ -25,6 +25,13 @@
 #include 
 #include 
 #include 
+#include 
+
+#define FEC_RESET_BIMX_GPIO_NR(2, 3)
+#define FEC_ENABLE_B   IMX_GPIO_NR(4, 8)
+#define CARD_DETECTIMX_GPIO_NR(2, 1)
+#define PMIC_I2C_ADDR  0x54
+#define REG_PHY_3V30x02
 
 #define CARD_DETECTIMX_GPIO_NR(2, 1)
 
@@ -36,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = {
 };
 #endif
 
+static void mx25pdk_fec_init(void)
+{
+   struct iomuxc_mux_ctl *muxctl;
+   struct iomuxc_pad_ctl *padctl;
+   u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+   u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+
+   /* FEC pin init is generic */
+   mx25_fec_init_pins();
+
+   muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+   padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+   /*
+* Set up FEC_RESET_B and FEC_ENABLE_B
+*
+* FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12
+* FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17
+*/
+   writel(gpio_mux_mode, &muxctl->pad_d12);
+   writel(gpio_mux_mode, &muxctl->pad_a17);
+
+   writel(0x0, &padctl->pad_d12);
+   writel(0x0, &padctl->pad_a17);
+
+   /* Assert RESET and ENABLE low */
+   gpio_direction_output(FEC_RESET_B, 0);
+   gpio_direction_output(FEC_ENABLE_B, 0);
+
+   udelay(10);
+
+   /* Deassert RESET and ENABLE */
+   gpio_set_value(FEC_RESET_B, 1);
+   gpio_set_value(FEC_ENABLE_B, 1);
+
+   /* Setup I2C pins so that PMIC can turn on PHY supply */
+   writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk);
+   writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat);
+   writel(0x1E8, &padctl->pad_i2c1_clk);
+   writel(0x1E8, &padctl->pad_i2c1_dat);
+}
+
 int dram_init(void)
 {
/* dram_init must store complete ramsize in gd->ram_size */
@@ -59,6 +107,22 @@ int board_init(void)
return 0;
 }
 
+int board_late_init(void)
+{
+   /* Turn on PHY supply via I2C command to PMIC */
+   u8 reg[4];
+   reg[0] = 0x09;
+
+   mx25pdk_fec_init();
+
+   if (i2c_write(PMIC_I2C_ADDR, REG_PHY_3V3, 1, reg, 1)) {
+   printf("I2C write to PMIC failed\n");
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 #ifdef CONFIG_FSL_ESDHC
 int board_mmc_getcd(struct mmc *mmc)
 {
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 1770521..9b010c2 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -41,6 +41,7 @@
 #define PHYS_SDRAM_1_SIZE  (64 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 
- \
@@ -100,6 +101,20 @@
 
 #define CONFIG_DOS_PARTITION
 
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_BASEIMX_I2C_BASE
+#define CONFIG_SYS_I2C_SPEED   10
+
+/* Ethernet Configs */
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
 #define CONFIG_BOOTDELAY   3
 
 #define CONFIG_LOADADDR0x8100  /* loadaddr env var */
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v2 09/10] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE

[Graeme Russ]

Hi Marek,

On Thu, Oct 11, 2012 at 2:45 PM, Marek Vasut  wrote:
> Dear Graeme Russ,
>
>> Hi Simon,
>>
>> On Thu, Oct 11, 2012 at 10:13 AM, Simon Glass  wrote:
>> > Coreboot boards have an LPC TPM connected, so enable this. We also need
>> > to skip the reset code.
>> >
>> > Signed-off-by: Simon Glass 
>> > ---
>> >
>> >  include/configs/coreboot.h |6 +-
>> >  1 files changed, 5 insertions(+), 1 deletions(-)
>> >
>> > diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
>> > index 2c65d74..75db176 100644
>> > --- a/include/configs/coreboot.h
>> > +++ b/include/configs/coreboot.h
>> > @@ -37,7 +37,7 @@
>> >
>> >  #define CONFIG_SYS_COREBOOT
>> >  #undef CONFIG_SHOW_BOOT_PROGRESS
>> >  #define CONFIG_LAST_STAGE_INIT
>> >
>> > -
>> > +#define CONFIG_NO_RESET_CODE
>> >
>> >  /*--
>> >  -
>> >
>> >   * Watchdog Configuration
>> >
>> > @@ -45,6 +45,10 @@
>> >
>> >  #undef CONFIG_WATCHDOG
>> >  #undef CONFIG_HW_WATCHDOG
>> >
>> > +/* Generic TPM interfaced through LPC bus */
>> > +#define CONFIG_GENERIC_LPC_TPM
>> > +#define CONFIG_TPM_TIS_BASE_ADDRESS0xfed4
>> > +
>> >
>> >  /*--
>> >  -
>> >
>> >   * Real Time Clock Configuration
>> >   */
>> >
>> > --
>> > 1.7.7.3
>>
>> Acked-by: Graeme Russ 
>
> Well, spliting it into two patches -- since each hunk does something else --
> won't hurt. But I think it doesn't matter.

It's board level config - I see no reason to atomise it. If it was
global / arch / SoC / CPU level then I would to help maintain
bisectability.

Regards,

Graeme
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[U-Boot] [PATCH 1/3] mx25pdk: Include CONFIG_MX25

[Fabio Estevam]

From: Fabio Estevam 

It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC
differences based on the this config option.

Signed-off-by: Fabio Estevam 
---
 include/configs/mx25pdk.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 96c143e..2087502 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -17,6 +17,7 @@
 
 /* High Level Configuration Options */
 
+#define CONFIG_MX25
 #define CONFIG_SYS_HZ  1000
 #define CONFIG_SYS_TEXT_BASE   0x8120
 
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v2 09/10] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:13 AM, Simon Glass  wrote:
> Coreboot boards have an LPC TPM connected, so enable this. We also need
> to skip the reset code.
>
> Signed-off-by: Simon Glass 
> ---
>
>  include/configs/coreboot.h |6 +-
>  1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
> index 2c65d74..75db176 100644
> --- a/include/configs/coreboot.h
> +++ b/include/configs/coreboot.h
> @@ -37,7 +37,7 @@
>  #define CONFIG_SYS_COREBOOT
>  #undef CONFIG_SHOW_BOOT_PROGRESS
>  #define CONFIG_LAST_STAGE_INIT
> -
> +#define CONFIG_NO_RESET_CODE
>
>  /*---
>   * Watchdog Configuration
> @@ -45,6 +45,10 @@
>  #undef CONFIG_WATCHDOG
>  #undef CONFIG_HW_WATCHDOG
>
> +/* Generic TPM interfaced through LPC bus */
> +#define CONFIG_GENERIC_LPC_TPM
> +#define CONFIG_TPM_TIS_BASE_ADDRESS0xfed4
> +
>  /*---
>   * Real Time Clock Configuration
>   */
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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[U-Boot] [PATCH] disk: initialize name/part fields when returning a whole disk

[Stephen Warren]

From: Stephen Warren 

When get_device_and_partition() finds a disk without a partition table,
under some conditions, it "returns" a disk_partition_t that describes
the entire raw disk. Make sure to initialize all fields in the partition
descriptor in that case.

The value chosen for name is just some arbitrary descriptive string.

The value chosen for info matches the check at the end of
get_device_and_partition(). However, it's probably not that important;
it's not obvious that the value is really used.

Reported-by: Benoît Thébaudeau 
Signed-off-by: Stephen Warren 
---
Tom, this is technically a bug, so putting in the release might make
sense, although I doubt it has much practical impact, so deferring it
into u-boot/next would probably be just as good.

 disk/part.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/disk/part.c b/disk/part.c
index a0c77dd..8ba3cde 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -561,6 +561,8 @@ int get_device_and_partition(const char *ifname, const char 
*dev_part_str,
info->size = (*dev_desc)->lba;
info->blksz = (*dev_desc)->blksz;
info->bootable = 0;
+   strcpy((char *)info->type, BOOT_PART_TYPE);
+   strcpy((char *)info->name, "Whole Disk");
 #ifdef CONFIG_PARTITION_UUIDS
info->uuid[0] = 0;
 #endif
-- 
1.7.0.4

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Re: [U-Boot] I2C on mx25

[Benoît Thébaudeau]

Hi Fabio,

On Thursday, October 11, 2012 12:05:29 AM, Fabio Estevam wrote:
> On Wed, Oct 10, 2012 at 6:50 PM, Fabio Estevam 
> wrote:
> > Hi,
> >
> > Has anyone managed to get i2c to work on mx25?
> >
> > I am using the latest u-boot.imx tree and I noticed that
> > "i2c_write"
> > always returns error.
> 
> Ok, i2c_write does work now. This recent commit fixed it:
> 
> commit b1e9e9ef71e6a33c3cc675a18be48929d4a8479f
> Author: Matthias Weisser 
> Date:   Mon Sep 24 02:46:53 2012 +
> 
> imx: Use MXC_I2C_CLK in imx i2c driver
> 
> i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
> MXC_I2C_CLK on all imx systems using i2c.
> 
> Signed-off-by: Matthias Weisser 
> Acked-by: Stefano Babic 
> 
> This allows me to write to the PMIC and I can turn on the power
> supply
> for the FEC.

Or for the Eth PHY connected to the FEC?

> Still not able to get FEC to work on mx25pdk, but it seems to be
> another problem now.

FYI, the FEC works fine for me in U-Boot for another i.MX25 board using a Micrel
PHY. That required some patches for 2012.07, but they are now in u-boot/master.
There are also some i.MX25 patches in u-boot-imx/next that might help, but I
don't think that they were needed to make FEC work. However, I haven't updated
yet to 2012.10-rc3, so there might be a regression somewhere, or an issue with
the PHY.

Best regards,
Benoît
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Re: [U-Boot] [PATCH v2 02/10] x86: Add initial memory barrier macros

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> These are available on other architectures, so add them on x86.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/include/asm/io.h |8 
>  1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
> index 9b757d4..b12bdd8 100644
> --- a/arch/x86/include/asm/io.h
> +++ b/arch/x86/include/asm/io.h
> @@ -234,4 +234,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
> return (phys_addr_t)(vaddr);
>  }
>
> +/*
> + * TODO: The kernel offers some more advanced versions of barriers, it might
> + * have some advantages to use them instead of the simple one here.
> + */
> +#define dmb()  __asm__ __volatile__ ("" : : : "memory")
> +#define __iormb()  dmb()
> +#define __iowmb()  dmb()
> +
>  #endif
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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[U-Boot] [PATCH 2/3] mx25pdk: Add esdhc support

[Fabio Estevam]

From: Fabio Estevam 

mx25pdk has a SD/MMC slot connected to esdhc1.

Add support for it and allow the environment variables to be saved into SD/MMC.

Signed-off-by: Fabio Estevam 
---
 board/freescale/mx25pdk/mx25pdk.c |   51 +
 include/configs/mx25pdk.h |   16 +++-
 2 files changed, 66 insertions(+), 1 deletion(-)

diff --git a/board/freescale/mx25pdk/mx25pdk.c 
b/board/freescale/mx25pdk/mx25pdk.c
index 4a8352f..e850b3e 100644
--- a/board/freescale/mx25pdk/mx25pdk.c
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@ -19,12 +19,23 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+
+#define CARD_DETECTIMX_GPIO_NR(2, 1)
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+   {IMX_MMC_SDHC1_BASE},
+};
+#endif
+
 int dram_init(void)
 {
/* dram_init must store complete ramsize in gd->ram_size */
@@ -48,6 +59,46 @@ int board_init(void)
return 0;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_getcd(struct mmc *mmc)
+{
+   struct iomuxc_mux_ctl *muxctl;
+   struct iomuxc_pad_ctl *padctl;
+   u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
+
+   /*
+* Set up the Card Detect pin.
+*
+* SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15
+*
+*/
+   muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+   padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+   writel(gpio_mux_mode, &muxctl->pad_a15);
+   writel(0x0, &padctl->pad_a15);
+
+   gpio_direction_input(CARD_DETECT);
+   return !gpio_get_value(CARD_DETECT);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+   struct iomuxc_mux_ctl *muxctl;
+   u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+
+   muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_cmd);
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_clk);
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_data0);
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_data1);
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_data2);
+   writel(sdhc1_mux_mode, &muxctl->pad_sd1_data3);
+
+   return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+}
+#endif
+
 int checkboard(void)
 {
puts("Board: MX25PDK\n");
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 2087502..1770521 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -20,6 +20,7 @@
 #define CONFIG_MX25
 #define CONFIG_SYS_HZ  1000
 #define CONFIG_SYS_TEXT_BASE   0x8120
+#define CONFIG_MXC_GPIO
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
@@ -58,9 +59,10 @@
 /* No NOR flash present */
 #define CONFIG_ENV_OFFSET  (6 * 64 * 1024)
 #define CONFIG_ENV_SIZE(8 * 1024)
-#define CONFIG_ENV_IS_NOWHERE
 
 #define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 /* U-Boot general configuration */
 #define CONFIG_SYS_PROMPT  "MX25PDK U-Boot > "
@@ -78,6 +80,9 @@
 /* U-Boot commands */
 #include 
 #define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
 
 /* Ethernet */
 #define CONFIG_FEC_MXC
@@ -86,6 +91,15 @@
 #define CONFIG_CMD_NET
 #define CONFIG_ENV_OVERWRITE
 
+/* ESDHC driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR  0
+#define CONFIG_SYS_FSL_ESDHC_NUM   1
+
+#define CONFIG_DOS_PARTITION
+
 #define CONFIG_BOOTDELAY   3
 
 #define CONFIG_LOADADDR0x8100  /* loadaddr env var */
-- 
1.7.9.5

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Re: [U-Boot] U-Boot git usage model

[Scott Wood]

On 10/10/2012 10:55:33 AM, Stephen Warren wrote:

On 10/09/2012 06:20 PM, Scott Wood wrote:
> I don't use gitk much, but wouldn't it just show the mergeback as
> another edge in the graph (plus the merge commit itself of  
course)?  It

> doesn't seem like a big deal.

One big problem is the ability to look back and see easily what's been
merged and what work has been committed since then.

If I run "git log u-boot-xxx/master", and look backwards through the
list of commits, looking for those committed by the owner of  
u-boot-xxx,

and stop when I see a commit by someone else, I'll end up stopping at
the merge commit where u-boot/master was merged back down.


Very often that ends up being a fast forward.

Plus, what about commits that were merged from a tree futher downstream?

If there commits to u-boot-xxx/master between the point where  
u-boot/master

merged u-boot-xxx/master and where u-boot-xxx/master merged
u-boot/master back down, then they'll be hidden before that merge  
point.


Now, I probably could just do git log  
u-boot/master..u-boot-xxx/master,
but that's a but more complicated (and I can never remember which  
order

to give the two branches).


I have a hard time remembering the order too (it seems backwards from  
what's intuitive), but it's usually obvious when I get the order  
wrong.  And it's faster and more robust than scanning for a commit that  
looks like it came from somewhere else.



>> Rebase is when you take some existing commits
>> based on one commit and apply them to a different baseline commit
>> instead. If you're creating a new branch to take commits for a new
>> release, you're simply not applying the commits for release N+1  
until

>> there's a branch ready to take them.
>
> There is a branch ready to take them -- the custodian tree.  Why  
wait

> until there's an upstream tree ready to pull?

Well, the two possibilities are:

a) Send pull request
b) Wait for pull request to be merged
c) Here, or later, merge back down u-boot/master. Note this cannot
happen before (b) has completed, or the merge of this branch upstream
may pick up extra commits that weren't in the pull request.
d) Continue merging commits to the same branch without reset/...

or:

a) Send pull request
b) Wait for pull request to be merged
c) Reset u-boot-xxx/master to u-boot/master or some rc or ...
d) Continue merging commits

In either case, one must always wait for the pull request send in (b)  
to
be completely merged so that when the pull request is merged, it  
doesn't
pick up commits to the branch that were added after the pull request  
was

sent. So, there isn't a tree ready to take new patches until a pull
request has been completely processed.


Ideally once a pull request happens the pull happens quickly.  If that  
doesn't happen, you could reply to the pull request asking that it be  
ignored in favor of a new pull request, or create a new temporary  
branch.  IMHO pull requests ought to request a pull of a specific SHA1  
along with the branch name (it'd be nice if the command to pull could  
verify that the SHA1 is in the history of the branch name, and include  
the branch name in the commit message, but merge based on the SHA1).


>> >> >> (in practice, downstream branches typically end up with  
something

>> >> >> like for-3.5 based on v3.4-rcN, for-3.6 based on v3.5-rcN,
>> >> >> for-3.7 based on v3.6-rcN, some running in parallel  
containing
>> >> >> either important bugfixes for the release or new development  
as
>> >> >> determined by the current state of the various releases in  
the

>> >> >> mainline tree).
>> >
>> > I thought you said your way was less work? :-)
>>
>> And I believe it is; no rebasing required.
>> The difference probably isn't
>> that big though I admit. Still, creating a fresh branch from  
scratch for
>> each release one time and only then applying patches for that  
release
>> seems a lot simpler that constantly rebasing stuff all over the  
place.

>
> We've already dropped the rebasing.

The whole reason I started this thread was because rebasing was still
being used.


Rebasing is no longer supposed to be part of the standard workflow, as  
you portrayed it.  I'm not sure why the rebasing happened in this  
particular instance.



> I'd rather do merges than constantly create new branches.

>> >> but with the Linux model, you simply:
>> >>
>> >> a) Send pull request.
>> >>
>> >> Admittedly the recipient then might need to resolve some merge
>> >> conflicts. However, hopefully people have been planning for  
these and

>> >> have avoided them.
>> >
>> > How do you plan for them and avoid them, and how is that less  
work that

>> > what we do now?
>>
>> People have to be aware what is going on.
>>
>> If you're submitting a bunch of patches which depend on  
each-other, the

>> submitter had better call that out when sending the patch series.
>
> Sometimes it's not obvious in advance.  Not all conflicts (whether  
they

> be merge conflicts, bu

Re: [U-Boot] [PATCH] ARM926: Add mb to the cache invalidate/flush

[Albert ARIBAUD]

Hi Marek,

On Wed, 10 Oct 2012 00:44:29 +0200, Marek Vasut  wrote:

> Add memory barrier to cache invalidate and flush calls.

Memory barrier...

"You keep using that word. I do not think it means what you think it
means." :)

A memory barrier's effect is only that all of the volatile accesses
placed before it in the source code finish when the barrier executes,
and that none of the volatile accesses placed after it in the source
code starts before the barrier has executed.

Non-volatile accesses are not guaranteed to stay on one side of the
barrier, and the barrier itself is not guaranteed to stay put during
optimizations.

If what you intended was to ensure that e.g. all writes be finished
when a flush occurs, or that no read happens before an invalide has
executed, then adding memory clobbers is not an adequate solution.

If you were aiming for something else entirely, please don't hesitate
to develop a description of the problem you wish to solve.

Amicalement,
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Re: [U-Boot] [PATCH 4/6] console & omap-common/spl: Enable use of eserial

[Tom Rini]

On Wed, Oct 10, 2012 at 09:10:28AM -0400, Andrew Bradford wrote:
> Dear Marek Vasut,
> 
> On Thu, 27 Sep 2012 18:34:18 +0200
> Marek Vasut  wrote:
> 
> > Dear Andrew Bradford,
> > 
> > > Enable use of eserial devices for common and omap-common/spl.
> > > 
> > > This probably isn't the right way to do this as the changes aren't
> > > needed for 'common' configurations, just for one case.
> > > 
> > > Signed-off-by: Andrew Bradford 
> > > ---
> > >  arch/arm/cpu/armv7/omap-common/spl.c |7 ++-
> > >  common/console.c |   24
> > >  include/common.h |
> > > 5 + 3 files changed, 31 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
> > > b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644
> > > --- a/arch/arm/cpu/armv7/omap-common/spl.c
> > > +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> > > @@ -210,7 +210,12 @@ void preloader_console_init(void)
> > >   gd->flags |= GD_FLG_RELOC;
> > >   gd->baudrate = CONFIG_BAUDRATE;
> > > 
> > > - serial_init();  /* serial communications
> > > setup */
> > > + /* serial communications setup */
> > > +#ifdef CONFIG_SERIAL_MULTI
> > > + ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();
> > 
> > Uh, if you implement default_serial_console properly(), you won't
> > need this. Actually, I'm in the process of rolling out V2 of my
> > serial patchset, which will make your life much more easier. Can you
> > rebase the patchset on my series? I'll poke you about it.
> 
> I see that your serial patches have made it into u-boot/next, should I
> rebase this patch set with the requested changes on top of u-boot/next
> and resubmit?  Sorry, I'm not entirely clear on the role /next plays.

Yes please, thanks.

-- 
Tom


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[U-Boot] [PATCH v4 0/2] qi_lb60 add nand spl and usbboot support

[xiangfu]

From: Xiangfu 

V4:
  * split to 2 patches (nand spl/usbbot)
  * remove use define string.c using CONFIG_SPL_LIBGENERIC_SUPPORT
  * fix checkputch.pl warnings

V3:
  * add simpile string.c to mips/lib
  * some cleanup on jz4740.c
  * move to new spl/ structure 
  * support software usbboot mode

Xiangfu (2):
  qi_lb60: add nand spl support
  qi_lb60: add software usbboot support

 arch/mips/cpu/xburst/Makefile |7 +-
 arch/mips/cpu/xburst/cpu.c|4 +
 arch/mips/cpu/xburst/jz4740.c |   84 ++--
 arch/mips/cpu/xburst/spl/Makefile |   47 +++
 arch/mips/cpu/xburst/spl/start.S  |   65 +++
 board/qi/qi_lb60/Makefile |5 +
 board/qi/qi_lb60/qi_lb60-spl.c|   54 +++
 board/qi/qi_lb60/qi_lb60.c|6 +-
 board/qi/qi_lb60/u-boot-spl.lds   |   62 +++
 board/qi/qi_lb60/usbboot.S|  838 +
 drivers/mtd/nand/jz4740_nand.c|   39 +-
 include/configs/qi_lb60.h |  174 
 12 files changed, 1240 insertions(+), 145 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/spl/Makefile
 create mode 100644 arch/mips/cpu/xburst/spl/start.S
 create mode 100644 board/qi/qi_lb60/qi_lb60-spl.c
 create mode 100644 board/qi/qi_lb60/u-boot-spl.lds
 create mode 100644 board/qi/qi_lb60/usbboot.S

-- 
1.7.9.5

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Re: [U-Boot] [PATCH v2 01/10] x86: Change board baud_rate to ulong

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> This is a ulong for some architectures and just unsigned for others.
> Change x86 to be consistent.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/include/asm/u-boot.h |2 +-
>  common/cmd_bdinfo.c   |2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h
> index da667c5..0671b8d 100644
> --- a/arch/x86/include/asm/u-boot.h
> +++ b/arch/x86/include/asm/u-boot.h
> @@ -48,7 +48,7 @@ typedef struct bd_info {
> unsigned short  bi_ethspeed;/* Ethernet speed in Mbps */
> unsigned long   bi_intfreq; /* Internal Freq, in MHz */
> unsigned long   bi_busfreq; /* Bus Freq, in MHz */
> -   unsigned intbi_baudrate;/* Console Baudrate */
> +   unsigned long   bi_baudrate;/* Console Baudrate */
> unsigned long   bi_boot_params; /* where this board expects params */
> struct  /* RAM configuration */
> {
> diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
> index 23bd8a5..9bc0ebc 100644
> --- a/common/cmd_bdinfo.c
> +++ b/common/cmd_bdinfo.c
> @@ -439,7 +439,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char 
> * const argv[])
> printf("ip_addr = %s\n", getenv("ipaddr"));
> print_mhz("ethspeed",   bd->bi_ethspeed);
>  #endif
> -   printf("baudrate= %d bps\n", bd->bi_baudrate);
> +   printf("baudrate= %ld bps\n", bd->bi_baudrate);
>
> return 0;
>  }
> --
> 1.7.7.3
>

Ack-by: Graeme Russ 
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Re: [U-Boot] [PATCH v2 10/10] x86: Remove coreboot start16 code

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:13 AM, Simon Glass  wrote:
> Now that coreboot doesn't need the start16 code, remove it.
>
> Signed-off-by: Simon Glass 
> ---
> Changes in v2:
> - Add new patch to remove coreboot start16 code.
>
>  board/chromebook-x86/coreboot/coreboot_start16.S |   13 -
>  1 files changed, 0 insertions(+), 13 deletions(-)
>
> diff --git a/board/chromebook-x86/coreboot/coreboot_start16.S 
> b/board/chromebook-x86/coreboot/coreboot_start16.S
> index 9ad06df..6b3d92d 100644
> --- a/board/chromebook-x86/coreboot/coreboot_start16.S
> +++ b/board/chromebook-x86/coreboot/coreboot_start16.S
> @@ -22,19 +22,6 @@
>   * MA 02111-1307 USA
>   */
>
> -/*
> - * 16bit initialization code.
> - * This code have to map the area of the boot flash
> - * that is used by U-boot to its final destination.
> - */
> -
> -.text
> -.section .start16, "ax"
> -.code16
> -.globl board_init16
> -board_init16:
> -   jmp board_init16_ret
> -
>  .section .bios, "ax"
>  .code16
>  .globl realmode_reset
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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[U-Boot] [PATCH v4 2/2] qi_lb60: add software usbboot support

[xiangfu]

From: Xiangfu 

  JZ4740 CPU have a internal ROM have such kind of code, that make
  JZ4740 can boot from USB

  usbboot.S can downloads user program from the USB port to internal
  SRAM and branches to the internal SRAM to execute the program

Signed-off-by: Xiangfu 
---
 board/qi/qi_lb60/Makefile  |1 +
 board/qi/qi_lb60/qi_lb60-spl.c |   21 +
 board/qi/qi_lb60/usbboot.S |  838 
 3 files changed, 860 insertions(+)
 create mode 100644 board/qi/qi_lb60/usbboot.S

diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile
index e399246..6dd8c6f 100644
--- a/board/qi/qi_lb60/Makefile
+++ b/board/qi/qi_lb60/Makefile
@@ -23,6 +23,7 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 ifeq ($(CONFIG_SPL_BUILD),y)
+SOBJS  := usbboot.o
 COBJS  := $(BOARD)-spl.o
 else
 COBJS  := $(BOARD).o
diff --git a/board/qi/qi_lb60/qi_lb60-spl.c b/board/qi/qi_lb60/qi_lb60-spl.c
index 739cd37..44d5dd6 100644
--- a/board/qi/qi_lb60/qi_lb60-spl.c
+++ b/board/qi/qi_lb60/qi_lb60-spl.c
@@ -12,6 +12,22 @@
 #include 
 #include 
 
+#define KEY_U_OUT   (32 * 2 + 16)
+#define KEY_U_IN(32 * 3 + 19)
+
+static int is_usb_boot()
+{
+   __gpio_as_input(KEY_U_IN);
+   __gpio_enable_pull(KEY_U_IN);
+   __gpio_as_output(KEY_U_OUT);
+   __gpio_clear_pin(KEY_U_OUT);
+
+   if (__gpio_get_pin(KEY_U_IN) == 0)
+   return 1;
+
+   return 0;
+}
+
 void nand_spl_boot(void)
 {
uint32_t reg;
@@ -26,6 +42,11 @@ void nand_spl_boot(void)
pll_init();
sdram_init();
 
+   if (is_usb_boot()) {
+   serial_puts("[U] pressed, goto USBBOOT mode\n");
+   usb_boot();
+   }
+
nand_init();
 
serial_puts("\nStarting U-Boot ...\n");
diff --git a/board/qi/qi_lb60/usbboot.S b/board/qi/qi_lb60/usbboot.S
new file mode 100644
index 000..c872266
--- /dev/null
+++ b/board/qi/qi_lb60/usbboot.S
@@ -0,0 +1,838 @@
+/*
+ *  for jz4740 usb boot
+ *
+ *  Copyright (c) 2009 Author: 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+.set noreorder
+.globl usb_boot
+.text
+
+/*
+ * Both NAND and USB boot load data to D-Cache first, then transfer
+ * data from D-Cache to I-Cache, and jump to execute the code in I-Cache.
+ * So init caches first and then dispatch to a proper boot routine.
+ */
+
+.macro load_addr reg addr
+   li \reg, 0x8000
+   addiu \reg, \reg, \addr
+   la $2, usbboot_begin
+   subu \reg, \reg, $2
+.endm
+
+usb_boot:
+   /* Initialize PLL: set ICLK to 84MHz and HCLK to 42MHz. */
+   la  $9, 0xB000  /* CPCCR: Clock Control Register */
+   la  $8, 0x42041110  /* I:S:M:P=1:2:2:2 */
+   sw  $8, 0($9)
+
+   la  $9, 0xB010  /* CPPCR: PLL Control Register */
+   la  $8, 0x06000120  /* M=12 N=0 D=0 CLK=12*(M+2)/(N+2) */
+   sw  $8, 0($9)
+
+   mtc0$0, $26 /* CP0_ERRCTL, restore WST reset state */
+   nop
+
+   mtc0$0, $16 /* CP0_CONFIG */
+   nop
+
+   /* Relocate code to beginning of the ram */
+
+   la $2, usbboot_begin
+   la $3, usbboot_end
+   li $4, 0x8000
+
+1:
+   lw $5, 0($2)
+   sw $5, 0($4)
+   addiu $2, $2, 4
+   bne $2, $3, 1b
+   addiu $4, $4, 4
+
+   li $2, 0x8000
+   ori $3, $2, 0
+   addiu $3, $3, usbboot_end
+   la $4, usbboot_begin
+   subu $3, $3, $4
+
+
+2:
+   cache   0x0, 0($2)  /* Index_Invalidate_I */
+   cache   0x1, 0($2)  /* Index_Writeback_Inv_D */
+   addiu   $2, $2, 32
+   subu $4, $3, $2
+   bgtz$4, 2b
+   nop
+
+   load_addr $3, usb_boot_return
+
+   jr $3
+
+usbboot_begin:
+
+init_caches:
+   li  $2, 3   /* cacheable for kseg0 access */
+   mtc0$2, $16 /* CP0_CONFIG */
+   nop
+
+   li  $2, 0x2000  /* enable idx-store-data cache insn */
+   mtc0$2, $26 /* CP0_ERRCTL */
+
+   ori $2, $28, 0  /* start address */
+   ori $3, $2, 0x3fe0  /* end address, total 16KB */
+   mtc0$0,

Re: [U-Boot] [PATCH v2 03/10] x86: Allow excluding reset vector code from u-boot

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> From: Gabe Black 
>
> When running from coreboot we don't want this code.
>
> This version works by ifdef-ing out all of the code that would go
> into those sections and all the code that refers to it. The sections are
> then empty, and the linker will either leave them empty for the loader
> to ignore or remove them entirely.
>
> Signed-off-by: Gabe Black 
> Signed-off-by: Simon Glass 
> ---
> Changes in v2:
> - Put CONFIG_NO_RESET_CODE into Makefile instead of source files
>
>  Makefile|7 +--
>  arch/x86/cpu/Makefile   |5 -
>  arch/x86/cpu/u-boot.lds |3 +++
>  3 files changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/Makefile b/Makefile
> index 34d9075..6c2f357 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -212,9 +212,12 @@ endif
>  # U-Boot objectsorder is important (i.e. start must be first)
>
>  OBJS  = $(CPUDIR)/start.o
> +OBJS  = $(CPUDIR)/start.o
>  ifeq ($(CPU),x86)
> -OBJS += $(CPUDIR)/start16.o
> -OBJS += $(CPUDIR)/resetvec.o
> +   ifneq ($(CONFIG_NO_RESET_CODE),y)
> +   OBJS += $(CPUDIR)/start16.o
> +   OBJS += $(CPUDIR)/resetvec.o
> +   endif
>  endif
>  ifeq ($(CPU),ppc4xx)
>  OBJS += $(CPUDIR)/resetvec.o
> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
> index 7f1fc18..1eb70a7 100644
> --- a/arch/x86/cpu/Makefile
> +++ b/arch/x86/cpu/Makefile
> @@ -28,7 +28,10 @@ include $(TOPDIR)/config.mk
>
>  LIB= $(obj)lib$(CPU).o
>
> -START  = start.o start16.o resetvec.o
> +START  = start.o
> +ifneq ($(CONFIG_NO_RESET_CODE),y)
> +START  += resetvec.o start16.o
> +endif
>  COBJS  = interrupts.o cpu.o
>
>  SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
> diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
> index fe28030..2a90a01 100644
> --- a/arch/x86/cpu/u-boot.lds
> +++ b/arch/x86/cpu/u-boot.lds
> @@ -85,6 +85,8 @@ SECTIONS
> __bios_start = LOADADDR(.bios);
> __bios_size = SIZEOF(.bios);
>
> +#ifndef CONFIG_NO_RESET_CODE
> +
> /*
>  * The following expressions place the 16-bit Real-Mode code and
>  * Reset Vector at the end of the Flash ROM
> @@ -94,4 +96,5 @@ SECTIONS
>
> . = RESET_VEC_LOC;
> .resetvec : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - 
> RESET_SEG_SIZE + RESET_VEC_LOC)) { KEEP(*(.resetvec)); }
> +#endif
>  }
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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Re: [U-Boot] [NOTE] Mailing List / git / FTP / Web Server Outage

[Wolfgang Denk]

Hello all,

In message <20121010122316.4088a200...@gemini.denx.de> I wrote:
> 
> we have a dying disk drive on our main web server, and our hoster
> (Strato) claims they have to take down the machine and replace _all_
> disks in the RAID array, so we have to reinstall from scratch [*].

It was even worse.  They added a 2 hour hardware test to the delay,
just to confirm the error status we already had (from lots of Linux
kernel error messages plus SMART test failures).  And the replacment
disks we received have already Power_On_Hours = 40,000+ i. e. they
have been "burned in" for > 4.5 years :-(

But we are back up and running by now, it seems.

If you observe any issues then please send me a trouble report by
e-mail. Thanks.

And sorry for the inconveniences.  Be assured that we will discuss
this event internally and try to improve.


Best regards,

Wolfgang Denk

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[U-Boot] [PATCH v4 1/2] qi_lb60: add nand spl support

[xiangfu]

From: Xiangfu 

  The JZ4740 CPU can load 8KB from two different addresses:
   1. the normal area up to 8KB starting from NAND flash address 0x
   2. the backup area up to 8KB starting from NAND flash address 0x2000

  After create u-boot-spl.bin. it needs those 4 commands create final image for 
jz4740 cpu.
  
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc oflag=append 
bs=8192 count=1
tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc 
oflag=append bs=16384 count=1
cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
  

Signed-off-by: Xiangfu 
---
 arch/mips/cpu/xburst/Makefile |7 +-
 arch/mips/cpu/xburst/cpu.c|4 +
 arch/mips/cpu/xburst/jz4740.c |   84 --
 arch/mips/cpu/xburst/spl/Makefile |   47 ++
 arch/mips/cpu/xburst/spl/start.S  |   65 ++
 board/qi/qi_lb60/Makefile |4 +
 board/qi/qi_lb60/qi_lb60-spl.c|   33 +++
 board/qi/qi_lb60/qi_lb60.c|6 +-
 board/qi/qi_lb60/u-boot-spl.lds   |   62 +
 drivers/mtd/nand/jz4740_nand.c|   39 -
 include/configs/qi_lb60.h |  174 ++---
 11 files changed, 380 insertions(+), 145 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/spl/Makefile
 create mode 100644 arch/mips/cpu/xburst/spl/start.S
 create mode 100644 board/qi/qi_lb60/qi_lb60-spl.c
 create mode 100644 board/qi/qi_lb60/u-boot-spl.lds

diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile
index b1f2ae4..ec35e55 100644
--- a/arch/mips/cpu/xburst/Makefile
+++ b/arch/mips/cpu/xburst/Makefile
@@ -24,9 +24,12 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(CPU).o
 
+COBJS-y= cpu.o jz_serial.o
+
+ifneq ($(CONFIG_SPL_BUILD),y)
 START  = start.o
-SOBJS-y=
-COBJS-y= cpu.o timer.o jz_serial.o
+COBJS-y += timer.o
+endif
 
 COBJS-$(CONFIG_JZ4740) += jz4740.o
 
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
index ddcbfaa..1432838 100644
--- a/arch/mips/cpu/xburst/cpu.c
+++ b/arch/mips/cpu/xburst/cpu.c
@@ -42,6 +42,8 @@
:   \
: "i" (op), "R" (*(unsigned char *)(addr)))
 
+#ifndef CONFIG_SPL_BUILD
+
 void __attribute__((weak)) _machine_restart(void)
 {
struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE;
@@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
cache_op(Hit_Invalidate_D, addr);
 }
 
+#endif
+
 void flush_icache_all(void)
 {
u32 addr, t = 0;
diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
index c0b9817..40ef411 100644
--- a/arch/mips/cpu/xburst/jz4740.c
+++ b/arch/mips/cpu/xburst/jz4740.c
@@ -32,31 +32,19 @@ int disable_interrupts(void)
return 0;
 }
 
-/*
- * PLL output clock = EXTAL * NF / (NR * NO)
- * NF = FD + 2, NR = RD + 2
- * NO = 1 (if OD = 0), NO = 2 (if OD = 1 or 2), NO = 4 (if OD = 3)
- */
 void pll_init(void)
 {
struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
 
-   register unsigned int cfcr, plcr1;
-   int n2FR[33] = {
-   0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0,
-   7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,
-   9
-   };
-   int div[5] = {1, 3, 3, 3, 3}; /* divisors of I:S:P:L:M */
-   int nf, pllout2;
+   register unsigned int cfcr, plcr;
+   unsigned int nf, pllout2;
 
cfcr =  CPM_CPCCR_CLKOEN |
-   CPM_CPCCR_PCS |
-   (n2FR[div[0]] << CPM_CPCCR_CDIV_BIT) |
-   (n2FR[div[1]] << CPM_CPCCR_HDIV_BIT) |
-   (n2FR[div[2]] << CPM_CPCCR_PDIV_BIT) |
-   (n2FR[div[3]] << CPM_CPCCR_MDIV_BIT) |
-   (n2FR[div[4]] << CPM_CPCCR_LDIV_BIT);
+   (0 << CPM_CPCCR_CDIV_BIT) |
+   (2 << CPM_CPCCR_HDIV_BIT) |
+   (2 << CPM_CPCCR_PDIV_BIT) |
+   (2 << CPM_CPCCR_MDIV_BIT) |
+   (2 << CPM_CPCCR_LDIV_BIT);
 
pllout2 = (cfcr & CPM_CPCCR_PCS) ?
CONFIG_SYS_CPU_SPEED : (CONFIG_SYS_CPU_SPEED / 2);
@@ -65,15 +53,18 @@ void pll_init(void)
writel(pllout2 / 4800 - 1, &cpm->uhccdr);
 
nf = CONFIG_SYS_CPU_SPEED * 2 / CONFIG_SYS_EXTAL;
-   plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
+   plcr = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
(0 << CPM_CPPCR_PLLN_BIT) | /* RD=0, NR=2 */
(0 << CPM_CPPCR_PLLOD_BIT) |/* OD=0, NO=1 */
-   (0x20 << CPM_CPPCR_PLLST_BIT) | /* PLL stable time */
+   (0x32 << CPM_CPPCR_PLLST_BIT) | /* PLL stable time */
CPM_CPPCR_PLLEN;/* enable PLL */
 
/* init PLL */
writel(cfcr, &cpm->cpccr);
-   writel(plcr1, &cpm->cppcr);
+   writel(plcr, &cpm->cppcr);
+
+   while (!(readl(&cpm->c

Re: [U-Boot] [PATCH v2 08/10] x86: coreboot: Implement recursively scanning PCI busses

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> From: Gabe Black 
>
> A hook is installed to configure PCI bus bridges as they encountered by 
> u-boot.
> The hook extracts the secondary bus number from the bridge's config space and
> then recursively scans that bus.
>
> On Coreboot, the PCI bus address space has identity mapping with the
> physical address space, so declare it as such to ensure that the "pci_map_bar"
> function used by some PCI drivers is behaving properly. This fixes the
> EHCI PCI driver initialization on Stumpy.
>
> This was tested as follows:
>
> Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on
> bus 1, and empty busses 2 through 5. This matches the bridges
> reported on bus 0 and the PCI configuration output from coreboot.
>
> Signed-off-by: Gabe Black 
> Signed-off-by: Vincent Palatin 
> Signed-off-by: Stefan Reinauer 
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/coreboot/pci.c |   26 +++---
>  1 files changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
> index 0ddc975..8f94167 100644
> --- a/arch/x86/cpu/coreboot/pci.c
> +++ b/arch/x86/cpu/coreboot/pci.c
> @@ -31,15 +31,35 @@
>
>  static struct pci_controller coreboot_hose;
>
> +static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
> + struct pci_config_table *table)
> +{
> +   u8 secondary;
> +   hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
> +   hose->last_busno = max(hose->last_busno, secondary);
> +   pci_hose_scan_bus(hose, secondary);
> +}
> +
> +static struct pci_config_table pci_coreboot_config_table[] = {
> +   /* vendor, device, class, bus, dev, func */
> +   { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI,
> +   PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge },
> +   {}
> +};
> +
>  void pci_init_board(void)
>  {
> +   coreboot_hose.config_table = pci_coreboot_config_table;
> coreboot_hose.first_busno = 0;
> -   coreboot_hose.last_busno = 0xff;
> -   coreboot_hose.region_count = 0;
> +   coreboot_hose.last_busno = 0;
> +
> +   pci_set_region(coreboot_hose.regions + 0, 0x0, 0x0, 0x,
> +   PCI_REGION_MEM);
> +   coreboot_hose.region_count = 1;
>
> pci_setup_type1(&coreboot_hose);
>
> pci_register_hose(&coreboot_hose);
>
> -   coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose);
> +   pci_hose_scan(&coreboot_hose);
>  }
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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Re: [U-Boot] [PATCH 4/6] console & omap-common/spl: Enable use of eserial

[Marek Vasut]

Dear Andrew Bradford,

> Dear Marek Vasut,
> 
> On Thu, 27 Sep 2012 18:34:18 +0200
> 
> Marek Vasut  wrote:
> > Dear Andrew Bradford,
> > 
> > > Enable use of eserial devices for common and omap-common/spl.
> > > 
> > > This probably isn't the right way to do this as the changes aren't
> > > needed for 'common' configurations, just for one case.
> > > 
> > > Signed-off-by: Andrew Bradford 
> > > ---
> > > 
> > >  arch/arm/cpu/armv7/omap-common/spl.c |7 ++-
> > >  common/console.c |   24
> > > 
> > >  include/common.h |
> > > 5 + 3 files changed, 31 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
> > > b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644
> > > --- a/arch/arm/cpu/armv7/omap-common/spl.c
> > > +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> > > @@ -210,7 +210,12 @@ void preloader_console_init(void)
> > > 
> > >   gd->flags |= GD_FLG_RELOC;
> > >   gd->baudrate = CONFIG_BAUDRATE;
> > > 
> > > - serial_init();  /* serial communications
> > > setup */
> > > + /* serial communications setup */
> > > +#ifdef CONFIG_SERIAL_MULTI
> > > + ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();
> > 
> > Uh, if you implement default_serial_console properly(), you won't
> > need this. Actually, I'm in the process of rolling out V2 of my
> > serial patchset, which will make your life much more easier. Can you
> > rebase the patchset on my series? I'll poke you about it.
> 
> I see that your serial patches have made it into u-boot/next, should I
> rebase this patch set with the requested changes on top of u-boot/next
> and resubmit?

Yes

> Sorry, I'm not entirely clear on the role /next plays.

Simple. Merge window for current release is long closed, anything that goes 
into 
next release is in /next. The /master branch is now only being tested and only 
stabilization patches are accepted.

> Or is it recommended to rebase my changes on top of the tree I worked
> with before but with your serial patches applied?  Or some other method?

Rebase on next please. Thanks!

> Thanks,
> Andrew

Best regards,
Marek Vasut
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[U-Boot] [PATCH V3 2/4] FAT: make use of disk_partition_t.part

[Stephen Warren]

From: Stephen Warren 

This removes the standalone cur_part_nr variable, opening the way to
replacing fat_register_device() with fat_set_blk_dev().

Note that when get_partition_info() fails and we use the entire disk,
the correct partition number is 0 (whole disk) not 1 (first partition),
so that change is also made here.

An alternative to this (and the previous) patch might be to simply
remove the partition number from the printf(). I don't know how attached
people are to it.

Signed-off-by: Stephen Warren 
---
v3: No change.
v2: No change.
---
 fs/fat/fat.c |6 ++
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 80156c8..1e0d2a3 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -46,7 +46,6 @@ static void downcase(char *str)
 }
 
 static block_dev_desc_t *cur_dev;
-static unsigned int cur_part_nr;
 static disk_partition_t cur_part_info;
 
 #define DOS_BOOT_MAGIC_OFFSET  0x1fe
@@ -79,7 +78,6 @@ int fat_register_device(block_dev_desc_t * dev_desc, int 
part_no)
/* Read the partition table, if present */
if (!get_partition_info(dev_desc, part_no, &cur_part_info)) {
cur_dev = dev_desc;
-   cur_part_nr = part_no;
}
 #endif
 
@@ -92,7 +90,7 @@ int fat_register_device(block_dev_desc_t * dev_desc, int 
part_no)
}
 
cur_dev = dev_desc;
-   cur_part_nr = 1;
+   cur_part_info.part = 0;
cur_part_info.start = 0;
cur_part_info.size = dev_desc->lba;
cur_part_info.blksz = dev_desc->blksz;
@@ -1235,7 +1233,7 @@ int file_fat_detectfs(void)
vol_label[11] = '\0';
volinfo.fs_type[5] = '\0';
 
-   printf("Partition %d: Filesystem: %s \"%s\"\n", cur_part_nr,
+   printf("Partition %d: Filesystem: %s \"%s\"\n", cur_part_info.part,
volinfo.fs_type, vol_label);
 
return 0;
-- 
1.7.0.4

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[U-Boot] [PATCH V3 4/4] FAT: implement fat_set_blk_dev(), convert cmd_fat.c

[Stephen Warren]

From: Stephen Warren 

This makes the FAT filesystem API more consistent with other block-based
filesystems. If in the future standard multi-filesystem commands such as
"ls" or "load" are implemented, having FAT work the same way as other
filesystems will be necessary.

Convert cmd_fat.c to the new API, so the code looks more like other files
implementing the same commands for other filesystems.

Signed-off-by: Stephen Warren 
---
v3: Rebase on new fat.c cleanup patch.
v2: Fix inverted test of get_partition_info() result in fat_register_device().
---
 common/cmd_fat.c |8 +++---
 fs/fat/fat.c |   69 +-
 include/fat.h|1 +
 3 files changed, 37 insertions(+), 41 deletions(-)

diff --git a/common/cmd_fat.c b/common/cmd_fat.c
index 5a5698b..c38302d 100644
--- a/common/cmd_fat.c
+++ b/common/cmd_fat.c
@@ -55,7 +55,7 @@ int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
return 1;
 
dev = dev_desc->dev;
-   if (fat_register_device(dev_desc,part)!=0) {
+   if (fat_set_blk_dev(dev_desc, &info) != 0) {
printf("\n** Unable to use %s %d:%d for fatload **\n",
argv[1], dev, part);
return 1;
@@ -111,7 +111,7 @@ int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
return 1;
 
dev = dev_desc->dev;
-   if (fat_register_device(dev_desc,part)!=0) {
+   if (fat_set_blk_dev(dev_desc, &info) != 0) {
printf("\n** Unable to use %s %d:%d for fatls **\n",
argv[1], dev, part);
return 1;
@@ -149,7 +149,7 @@ int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return 1;
 
dev = dev_desc->dev;
-   if (fat_register_device(dev_desc,part)!=0) {
+   if (fat_set_blk_dev(dev_desc, &info) != 0) {
printf("\n** Unable to use %s %d:%d for fatinfo **\n",
argv[1], dev, part);
return 1;
@@ -185,7 +185,7 @@ static int do_fat_fswrite(cmd_tbl_t *cmdtp, int flag,
 
dev = dev_desc->dev;
 
-   if (fat_register_device(dev_desc, part) != 0) {
+   if (fat_set_blk_dev(dev_desc, &info) != 0) {
printf("\n** Unable to use %s %d:%d for fatwrite **\n",
argv[1], dev, part);
return 1;
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 2863c4b..a6fc07c 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -61,46 +61,12 @@ static int disk_read(__u32 block, __u32 nr_blocks, void 
*buf)
cur_part_info.start + block, nr_blocks, buf);
 }
 
-int fat_register_device(block_dev_desc_t * dev_desc, int part_no)
+int fat_set_blk_dev(block_dev_desc_t *dev_desc, disk_partition_t *info)
 {
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
 
-   /* First close any currently found FAT filesystem */
-   cur_dev = NULL;
-
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
-
-   /* Read the partition table, if present */
-   if (!get_partition_info(dev_desc, part_no, &cur_part_info)) {
-   cur_dev = dev_desc;
-   }
-#endif
-
-   /* Otherwise it might be a superfloppy (whole-disk FAT filesystem) */
-   if (!cur_dev) {
-   if (part_no != 0) {
-   printf("** Partition %d not valid on device %d **\n",
-   part_no, dev_desc->dev);
-   return -1;
-   }
-
-   cur_dev = dev_desc;
-   cur_part_info.part = 0;
-   cur_part_info.start = 0;
-   cur_part_info.size = dev_desc->lba;
-   cur_part_info.blksz = dev_desc->blksz;
-   cur_part_info.name[0] = 0;
-   cur_part_info.type[0] = 0;
-   cur_part_info.bootable = 0;
-#ifdef CONFIG_PARTITION_UUIDS
-   cur_part_info.uuid[0] = 0;
-#endif
-   }
+   cur_dev = dev_desc;
+   cur_part_info = *info;
 
/* Make sure it has a valid FAT header */
if (disk_read(0, 1, buffer) != 1) {
@@ -124,6 +90,35 @@ int fat_register_device(block_dev_desc_t * dev_desc, int 
part_no)
return -1;
 }
 
+int fat_register_device(block_dev_desc_t *dev_desc, int part_no)
+{
+   disk_partition_t info;
+
+   /* First close any currently found FAT filesystem */
+   cur_dev = NULL;
+
+   /* Read the partition table, if present */
+   if (get_partition_info(dev_desc, part_no, &info)) {
+   if (part_no != 0) {
+   printf("** Partition %d not valid on device %d **\n",
+   part_no, dev_desc->dev);
+   return -1;
+   }
+
+   info.

[U-Boot] [PATCH V3 3/4] FAT: initialize all fields in cur_part_info, simplify init

[Stephen Warren]

From: Stephen Warren 

cur_part_info.{name,type} are strings. So, we don't need to memset()
the entire thing, just put the NULL-termination in the first byte.

Add missing initialization of the bootable and uuid fields.

None of these fields are actually used by fat.c. However, since it
stores the entire disk_partition_t, we should make sure that all fields
are valid.

Signed-off-by: Stephen Warren 
---
v3: New patch.
---
 fs/fat/fat.c |8 ++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 1e0d2a3..2863c4b 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -94,8 +94,12 @@ int fat_register_device(block_dev_desc_t * dev_desc, int 
part_no)
cur_part_info.start = 0;
cur_part_info.size = dev_desc->lba;
cur_part_info.blksz = dev_desc->blksz;
-   memset(cur_part_info.name, 0, sizeof(cur_part_info.name));
-   memset(cur_part_info.type, 0, sizeof(cur_part_info.type));
+   cur_part_info.name[0] = 0;
+   cur_part_info.type[0] = 0;
+   cur_part_info.bootable = 0;
+#ifdef CONFIG_PARTITION_UUIDS
+   cur_part_info.uuid[0] = 0;
+#endif
}
 
/* Make sure it has a valid FAT header */
-- 
1.7.0.4

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[U-Boot] [RFC PATCH 1/2] fs: delete unused Makefile

[Stephen Warren]

From: Stephen Warren 

fs/Makefile is unused. The top-level Makefile sets LIBS-y += fs/xxx and
hence causes make to directly descend two directory levels into each
individual filesystem, and it never descends into fs/ itself.

So, delete this useless file.

Signed-off-by: Stephen Warren 
---
 fs/Makefile |   42 --
 1 files changed, 0 insertions(+), 42 deletions(-)
 delete mode 100644 fs/Makefile

diff --git a/fs/Makefile b/fs/Makefile
deleted file mode 100644
index 901e189..000
--- a/fs/Makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#
-
-subdirs-$(CONFIG_CMD_CRAMFS) := cramfs
-subdirs-$(CONFIG_CMD_EXT4) += ext4
-ifndef CONFIG_CMD_EXT4
-subdirs-$(CONFIG_CMD_EXT2) += ext4
-endif
-subdirs-$(CONFIG_CMD_FAT) += fat
-subdirs-$(CONFIG_CMD_FDOS) += fdos
-subdirs-$(CONFIG_CMD_JFFS2) += jffs2
-subdirs-$(CONFIG_CMD_REISER) += reiserfs
-subdirs-$(CONFIG_YAFFS2) += yaffs2
-subdirs-$(CONFIG_CMD_UBIFS) += ubifs
-subdirs-$(CONFIG_CMD_ZFS) += zfs
-
-SUBDIRS:= $(subdirs-y)
-
-$(obj).depend all:
-   @for dir in $(SUBDIRS) ; do \
-   $(MAKE) -C $$dir $@ ; done
-- 
1.7.0.4

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[U-Boot] [PATCH V3 1/4] part: add partition number to disk_partition_t

[Stephen Warren]

From: Stephen Warren 

The FAT filesystem code knows which partition ID it is operating on.
Currently, this is passed to fat_register_device() as a parameter.
In order to convert FAT to the more standardized fat_set_blk_dev(), the
information needs to come from somewhere else, and the partition
definition structure is the logical place.

Signed-off-by: Stephen Warren 
---
v3: Set info->part in get_device_and_partition() when returning "whole
disk" partition.
v2: No change.
---
 disk/part.c|2 ++
 include/part.h |1 +
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/disk/part.c b/disk/part.c
index 8ba3cde..6d8135d 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -391,6 +391,7 @@ int get_partition_info(block_dev_desc_t *dev_desc, int part
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE)
 
+   info->part = part;
 #ifdef CONFIG_PARTITION_UUIDS
/* The common case is no UUID support */
info->uuid[0] = 0;
@@ -557,6 +558,7 @@ int get_device_and_partition(const char *ifname, const char 
*dev_part_str,
goto cleanup;
}
 
+   info->part = 0;
info->start = 0;
info->size = (*dev_desc)->lba;
info->blksz = (*dev_desc)->blksz;
diff --git a/include/part.h b/include/part.h
index 27ea283..ebdebd8 100644
--- a/include/part.h
+++ b/include/part.h
@@ -88,6 +88,7 @@ typedef struct block_dev_desc {
 #define DEV_TYPE_OPDISK0x07/* optical disk */
 
 typedef struct disk_partition {
+   int part;   /* Partition number */
ulong   start;  /* # of first block in partition*/
ulong   size;   /* number of blocks in partition*/
ulong   blksz;  /* block size in bytes  */
-- 
1.7.0.4

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[U-Boot] [RFC PATCH 2/2] fs: add partition switch libary, implement ls and fsload commands

[Stephen Warren]

From: Stephen Warren 

Implement "ls" and "fsload" commands that act like {fat,ext2}{ls,load},
and transparently handle either file-system. This scheme could easily be
extended to other filesystem types; I only didn't do it for zfs because
I don't have any filesystems of that type.

Signed-off-by: Stephen Warren 
---
There are a couple FIXMEs in here:

1) In fs/fs.c, code is ifdef on CONFIG_CMD_FAT or CONFIG_CMD_EXT2. This
means that the new commands and code can only be enabled if the "legacy"
{fat,ext2}{ls,load} are enabled. What we really want is CONFIG_FS_FAT and
CONFIG_FS_EXT2 to enable the filesystem code, and then CONFIG_CMD_FAT,
CONFIG_CMD_EXT2, CONFIG_CMD_FS to only affect the command implementations.
However, that would require making every include/config/*.h that sets the
current defines also set more. I suppose that's a fairly mechanical change
though, so easy enough to implement. Does that seem like a reasonable
approach to people?

2) In common/Makefile, I need to make this conditional upon CONFIG_CMD_FS
or similar.

Also, I wonder if the fs/* and common/* should be two separate patches or
not?

 Makefile|3 +-
 common/Makefile |2 +
 common/cmd_fs.c |   86 ++
 fs/Makefile |   47 
 fs/fs.c |  216 +++
 include/fs.h|   49 +
 6 files changed, 402 insertions(+), 1 deletions(-)
 create mode 100644 common/cmd_fs.c
 create mode 100644 fs/Makefile
 create mode 100644 fs/fs.c
 create mode 100644 include/fs.h

diff --git a/Makefile b/Makefile
index d7e2c2f..0b50eb7 100644
--- a/Makefile
+++ b/Makefile
@@ -242,7 +242,8 @@ LIBS-y += drivers/net/npe/libnpe.o
 endif
 LIBS-$(CONFIG_OF_EMBED) += dts/libdts.o
 LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
-LIBS-y += fs/cramfs/libcramfs.o \
+LIBS-y += fs/libfs.o \
+   fs/cramfs/libcramfs.o \
fs/ext4/libext4fs.o \
fs/fat/libfat.o \
fs/fdos/libfdos.o \
diff --git a/common/Makefile b/common/Makefile
index 125b2be..4f2d944 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -103,6 +103,8 @@ COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o
 ifdef CONFIG_FPGA
 COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
 endif
+# FIXME: Need to make this conditional
+COBJS-y += cmd_fs.o
 COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o
 COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
 COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
diff --git a/common/cmd_fs.c b/common/cmd_fs.c
new file mode 100644
index 000..948a5e0
--- /dev/null
+++ b/common/cmd_fs.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Inspired by cmd_ext_common.c, cmd_fat.c.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+
+int do_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   unsigned long addr;
+   unsigned long bytes;
+   unsigned long pos;
+   int len_read;
+   char buf[12];
+
+   if (argc < 5)
+   return -1;
+
+   if (fs_set_blk_dev(argv[1], argv[2]))
+   return 1;
+
+   addr = simple_strtoul(argv[3], NULL, 0);
+   if (argc >= 6)
+   bytes = simple_strtoul(argv[5], NULL, 0);
+   else
+   bytes = 0;
+   if (argc >= 7)
+   pos = simple_strtoul(argv[6], NULL, 0);
+   else
+   pos = 0;
+
+   len_read = fs_read(argv[4], addr, pos, bytes);
+   if (len_read <= 0)
+   return 1;
+
+   sprintf(buf, "0x%x", (unsigned int)len_read);
+   setenv("filesize", buf);
+
+   return 0;
+}
+
+U_BOOT_CMD(
+   fsload, 7,  0,  do_fsload,
+   "load binary file from a filesystem",
+   " []   [bytes [pos]]\n"
+   "- Load binary file 'filename' from partition 'part' on device\n"
+   "   type 'interface' instance 'dev' to address 'addr' in memory.\n"
+   "  'bytes' gives the size to load in bytes.\n"
+   "  If 'bytes' is 0 or omitted, the file is read until the end.\n"
+   "  'pos' gives the file byte position to start reading from.\n"
+   "  If 'pos' is 0 or omitted, the file is read from the start."
+);
+
+int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   if (fs_set_blk_dev(argv[1], argv[2]))
+   return 1;
+
+   if (fs_ls(argc == 4 ? argv[3] : "/"))
+   return 1;
+
+   return 0;
+}
+
+U_BOOT_CMD(

[U-Boot] [PATCH v2 06/10] x86: coreboot: Tell u-boot about PCI bus 0 when initializing

[Simon Glass]

From: Gabe Black 

U-boot needs a host controller or "hose" to interact with the PCI busses
behind them. This change installs a host controller during initialization of
the coreboot "board" which implements some of X86's basic PCI semantics. This
relies on some existing generic code, but also duplicates a little bit of code
from the sc520 implementation. Ideally we'd eliminate that duplication at some
point.

It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's
generic PCI configuration code what to do if it encounters a bridge,
specifically to scan the bus on the other side of it.

Signed-off-by: Gabe Black 
Signed-off-by: Simon Glass 
---

 arch/x86/cpu/coreboot/pci.c |   15 +++
 arch/x86/include/asm/pci.h  |2 +-
 2 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index 732ca3c..0ddc975 100644
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -25,6 +25,21 @@
  * MA 02111-1307 USA
  */
 
+#include 
+#include 
+#include 
+
+static struct pci_controller coreboot_hose;
+
 void pci_init_board(void)
 {
+   coreboot_hose.first_busno = 0;
+   coreboot_hose.last_busno = 0xff;
+   coreboot_hose.region_count = 0;
+
+   pci_setup_type1(&coreboot_hose);
+
+   pci_register_hose(&coreboot_hose);
+
+   coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose);
 }
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 37cc7e3..6d68ab6 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -24,7 +24,7 @@
  */
 
 #ifndef _PCI_I386_H_
-#define _PCI_I386_H_   1
+#define _PCI_I386_H_
 
 #define DEFINE_PCI_DEVICE_TABLE(_table) \
const struct pci_device_id _table[]
-- 
1.7.7.3

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Re: [U-Boot] [PATCH v2 05/10] x86: coreboot: Move non-board specific files to coreboot arch directory

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> From: Stefan Reinauer 
>
> coreboot.c and coreboot_pci.c don't contain board specific but only
> coreboot specific code. Hence move it to the coreboot directory in
> arch/x86/cpu (which should probably be moved out of cpu/ in another
> commit)
>
> Signed-off-by: Stefan Reinauer 
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/coreboot/Makefile |2 ++
>  .../x86/cpu}/coreboot/coreboot.c   |0
>  .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |0
>  board/chromebook-x86/coreboot/Makefile |2 --
>  4 files changed, 2 insertions(+), 2 deletions(-)
>  rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
>  rename board/chromebook-x86/coreboot/coreboot_pci.c => 
> arch/x86/cpu/coreboot/pci.c (100%)
>
> diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
> index 13f5f8a..fbf5a00 100644
> --- a/arch/x86/cpu/coreboot/Makefile
> +++ b/arch/x86/cpu/coreboot/Makefile
> @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk
>
>  LIB:= $(obj)lib$(SOC).o
>
> +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
>  COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
> +COBJS-$(CONFIG_PCI) += pci.o
>
>  SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
>
> diff --git a/board/chromebook-x86/coreboot/coreboot.c 
> b/arch/x86/cpu/coreboot/coreboot.c
> similarity index 100%
> rename from board/chromebook-x86/coreboot/coreboot.c
> rename to arch/x86/cpu/coreboot/coreboot.c
> diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c 
> b/arch/x86/cpu/coreboot/pci.c
> similarity index 100%
> rename from board/chromebook-x86/coreboot/coreboot_pci.c
> rename to arch/x86/cpu/coreboot/pci.c
> diff --git a/board/chromebook-x86/coreboot/Makefile 
> b/board/chromebook-x86/coreboot/Makefile
> index cfcc0df..2bddf04 100644
> --- a/board/chromebook-x86/coreboot/Makefile
> +++ b/board/chromebook-x86/coreboot/Makefile
> @@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk
>
>  LIB= $(obj)lib$(BOARD).o
>
> -COBJS-y+= coreboot.o
> -COBJS-$(CONFIG_PCI) += coreboot_pci.o
>  SOBJS-y+= coreboot_start16.o
>  SOBJS-y+= coreboot_start.o
>
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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[U-Boot] [PATCH v2 02/10] x86: Add initial memory barrier macros

[Simon Glass]

These are available on other architectures, so add them on x86.

Signed-off-by: Simon Glass 
---

 arch/x86/include/asm/io.h |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 9b757d4..b12bdd8 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -234,4 +234,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
return (phys_addr_t)(vaddr);
 }
 
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb()  __asm__ __volatile__ ("" : : : "memory")
+#define __iormb()  dmb()
+#define __iowmb()  dmb()
+
 #endif
-- 
1.7.7.3

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Re: [U-Boot] [PATCH v3] add nand spl boot for qi_lb60 board

[Xiangfu Liu]

Hi 

Thanks for feedback. PATVH v4 will coming soon. about 'CONFIG_SPL_FRAMEWORK'
I don't know this when I working on ben nanonote spl. I think I will stick
with this spl for awhile. 

is there a plan remove drivers/mtd/nand/nand_spl_*.c?

Xiangfu


On 10/10/2012 05:27 AM, Daniel Schwierzeck wrote:
> 2012/10/9 Tom Rini :
>> On Tue, Oct 09, 2012 at 04:28:05PM +0800, xian...@openmobilefree.net wrote:
>>
>>> From: Xiangfu Liu 
>>>
>>>  * After create u-boot-spl.bin. it needs those 4 commands create final 
>>> image for jz4740 cpu.
>>>   
>>>   dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync bs=8192 count=1
>>>   dd if=spl/u-boot-spl.bin of=u-boot-nand.bin conv=sync,notrunc 
>>> oflag=append bs=8192 count=1
>>>   tr '\0' '\377' < /dev/zero | dd of=u-boot-nand.bin conv=sync,notrunc 
>>> oflag=append bs=16384 count=1
>>>   cat u-boot-nand.bin u-boot.bin > u-boot-nand-final.bin
>>>   
>>>   The JZ4740 CPU can load 8KB from two different addresses:
>>>1. the normal area up to 8KB starting from NAND flash address 0x
>>>2. the backup area up to 8KB starting from NAND flash address 0x2000
>>>
>>>
>>>  * Add software usbboot mode
>>>Downloads user program from the USB port to internal
>>>SRAM and branches to the internal SRAM to execute the program.
>>>(JZ4740 CPU have a internal ROM have such kind of code, that make
>>> JZ4740 can boot from USB)
>>> ---
>>> v3:
>>>   * add simpile string.c to mips/lib
>>>   * some cleanup on jz4740.c
>>>   * move to new spl/ structure
>>>   * support software usbboot mode
>>
>> I'm happy you've moved to the new SPL infrastructure.  A few comments:
>>
>> In general, please check for checkpatch.pl issues, I spotted a few.
>> Also, don't use // comments in asm, everything else in MIPS uses '#' or
>> '/* ... */'.  Please use 'puts' rather than 'serial_puts' directly.
>>
>> [snip]
>>> diff --git a/arch/mips/lib/string.c b/arch/mips/lib/string.c
>>> new file mode 100644
>>> index 000..d59f44a
>>> --- /dev/null
>>> +++ b/arch/mips/lib/string.c
>>> @@ -0,0 +1,32 @@
>>
>> Can you try just enabling CONFIG_SPL_LIBGENERIC_SUPPORT ?  You should
>> have the unused functions garbage collected automatically.
>>
>>> diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
>>> index 3ec34f3..4ab2229 100644
>>> --- a/drivers/mtd/nand/jz4740_nand.c
>>> +++ b/drivers/mtd/nand/jz4740_nand.c
>>> @@ -15,6 +15,9 @@
>>>  #include 
>>>  #include 
>>>
>>> +#ifdef CONFIG_SPL_BUILD
>>> +#define printf(arg...) do {} while (0)
>>> +#endif
>>
>> In this case you should just switch to puts.
>>
>> And a non-blocking question, have you looked at the CONFIG_SPL_FRAMEWORK
>> code in common/spl/ now?
>>
> 
> in addition to Tom's comments:
> please split coding style cleanups, code reordering, NAND SPL and USB
> boot into separate patches
> 

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Re: [U-Boot] [PATCH v2 04/10] x86: Add some missing includes.

[Graeme Russ]

Hi Simon,

On Thu, Oct 11, 2012 at 10:12 AM, Simon Glass  wrote:
> From: Gabe Black 
>
> I suspect these includes were usually available because something else
> included them earlier or because they were brought in transitively.
>
> Signed-off-by: Gabe Black 
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/include/asm/global_data.h |2 ++
>  arch/x86/include/asm/u-boot.h  |3 +++
>  2 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/global_data.h 
> b/arch/x86/include/asm/global_data.h
> index 6d29c0b..3c79508 100644
> --- a/arch/x86/include/asm/global_data.h
> +++ b/arch/x86/include/asm/global_data.h
> @@ -33,6 +33,8 @@
>
>  #ifndef __ASSEMBLY__
>
> +#include 
> +
>  typedefstruct global_data {
> /* NOTE: gd_addr MUST be first member of struct global_data! */
> unsigned long   gd_addr;/* Location of Global Data */
> diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h
> index 0671b8d..e2ba845 100644
> --- a/arch/x86/include/asm/u-boot.h
> +++ b/arch/x86/include/asm/u-boot.h
> @@ -36,6 +36,9 @@
>  #ifndef _U_BOOT_H_
>  #define _U_BOOT_H_ 1
>
> +#include 
> +#include 
> +
>  typedef struct bd_info {
> unsigned long   bi_memstart;/* start of DRAM memory */
> phys_size_t bi_memsize; /* size  of DRAM memory in bytes */
> --
> 1.7.7.3
>

Acked-by: Graeme Russ 
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[U-Boot] u-boot on my board freescale P1010RDB is erased

[randriamanjaka franky]

Hi,
The u-boot on my board freescale P1010RDB  is erased.There was a problem when i 
want to reflash it.
 
Is there a tool from freescale to put the first u-boot from nand on my board 
freescale P1010RDB  ?
 
Thanks.
 
Best regards.

RANDRIAMANJAKA FRANKY
 
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[U-Boot] mpc85xx debug TLB entry

[Scott Wood]

I'm debugging some SPL changes and am still having a hard time  
following the initial TLB flow.  We seem to be creating an entry in AS0  
-- how is that not conflicting with the TLB entry we're running from?   
Why is the debug TLB 256K?  Why is it not aligned to 256K?  How do you  
know that MAS2_I is correct (it should be cacheable in the  
loaded-by-spl case)?


I'm trying to get the p2020rdb-pca SPL payload to run out of L2 SRAM,  
and I see weird TLB behavior causing a hang if I don't comment out the  
debug TLB.


-Scott
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Re: [U-Boot] I2C on mx25

[Fabio Estevam]

On Wed, Oct 10, 2012 at 8:28 PM, Fabio Estevam  wrote:

> Ok, thanks. I will debug more. If you have a chance to test mx25 FEC
> with 2012.10-rc3, just let me know.

Nevermind. Problem solved. It was a config file issue I had.

Will submit the patches soon.

Thanks for your help,

Fabio Estevam
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Re: [U-Boot] U-Boot git usage model

[Stephen Warren]

On 10/10/2012 12:15 AM, Albert ARIBAUD wrote:
> Hi Stephen,
> 
> On Tue, 09 Oct 2012 17:04:06 -0600, Stephen Warren
>  wrote:
> 
>> On 10/09/2012 04:19 PM, Albert ARIBAUD wrote:
> 
>>> Apart from this, I'm not sure why forbidding fast-forward is a good
>>> thing, but if there are benefits, why not.
>>
>> It provides documentation in the git history of when merges were made,
>> and what the source of the merge was (at least using the remote name
>> that the merger has configured, which is better than nothing).
> 
> This is what it provides, but this does not tell me why it is a good
> thing. My own use of git history is to find out which (local or remote)
> branch --contains a given commit, and this is insensitive to allowing
> ff merges or not.

The documentation of merge commits seems good to me just in an of itself.

>> Related, not rebasing when merging a branch into upstream makes
>> validating Signed-off-by a lot easier; when a patch is directly applied,
>> it should be Signed-off-by the person who applied it. When a person does
>> a rebase rather than a merge, the git committer for the commits is
>> re-written as if the person doing the rebase applied the patch. Instead
>> when merging (and disallowing fast-forward) a merge commit is always
>> created so it's obvious where S-o-b should be applied (direct patch
>> application) and where not (to commits that are merged).
> 
> I think we've got several things running here: merges with or without
> ffs, hiding patches inside a merge (IIUC) and committer identity.
> 
> Re hiding patches in a merge if that's really what you mean, I agree

Hiding patches within merges wasn't something I'd considered at all; I
just assumed that would never happen.

...
> Re committer identity, I don't see the relationship with "by" tags, and
> especially with Singed-off-by, since the sign-off is not and must not
> be related to the committer of the patch, but to its author(s).

At least the way the Linux kernel uses the tag, both the original author
of the patch /and/ anyone who applies the patch, cherry-picks the patch,
... must add their S-o-b line. I think U-Boot isn't using that part of
the model.

...
>>> Re merging from upstream back into downstream branches, I tend to think
>>> that must be allowed considering custodian trees are supposed to be
>>> useable, and as such may need to merge back from mainline.
>>
>> Why is that required for downstream trees to be usable? What is the
>> definition of "usable" you're using?
> 
> See
> :
> 
> "My idea of a custodian repository is that it is more than just a
> working tool for collecting patches and preparing these for merge into
> mainline. My idea is instead that these are pretty much independent
> incarnations of U-Boot source trees which users (note: users, not only
> developers) with specific needs or interests can refer to."

Hmmm. That makes custodian trees very multi-purpose; they have to both:

a) Be used for feeding patches upstream.
b) Be a useful independent version of U-Boot.

That seems like conflating two pretty different requirements. I'm
personally not sure that's a good idea.

Now, obviously the custodian trees should be buildable and run fine on
all platforms; patches shouldn't break functionality. But, I don't think
that any tree either that u-boot.git should be seen as somewhere you'd
expect to be able to use a combination of features from different
custodian trees before they're merged into u-boot.git, which is what the
description above implies to me.

...
> You may be making the point that next should be handled just as master
> as far as the process I laid out can apply to next as well as master
> only one release further -- and I might understand this. "Master" for
> coming release, "next" for next release when merge window is closed,
> and unruly topical branches for anythingthat does not fit in there.

Yes, using an identical process for next and master makes sense to me.

> But that's not making the point (IMO) that we should have a flurry of
> branch names.

True, that's an entirely orthogonal issue. I mainly raised that point as
an example from the kernel. What I really started this conversation
about was not using rebases in either master or next, and the
conversation has started to concentrate more on other things.
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[U-Boot] [PATCH v2 07/10] x86: coreboot: Modify u-boot code to allow building coreboot payload

[Simon Glass]

From: Vadim Bendebury 

This prevents the preprocessor from complaining when processing
variadic macros

Signed-off-by: Vadim Bendebury 
Signed-off-by: Simon Glass 
---

 board/chromebook-x86/coreboot/config.mk |   37 +++
 1 files changed, 37 insertions(+), 0 deletions(-)
 create mode 100644 board/chromebook-x86/coreboot/config.mk

diff --git a/board/chromebook-x86/coreboot/config.mk 
b/board/chromebook-x86/coreboot/config.mk
new file mode 100644
index 000..f720851
--- /dev/null
+++ b/board/chromebook-x86/coreboot/config.mk
@@ -0,0 +1,37 @@
+#
+# Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above
+# copyright notice, this list of conditions and the following disclaimer
+# in the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of Google Inc. nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Alternatively, this software may be distributed under the terms of the
+# GNU General Public License ("GPL") version 2 as published by the Free
+# Software Foundation.
+#
+
+HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros
-- 
1.7.7.3

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Re: [U-Boot] [PATCH v3] add nand spl boot for qi_lb60 board

[Xiangfu Liu]

Hi Tom Rini

I cannot easy find a way to use 'puts' instead 'serial_puts' in my code.
any advise will be great. 

Thanks
Xiangfu

On 10/10/2012 05:27 AM, Daniel Schwierzeck wrote:
>> I'm happy you've moved to the new SPL infrastructure.  A few comments:
>>
>> In general, please check for checkpatch.pl issues, I spotted a few.
>> Also, don't use // comments in asm, everything else in MIPS uses '#' or
>> '/* ... */'.  Please use 'puts' rather than 'serial_puts' directly.
>>

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[U-Boot] [PATCH v2 05/10] x86: coreboot: Move non-board specific files to coreboot arch directory

[Simon Glass]

From: Stefan Reinauer 

coreboot.c and coreboot_pci.c don't contain board specific but only
coreboot specific code. Hence move it to the coreboot directory in
arch/x86/cpu (which should probably be moved out of cpu/ in another
commit)

Signed-off-by: Stefan Reinauer 
Signed-off-by: Simon Glass 
---

 arch/x86/cpu/coreboot/Makefile |2 ++
 .../x86/cpu}/coreboot/coreboot.c   |0
 .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |0
 board/chromebook-x86/coreboot/Makefile |2 --
 4 files changed, 2 insertions(+), 2 deletions(-)
 rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
 rename board/chromebook-x86/coreboot/coreboot_pci.c => 
arch/x86/cpu/coreboot/pci.c (100%)

diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 13f5f8a..fbf5a00 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk
 
 LIB:= $(obj)lib$(SOC).o
 
+COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
 COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
 COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
 COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
 COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
+COBJS-$(CONFIG_PCI) += pci.o
 
 SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
 
diff --git a/board/chromebook-x86/coreboot/coreboot.c 
b/arch/x86/cpu/coreboot/coreboot.c
similarity index 100%
rename from board/chromebook-x86/coreboot/coreboot.c
rename to arch/x86/cpu/coreboot/coreboot.c
diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c 
b/arch/x86/cpu/coreboot/pci.c
similarity index 100%
rename from board/chromebook-x86/coreboot/coreboot_pci.c
rename to arch/x86/cpu/coreboot/pci.c
diff --git a/board/chromebook-x86/coreboot/Makefile 
b/board/chromebook-x86/coreboot/Makefile
index cfcc0df..2bddf04 100644
--- a/board/chromebook-x86/coreboot/Makefile
+++ b/board/chromebook-x86/coreboot/Makefile
@@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(BOARD).o
 
-COBJS-y+= coreboot.o
-COBJS-$(CONFIG_PCI) += coreboot_pci.o
 SOBJS-y+= coreboot_start16.o
 SOBJS-y+= coreboot_start.o
 
-- 
1.7.7.3

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[U-Boot] [PATCH v2 0/10] x86: Patches to enable running U-Boot from coreboot

[Simon Glass]

This series carries on from Gabe Black's work to upstream support for
running U-Boot from coreboot.

Aditional follow-on patches are also required, depending on feedback
here.

Changes in v2:
- Put CONFIG_NO_RESET_CODE into Makefile instead of source files
- Add new patch to remove coreboot start16 code.

Gabe Black (4):
  x86: Allow excluding reset vector code from u-boot
  x86: Add some missing includes.
  x86: coreboot: Tell u-boot about PCI bus 0 when initializing
  x86: coreboot: Implement recursively scanning PCI busses

Simon Glass (4):
  x86: Change board baud_rate to ulong
  x86: Add initial memory barrier macros
  x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE
  x86: Remove coreboot start16 code

Stefan Reinauer (1):
  x86: coreboot: Move non-board specific files to coreboot arch
directory

Vadim Bendebury (1):
  x86: coreboot: Modify u-boot code to allow building coreboot payload

 Makefile   |7 +++-
 arch/x86/cpu/Makefile  |5 ++-
 arch/x86/cpu/coreboot/Makefile |2 +
 .../x86/cpu}/coreboot/coreboot.c   |0
 .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |   35 ++
 arch/x86/cpu/u-boot.lds|3 ++
 arch/x86/include/asm/global_data.h |2 +
 arch/x86/include/asm/io.h  |8 
 arch/x86/include/asm/pci.h |2 +-
 arch/x86/include/asm/u-boot.h  |5 ++-
 board/chromebook-x86/coreboot/Makefile |2 -
 board/chromebook-x86/coreboot/config.mk|   37 
 board/chromebook-x86/coreboot/coreboot_start16.S   |   13 ---
 common/cmd_bdinfo.c|2 +-
 include/configs/coreboot.h |6 +++-
 15 files changed, 107 insertions(+), 22 deletions(-)
 rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
 rename board/chromebook-x86/coreboot/coreboot_pci.c => 
arch/x86/cpu/coreboot/pci.c (51%)
 create mode 100644 board/chromebook-x86/coreboot/config.mk

-- 
1.7.7.3

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Re: [U-Boot] [PATCH 0/5] EXYNOS4: Enable I2C support

[Piotr Wilczek]

Dear Minkyu Kang,

The reason I didn't provide the last patch to use the hardware I2C is that
on Trats board a software I2C is used to communicate with Fuel Gage.
Unfortunately in u-boot soft_i2c and hardware I2C cannot be used at the same
time. The patchset was tested on Trats board and it worked correctly.

I could provide the last patch to use hardware I2C on Trats board for test
purposes and prove that it can be used on other boards.

Best regards,
Piotr Wilczek

> -Original Message-
> From: Minkyu Kang [mailto:proms...@gmail.com]
> Sent: Wednesday, October 10, 2012 2:08 PM
> To: Piotr Wilczek
> Cc: u-boot@lists.denx.de; Kyungmin Park
> Subject: Re: [U-Boot] [PATCH 0/5] EXYNOS4: Enable I2C support
> 
> Dear Piotr Wilczek,
> 
> On 24 September 2012 15:49, Piotr Wilczek 
> wrote:
> > This patchset enables hardware I2C support for Exynos 4.
> > The s3c24x0 I2C driver is modified to use for for both Exynos 4 and
> Exynos 5.
> > Pinmux setting is add for Exynos 4.
> > PMIC MAX8997 driver is modified to support multi channel hardware
> I2C.
> >
> > Piotr Wilczek (5):
> >   EXYNOS: CLK: Add i2c clock
> >   EXYNOS: Add Exynos4 I2C spacing
> >   EXYNOS: PINMUX: Add pinmux support for i2c
> >   DRIVERS: I2C: Modify I2C driver for EXYNOS4
> >   DRIVERS: MISC: PMIC: Modify pmic driver to support multibus I2C
> >
> >  arch/arm/cpu/armv7/exynos/clock.c  |7 
> >  arch/arm/cpu/armv7/exynos/pinmux.c |   51
> 
> >  arch/arm/include/asm/arch-exynos/cpu.h |2 +
> >  drivers/i2c/s3c24x0_i2c.c  |   19 +++
> >  drivers/misc/pmic_max8997.c|7 +++-
> >  5 files changed, 77 insertions(+), 9 deletions(-)
> >
> 
> Codes look good to me.
> But I couldn't find usage of hardware at your patch.
> So I couldn't check what patch is working correctly.
> Please update the patch.
> 
> Thanks.
> Minkyu Kang.
> --
> from. prom.
> www.promsoft.net

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[U-Boot] [PATCH v2 08/10] x86: coreboot: Implement recursively scanning PCI busses

[Simon Glass]

From: Gabe Black 

A hook is installed to configure PCI bus bridges as they encountered by u-boot.
The hook extracts the secondary bus number from the bridge's config space and
then recursively scans that bus.

On Coreboot, the PCI bus address space has identity mapping with the
physical address space, so declare it as such to ensure that the "pci_map_bar"
function used by some PCI drivers is behaving properly. This fixes the
EHCI PCI driver initialization on Stumpy.

This was tested as follows:

Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on
bus 1, and empty busses 2 through 5. This matches the bridges
reported on bus 0 and the PCI configuration output from coreboot.

Signed-off-by: Gabe Black 
Signed-off-by: Vincent Palatin 
Signed-off-by: Stefan Reinauer 
Signed-off-by: Simon Glass 
---

 arch/x86/cpu/coreboot/pci.c |   26 +++---
 1 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index 0ddc975..8f94167 100644
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -31,15 +31,35 @@
 
 static struct pci_controller coreboot_hose;
 
+static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
+ struct pci_config_table *table)
+{
+   u8 secondary;
+   hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
+   hose->last_busno = max(hose->last_busno, secondary);
+   pci_hose_scan_bus(hose, secondary);
+}
+
+static struct pci_config_table pci_coreboot_config_table[] = {
+   /* vendor, device, class, bus, dev, func */
+   { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI,
+   PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge },
+   {}
+};
+
 void pci_init_board(void)
 {
+   coreboot_hose.config_table = pci_coreboot_config_table;
coreboot_hose.first_busno = 0;
-   coreboot_hose.last_busno = 0xff;
-   coreboot_hose.region_count = 0;
+   coreboot_hose.last_busno = 0;
+
+   pci_set_region(coreboot_hose.regions + 0, 0x0, 0x0, 0x,
+   PCI_REGION_MEM);
+   coreboot_hose.region_count = 1;
 
pci_setup_type1(&coreboot_hose);
 
pci_register_hose(&coreboot_hose);
 
-   coreboot_hose.last_busno = pci_hose_scan(&coreboot_hose);
+   pci_hose_scan(&coreboot_hose);
 }
-- 
1.7.7.3

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Re: [U-Boot] [PATCH] disk: initialize name/part fields when returning a whole disk

[Benoît Thébaudeau]

On Wednesday, October 10, 2012 7:57:51 PM, Stephen Warren wrote:
> When get_device_and_partition() finds a disk without a partition
> table,
> under some conditions, it "returns" a disk_partition_t that describes
> the entire raw disk. Make sure to initialize all fields in the
> partition
> descriptor in that case.
> 
> The value chosen for name is just some arbitrary descriptive string.
> 
> The value chosen for info matches the check at the end of
> get_device_and_partition(). However, it's probably not that
> important;
> it's not obvious that the value is really used.
> 
> Reported-by: Benoît Thébaudeau 
> Signed-off-by: Stephen Warren 
> ---
> Tom, this is technically a bug, so putting in the release might make
> sense, although I doubt it has much practical impact, so deferring it
> into u-boot/next would probably be just as good.
> 
>  disk/part.c |2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
> 
> diff --git a/disk/part.c b/disk/part.c
> index a0c77dd..8ba3cde 100644
> --- a/disk/part.c
> +++ b/disk/part.c
> @@ -561,6 +561,8 @@ int get_device_and_partition(const char *ifname,
> const char *dev_part_str,
>   info->size = (*dev_desc)->lba;
>   info->blksz = (*dev_desc)->blksz;
>   info->bootable = 0;
> + strcpy((char *)info->type, BOOT_PART_TYPE);
> + strcpy((char *)info->name, "Whole Disk");
>  #ifdef CONFIG_PARTITION_UUIDS
>   info->uuid[0] = 0;
>  #endif

Reviewed-by: Benoît Thébaudeau 

Best regards,
Benoît
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Re: [U-Boot] [PATCH V3 4/4] FAT: implement fat_set_blk_dev(), convert cmd_fat.c

[Benoît Thébaudeau]

On Wednesday, October 10, 2012 8:14:02 PM, Stephen Warren wrote:
> This makes the FAT filesystem API more consistent with other
> block-based
> filesystems. If in the future standard multi-filesystem commands such
> as
> "ls" or "load" are implemented, having FAT work the same way as other
> filesystems will be necessary.
> 
> Convert cmd_fat.c to the new API, so the code looks more like other
> files
> implementing the same commands for other filesystems.
> 
> Signed-off-by: Stephen Warren 
> ---
> v3: Rebase on new fat.c cleanup patch.
> v2: Fix inverted test of get_partition_info() result in
> fat_register_device().
> ---
>  common/cmd_fat.c |8 +++---
>  fs/fat/fat.c |   69
>  +-
>  include/fat.h|1 +
>  3 files changed, 37 insertions(+), 41 deletions(-)
> 
> diff --git a/common/cmd_fat.c b/common/cmd_fat.c
> index 5a5698b..c38302d 100644
> --- a/common/cmd_fat.c
> +++ b/common/cmd_fat.c
> @@ -55,7 +55,7 @@ int do_fat_fsload (cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[])
>   return 1;
>  
>   dev = dev_desc->dev;
> - if (fat_register_device(dev_desc,part)!=0) {
> + if (fat_set_blk_dev(dev_desc, &info) != 0) {
>   printf("\n** Unable to use %s %d:%d for fatload **\n",
>   argv[1], dev, part);
>   return 1;
> @@ -111,7 +111,7 @@ int do_fat_ls (cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[])
>   return 1;
>  
>   dev = dev_desc->dev;
> - if (fat_register_device(dev_desc,part)!=0) {
> + if (fat_set_blk_dev(dev_desc, &info) != 0) {
>   printf("\n** Unable to use %s %d:%d for fatls **\n",
>   argv[1], dev, part);
>   return 1;
> @@ -149,7 +149,7 @@ int do_fat_fsinfo (cmd_tbl_t *cmdtp, int flag,
> int argc, char * const argv[])
>   return 1;
>  
>   dev = dev_desc->dev;
> - if (fat_register_device(dev_desc,part)!=0) {
> + if (fat_set_blk_dev(dev_desc, &info) != 0) {
>   printf("\n** Unable to use %s %d:%d for fatinfo **\n",
>   argv[1], dev, part);
>   return 1;
> @@ -185,7 +185,7 @@ static int do_fat_fswrite(cmd_tbl_t *cmdtp, int
> flag,
>  
>   dev = dev_desc->dev;
>  
> - if (fat_register_device(dev_desc, part) != 0) {
> + if (fat_set_blk_dev(dev_desc, &info) != 0) {
>   printf("\n** Unable to use %s %d:%d for fatwrite **\n",
>   argv[1], dev, part);
>   return 1;
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> index 2863c4b..a6fc07c 100644
> --- a/fs/fat/fat.c
> +++ b/fs/fat/fat.c
> @@ -61,46 +61,12 @@ static int disk_read(__u32 block, __u32
> nr_blocks, void *buf)
>   cur_part_info.start + block, nr_blocks, buf);
>  }
>  
> -int fat_register_device(block_dev_desc_t * dev_desc, int part_no)
> +int fat_set_blk_dev(block_dev_desc_t *dev_desc, disk_partition_t
> *info)
>  {
>   ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
>  
> - /* First close any currently found FAT filesystem */
> - cur_dev = NULL;
> -
> -#if (defined(CONFIG_CMD_IDE) || \
> - defined(CONFIG_CMD_SATA) || \
> - defined(CONFIG_CMD_SCSI) || \
> - defined(CONFIG_CMD_USB) || \
> - defined(CONFIG_MMC) || \
> - defined(CONFIG_SYSTEMACE) )
> -
> - /* Read the partition table, if present */
> - if (!get_partition_info(dev_desc, part_no, &cur_part_info)) {
> - cur_dev = dev_desc;
> - }
> -#endif
> -
> - /* Otherwise it might be a superfloppy (whole-disk FAT filesystem)
> */
> - if (!cur_dev) {
> - if (part_no != 0) {
> - printf("** Partition %d not valid on device %d **\n",
> - part_no, dev_desc->dev);
> - return -1;
> - }
> -
> - cur_dev = dev_desc;
> - cur_part_info.part = 0;
> - cur_part_info.start = 0;
> - cur_part_info.size = dev_desc->lba;
> - cur_part_info.blksz = dev_desc->blksz;
> - cur_part_info.name[0] = 0;
> - cur_part_info.type[0] = 0;
> - cur_part_info.bootable = 0;
> -#ifdef CONFIG_PARTITION_UUIDS
> - cur_part_info.uuid[0] = 0;
> -#endif
> - }
> + cur_dev = dev_desc;
> + cur_part_info = *info;
>  
>   /* Make sure it has a valid FAT header */
>   if (disk_read(0, 1, buffer) != 1) {
> @@ -124,6 +90,35 @@ int fat_register_device(block_dev_desc_t *
> dev_desc, int part_no)
>   return -1;
>  }
>  
> +int fat_register_device(block_dev_desc_t *dev_desc, int part_no)
> +{
> + disk_partition_t info;
> +
> + /* First close any currently found FAT filesystem */
> + cur_dev = NULL;
> +
> + /* Read the partition table, if present */
> + if (get_partition_info(dev_desc, part_no, &info)) {
> + if (part_no != 0) {
> + print

[U-Boot] [PATCH v2 09/10] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE

[Simon Glass]

Coreboot boards have an LPC TPM connected, so enable this. We also need
to skip the reset code.

Signed-off-by: Simon Glass 
---

 include/configs/coreboot.h |6 +-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 2c65d74..75db176 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -37,7 +37,7 @@
 #define CONFIG_SYS_COREBOOT
 #undef CONFIG_SHOW_BOOT_PROGRESS
 #define CONFIG_LAST_STAGE_INIT
-
+#define CONFIG_NO_RESET_CODE
 
 /*---
  * Watchdog Configuration
@@ -45,6 +45,10 @@
 #undef CONFIG_WATCHDOG
 #undef CONFIG_HW_WATCHDOG
 
+/* Generic TPM interfaced through LPC bus */
+#define CONFIG_GENERIC_LPC_TPM
+#define CONFIG_TPM_TIS_BASE_ADDRESS0xfed4
+
 /*---
  * Real Time Clock Configuration
  */
-- 
1.7.7.3

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[U-Boot] [PATCH v2 01/10] x86: Change board baud_rate to ulong

[Simon Glass]

This is a ulong for some architectures and just unsigned for others.
Change x86 to be consistent.

Signed-off-by: Simon Glass 
---

 arch/x86/include/asm/u-boot.h |2 +-
 common/cmd_bdinfo.c   |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h
index da667c5..0671b8d 100644
--- a/arch/x86/include/asm/u-boot.h
+++ b/arch/x86/include/asm/u-boot.h
@@ -48,7 +48,7 @@ typedef struct bd_info {
unsigned short  bi_ethspeed;/* Ethernet speed in Mbps */
unsigned long   bi_intfreq; /* Internal Freq, in MHz */
unsigned long   bi_busfreq; /* Bus Freq, in MHz */
-   unsigned intbi_baudrate;/* Console Baudrate */
+   unsigned long   bi_baudrate;/* Console Baudrate */
unsigned long   bi_boot_params; /* where this board expects params */
struct  /* RAM configuration */
{
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 23bd8a5..9bc0ebc 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -439,7 +439,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
printf("ip_addr = %s\n", getenv("ipaddr"));
print_mhz("ethspeed",   bd->bi_ethspeed);
 #endif
-   printf("baudrate= %d bps\n", bd->bi_baudrate);
+   printf("baudrate= %ld bps\n", bd->bi_baudrate);
 
return 0;
 }
-- 
1.7.7.3

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Re: [U-Boot] U-Boot git usage model

[Stephen Warren]

On 10/10/2012 04:02 PM, Scott Wood wrote:
...
> Ideally once a pull request happens the pull happens quickly.  If that
> doesn't happen, you could reply to the pull request asking that it be
> ignored in favor of a new pull request, or create a new temporary
> branch.  IMHO pull requests ought to request a pull of a specific SHA1
> along with the branch name (it'd be nice if the command to pull could
> verify that the SHA1 is in the history of the branch name, and include
> the branch name in the commit message, but merge based on the SHA1).

I believe that's (part of) why Linux is tending towards pull requests of
a (signed) tag rather than a branch, since the tag always points at a
specific commit, and incremental pull requests can just create a new tag
name. Of course, the ability to sign tags also also a motivator.
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[U-Boot] [PATCH v2 10/10] x86: Remove coreboot start16 code

[Simon Glass]

Now that coreboot doesn't need the start16 code, remove it.

Signed-off-by: Simon Glass 
---
Changes in v2:
- Add new patch to remove coreboot start16 code.

 board/chromebook-x86/coreboot/coreboot_start16.S |   13 -
 1 files changed, 0 insertions(+), 13 deletions(-)

diff --git a/board/chromebook-x86/coreboot/coreboot_start16.S 
b/board/chromebook-x86/coreboot/coreboot_start16.S
index 9ad06df..6b3d92d 100644
--- a/board/chromebook-x86/coreboot/coreboot_start16.S
+++ b/board/chromebook-x86/coreboot/coreboot_start16.S
@@ -22,19 +22,6 @@
  * MA 02111-1307 USA
  */
 
-/*
- * 16bit initialization code.
- * This code have to map the area of the boot flash
- * that is used by U-boot to its final destination.
- */
-
-.text
-.section .start16, "ax"
-.code16
-.globl board_init16
-board_init16:
-   jmp board_init16_ret
-
 .section .bios, "ax"
 .code16
 .globl realmode_reset
-- 
1.7.7.3

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[U-Boot] [PATCH v2 03/10] x86: Allow excluding reset vector code from u-boot

[Simon Glass]

From: Gabe Black 

When running from coreboot we don't want this code.

This version works by ifdef-ing out all of the code that would go
into those sections and all the code that refers to it. The sections are
then empty, and the linker will either leave them empty for the loader
to ignore or remove them entirely.

Signed-off-by: Gabe Black 
Signed-off-by: Simon Glass 
---
Changes in v2:
- Put CONFIG_NO_RESET_CODE into Makefile instead of source files

 Makefile|7 +--
 arch/x86/cpu/Makefile   |5 -
 arch/x86/cpu/u-boot.lds |3 +++
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 34d9075..6c2f357 100644
--- a/Makefile
+++ b/Makefile
@@ -212,9 +212,12 @@ endif
 # U-Boot objectsorder is important (i.e. start must be first)
 
 OBJS  = $(CPUDIR)/start.o
+OBJS  = $(CPUDIR)/start.o
 ifeq ($(CPU),x86)
-OBJS += $(CPUDIR)/start16.o
-OBJS += $(CPUDIR)/resetvec.o
+   ifneq ($(CONFIG_NO_RESET_CODE),y)
+   OBJS += $(CPUDIR)/start16.o
+   OBJS += $(CPUDIR)/resetvec.o
+   endif
 endif
 ifeq ($(CPU),ppc4xx)
 OBJS += $(CPUDIR)/resetvec.o
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 7f1fc18..1eb70a7 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -28,7 +28,10 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(CPU).o
 
-START  = start.o start16.o resetvec.o
+START  = start.o
+ifneq ($(CONFIG_NO_RESET_CODE),y)
+START  += resetvec.o start16.o
+endif
 COBJS  = interrupts.o cpu.o
 
 SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index fe28030..2a90a01 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -85,6 +85,8 @@ SECTIONS
__bios_start = LOADADDR(.bios);
__bios_size = SIZEOF(.bios);
 
+#ifndef CONFIG_NO_RESET_CODE
+
/*
 * The following expressions place the 16-bit Real-Mode code and
 * Reset Vector at the end of the Flash ROM
@@ -94,4 +96,5 @@ SECTIONS
 
. = RESET_VEC_LOC;
.resetvec : AT (CONFIG_SYS_TEXT_BASE + (CONFIG_SYS_MONITOR_LEN - 
RESET_SEG_SIZE + RESET_VEC_LOC)) { KEEP(*(.resetvec)); }
+#endif
 }
-- 
1.7.7.3

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Re: [U-Boot] [PATCH v2 09/10] x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE

[Marek Vasut]

Dear Graeme Russ,

> Hi Simon,
> 
> On Thu, Oct 11, 2012 at 10:13 AM, Simon Glass  wrote:
> > Coreboot boards have an LPC TPM connected, so enable this. We also need
> > to skip the reset code.
> > 
> > Signed-off-by: Simon Glass 
> > ---
> > 
> >  include/configs/coreboot.h |6 +-
> >  1 files changed, 5 insertions(+), 1 deletions(-)
> > 
> > diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
> > index 2c65d74..75db176 100644
> > --- a/include/configs/coreboot.h
> > +++ b/include/configs/coreboot.h
> > @@ -37,7 +37,7 @@
> > 
> >  #define CONFIG_SYS_COREBOOT
> >  #undef CONFIG_SHOW_BOOT_PROGRESS
> >  #define CONFIG_LAST_STAGE_INIT
> > 
> > -
> > +#define CONFIG_NO_RESET_CODE
> > 
> >  /*--
> >  -
> >  
> >   * Watchdog Configuration
> > 
> > @@ -45,6 +45,10 @@
> > 
> >  #undef CONFIG_WATCHDOG
> >  #undef CONFIG_HW_WATCHDOG
> > 
> > +/* Generic TPM interfaced through LPC bus */
> > +#define CONFIG_GENERIC_LPC_TPM
> > +#define CONFIG_TPM_TIS_BASE_ADDRESS0xfed4
> > +
> > 
> >  /*--
> >  -
> >  
> >   * Real Time Clock Configuration
> >   */
> > 
> > --
> > 1.7.7.3
> 
> Acked-by: Graeme Russ 

Well, spliting it into two patches -- since each hunk does something else -- 
won't hurt. But I think it doesn't matter.

Best regards,
Marek Vasut
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Re: [U-Boot] U-Boot git usage model

[Stephen Warren]

On 10/09/2012 06:20 PM, Scott Wood wrote:
> On 10/09/2012 06:25:47 PM, Stephen Warren wrote:
>> On 10/09/2012 05:00 PM, Scott Wood wrote:
>> > On 10/09/2012 05:14:23 PM, Stephen Warren wrote:
>> >> I don't quite follow that; linux-next is also purely merge-based. Are
>> >> you referring to the fact that it's re-created every day, and the
>> >> source branches that go into the merge can be rebased if needed?
>> >
>> > What's the difference between "re-created every day" and "rebased every
>> > day"?
>>
>> The linux-next model (and what I mean by "re-created every day") is
>> roughly the following approximately daily:
>>
>> git fetch --all
>> git branch -D tmp
>> git checkout -b tmp u-boot/master # or latest rc in fact
>> git merge u-boot-arm/next
>> git merge u-boot-i2c/next
>> git merge u-boot-video/next
>> etc.
>> git tag next-${datestamp}
>>
>> I'm not sure what "rebased every day means"; perhaps it's running the
>> following on u-boot/next every day?
>>
>> git rebase u-boot/master
>>
>> That doesn't pull in any new commits from child trees though.
> 
> By "rebasing" I was referring to rewriting history in any form.  It
> looks like the difference is that linux-next gives the result a new name
> each time, instead of working a branch with a fixed name.

It's not really re-writing history though, just an issue with how you
name the history. I guess that's nit-picking to a slight degree, but
with git the two are pretty decoupled whereas with many historical
systems they aren't.

Do note that linux-next doesn't become the next Linux kernel version
either; it's just a preview of the merges Linus will do. Linus re-does
all the merges based on the pull requests people actually send him. So,
the model is very different to u-boot/next.

>> > How does merging back down prevent incremental pull requests?
>>
>> It doesn't prevent incremental pull requests, but it does pollute the
>> history if you merge back down. Instead of a fairly simple:
>>
>> (M* == main branch, B* == side branch)
>>
>> B1-B2-B3-B4-B5-B6
>>/   \\
>> M1-M2-M3-M4-M4-M5-M6-M7
>>
>> you might end up with:
>>
>> B1-B2-B3-B4-X1-B6
>>/   \/\
>> M1-M2-M3-M4-M4-M5-M6-M7
>>
>> ... where X1 is the merge back from main to the side-branch. That
>> doesn't look a lot more complex, but once there are many side-branches,
>> and the master branch ends up merging a whole bunch of side-branches
>> between M4 and M5 above, the commits in B* that add actual new work are
>> split between a point before the X1 merge-back and after it. This can
>> make tracking down what exactly will get merged into M* when B* is
>> re-merged a bit trickier. git log M..B can probably show it fine, but if
>> you start looking at gitk it'll look quite complex.
> 
> I don't use gitk much, but wouldn't it just show the mergeback as
> another edge in the graph (plus the merge commit itself of course)?  It
> doesn't seem like a big deal.

One big problem is the ability to look back and see easily what's been
merged and what work has been committed since then.

If I run "git log u-boot-xxx/master", and look backwards through the
list of commits, looking for those committed by the owner of u-boot-xxx,
and stop when I see a commit by someone else, I'll end up stopping at
the merge commit where u-boot/master was merged back down. If there
commits to u-boot-xxx/master between the point where u-boot/master
merged u-boot-xxx/master and where u-boot-xxx/master merged
u-boot/master back down, then they'll be hidden before that merge point.

Now, I probably could just do git log u-boot/master..u-boot-xxx/master,
but that's a but more complicated (and I can never remember which order
to give the two branches).

If there were no merge-downs, a simple "git log" would be much more
easily interpretable.

>> >> >> Or often when u-boot/master has made a complete new release
>> >> >> does:
>> >> >>
>> >> >> b) Creates a new branch based on the latest rc or release from
>> >> >> u-boot/master.
>> >
>> > That's a rebase.  How is that better than a (likely fast-forward)
>> merge?
>>
>> No, that's not a rebase.
> 
> Fine, a reset.  Or a new branch name, which in practice is the same
> thing except with a much more cluttered branch list, unless you have a
> specific need to refer to an older iteration of this process.
> 
>> Rebase is when you take some existing commits
>> based on one commit and apply them to a different baseline commit
>> instead. If you're creating a new branch to take commits for a new
>> release, you're simply not applying the commits for release N+1 until
>> there's a branch ready to take them.
> 
> There is a branch ready to take them -- the custodian tree.  Why wait
> until there's an upstream tree ready to pull?

Well, the two possibilities are:

a) Send pull request
b) Wait for pull request to be merged
c) Here, or later, merge back down u-boot/master. Note this cannot
happen before (b) has completed, or the merge of this branch upstream
may pick 

[U-Boot] [PATCH v2 04/10] x86: Add some missing includes.

[Simon Glass]

From: Gabe Black 

I suspect these includes were usually available because something else
included them earlier or because they were brought in transitively.

Signed-off-by: Gabe Black 
Signed-off-by: Simon Glass 
---

 arch/x86/include/asm/global_data.h |2 ++
 arch/x86/include/asm/u-boot.h  |3 +++
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index 6d29c0b..3c79508 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -33,6 +33,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include 
+
 typedefstruct global_data {
/* NOTE: gd_addr MUST be first member of struct global_data! */
unsigned long   gd_addr;/* Location of Global Data */
diff --git a/arch/x86/include/asm/u-boot.h b/arch/x86/include/asm/u-boot.h
index 0671b8d..e2ba845 100644
--- a/arch/x86/include/asm/u-boot.h
+++ b/arch/x86/include/asm/u-boot.h
@@ -36,6 +36,9 @@
 #ifndef _U_BOOT_H_
 #define _U_BOOT_H_ 1
 
+#include 
+#include 
+
 typedef struct bd_info {
unsigned long   bi_memstart;/* start of DRAM memory */
phys_size_t bi_memsize; /* size  of DRAM memory in bytes */
-- 
1.7.7.3

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Re: [U-Boot] [PATCH 2/5] EXYNOS: Add Exynos4 I2C spacing

[Joonyoung Shim]

Hi, Protr.

2012/9/24 Piotr Wilczek :
> This patch add the spacing for i2c for Exynos4
>
> Signed-off-by: Piotr Wilczek 
> Signed-off-by: Kyungmin Park 
> CC: Minkyu Kang 
> ---
>  arch/arm/include/asm/arch-exynos/cpu.h |2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
> b/arch/arm/include/asm/arch-exynos/cpu.h
> index 5056b37..b70273c 100644
> --- a/arch/arm/include/asm/arch-exynos/cpu.h
> +++ b/arch/arm/include/asm/arch-exynos/cpu.h
> @@ -28,6 +28,8 @@
>  #define EXYNOS4_ADDR_BASE  0x1000
>
>  /* EXYNOS4 */
> +#define EXYNOS4_I2C_SPACING0x1
> +

Also EXYNOS5_I2C_SPACING is 0x1, so how about define just
EXYNOS_I2C_SPACING for both EXYNOS4 and EXYNOS5?

>  #define EXYNOS4_GPIO_PART3_BASE0x0386
>  #define EXYNOS4_PRO_ID 0x1000
>  #define EXYNOS4_SYSREG_BASE0x1001
> --
> 1.7.5.4
>
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Re: [U-Boot] I2C on mx25

[Fabio Estevam]

On Wed, Oct 10, 2012 at 6:50 PM, Fabio Estevam  wrote:
> Hi,
>
> Has anyone managed to get i2c to work on mx25?
>
> I am using the latest u-boot.imx tree and I noticed that "i2c_write"
> always returns error.

Ok, i2c_write does work now. This recent commit fixed it:

commit b1e9e9ef71e6a33c3cc675a18be48929d4a8479f
Author: Matthias Weisser 
Date:   Mon Sep 24 02:46:53 2012 +

imx: Use MXC_I2C_CLK in imx i2c driver

i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
MXC_I2C_CLK on all imx systems using i2c.

Signed-off-by: Matthias Weisser 
Acked-by: Stefano Babic 

This allows me to write to the PMIC and I can turn on the power supply
for the FEC.

Still not able to get FEC to work on mx25pdk, but it seems to be
another problem now.

Regards,

Fabio Estevam
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Re: [U-Boot] I2C on mx25

[Fabio Estevam]

On Wed, Oct 10, 2012 at 7:43 PM, Benoît Thébaudeau
 wrote:

> Or for the Eth PHY connected to the FEC?

Yes, for the DP83640 PHY connected to the FEC. The Ethernet PHY is powered now.

>
>> Still not able to get FEC to work on mx25pdk, but it seems to be
>> another problem now.
>
> FYI, the FEC works fine for me in U-Boot for another i.MX25 board using a 
> Micrel
> PHY. That required some patches for 2012.07, but they are now in 
> u-boot/master.
> There are also some i.MX25 patches in u-boot-imx/next that might help, but I
> don't think that they were needed to make FEC work. However, I haven't updated
> yet to 2012.10-rc3, so there might be a regression somewhere, or an issue with
> the PHY.

Ok, thanks. I will debug more. If you have a chance to test mx25 FEC
with 2012.10-rc3, just let me know.

Thanks,

Fabio Estevam
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