Fix following DTC warnings for all socfpga boards: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/mpuclk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/mainclk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/dbg_base_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/main_qspi_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/main_nand_sdmmc_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/main_pll/cfg_h2f_usr0_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/emac0_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/emac1_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/per_qsi_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/per_nand_mmc_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/per_base_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/periph_pll/h2f_usr1_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/sdram_pll has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/sdram_pll/ddr_dqs_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/sdram_pll/ddr_2x_dqs_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/sdram_pll/ddr_dq_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/clkmgr@ffd04000/clocks/sdram_pll/h2f_usr2_clk has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /soc/usbphy@0 has a unit name, but no reg property
Signed-off-by: Heiko Schocher <h...@denx.de> --- This warnings pop up with the DTC compiler: $ /tmp/dtc/dtc -v Version: DTC 1.4.1-gbeef80b8 This fixes the compile warnings for: https://travis-ci.org/u-boot/u-boot/jobs/122880430 see: https://travis-ci.org/hsdenx/u-boot/jobs/123238779 arch/arm/dts/skeleton.dtsi | 2 +- arch/arm/dts/socfpga.dtsi | 40 +++++++++++++------------- arch/arm/dts/socfpga_arria5_socdk.dts | 2 +- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 2 +- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 2 +- arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 +- arch/arm/dts/socfpga_cyclone5_sockit.dts | 2 +- arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +- 8 files changed, 27 insertions(+), 27 deletions(-) diff --git a/arch/arm/dts/skeleton.dtsi b/arch/arm/dts/skeleton.dtsi index b41d241..a20da0a 100644 --- a/arch/arm/dts/skeleton.dtsi +++ b/arch/arm/dts/skeleton.dtsi @@ -9,5 +9,5 @@ #size-cells = <1>; chosen { }; aliases { }; - memory { device_type = "memory"; reg = <0 0>; }; + memory@0 { device_type = "memory"; reg = <0 0>; }; }; diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index 8588221..b4196ef 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -128,7 +128,7 @@ compatible = "fixed-clock"; }; - main_pll: main_pll { + main_pll: main_pll@40 { #address-cells = <1>; #size-cells = <0>; #clock-cells = <0>; @@ -136,7 +136,7 @@ clocks = <&osc1>; reg = <0x40>; - mpuclk: mpuclk { + mpuclk: mpuclk@48 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; @@ -144,7 +144,7 @@ reg = <0x48>; }; - mainclk: mainclk { + mainclk: mainclk@4c { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; @@ -152,7 +152,7 @@ reg = <0x4C>; }; - dbg_base_clk: dbg_base_clk { + dbg_base_clk: dbg_base_clk@50 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; @@ -160,21 +160,21 @@ reg = <0x50>; }; - main_qspi_clk: main_qspi_clk { + main_qspi_clk: main_qspi_clk@54 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; reg = <0x54>; }; - main_nand_sdmmc_clk: main_nand_sdmmc_clk { + main_nand_sdmmc_clk: main_nand_sdmmc_clk@58 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; reg = <0x58>; }; - cfg_h2f_usr0_clk: cfg_h2f_usr0_clk { + cfg_h2f_usr0_clk: cfg_h2f_usr0_clk@5c { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; @@ -182,7 +182,7 @@ }; }; - periph_pll: periph_pll { + periph_pll: periph_pll@80 { #address-cells = <1>; #size-cells = <0>; #clock-cells = <0>; @@ -190,42 +190,42 @@ clocks = <&osc1>, <&osc2>, <&f2s_periph_ref_clk>; reg = <0x80>; - emac0_clk: emac0_clk { + emac0_clk: emac0_clk@88 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; reg = <0x88>; }; - emac1_clk: emac1_clk { + emac1_clk: emac1_clk@8c { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; reg = <0x8C>; }; - per_qspi_clk: per_qsi_clk { + per_qspi_clk: per_qsi_clk@90 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; reg = <0x90>; }; - per_nand_mmc_clk: per_nand_mmc_clk { + per_nand_mmc_clk: per_nand_mmc_clk@94 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; reg = <0x94>; }; - per_base_clk: per_base_clk { + per_base_clk: per_base_clk@98 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; reg = <0x98>; }; - h2f_usr1_clk: h2f_usr1_clk { + h2f_usr1_clk: h2f_usr1_clk@9c { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&periph_pll>; @@ -233,7 +233,7 @@ }; }; - sdram_pll: sdram_pll { + sdram_pll: sdram_pll@c0 { #address-cells = <1>; #size-cells = <0>; #clock-cells = <0>; @@ -241,28 +241,28 @@ clocks = <&osc1>, <&osc2>, <&f2s_sdram_ref_clk>; reg = <0xC0>; - ddr_dqs_clk: ddr_dqs_clk { + ddr_dqs_clk: ddr_dqs_clk@c8 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&sdram_pll>; reg = <0xC8>; }; - ddr_2x_dqs_clk: ddr_2x_dqs_clk { + ddr_2x_dqs_clk: ddr_2x_dqs_clk@cc { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&sdram_pll>; reg = <0xCC>; }; - ddr_dq_clk: ddr_dq_clk { + ddr_dq_clk: ddr_dq_clk@d0 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&sdram_pll>; reg = <0xD0>; }; - h2f_usr2_clk: h2f_usr2_clk { + h2f_usr2_clk: h2f_usr2_clk@d4 { #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&sdram_pll>; @@ -742,7 +742,7 @@ reg = <0xffd05000 0x1000>; }; - usbphy0: usbphy@0 { + usbphy0: usbphy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; status = "okay"; diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 9ac48a1..489b778 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -14,7 +14,7 @@ bootargs = "console=ttyS0,115200"; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index dc09bed..b8e4b1b 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -19,7 +19,7 @@ udc0 = &usb1; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts index 7d3f989..af87a73 100644 --- a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts +++ b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts @@ -19,7 +19,7 @@ udc0 = &usb1; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index da13435..fa0acc4 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -14,7 +14,7 @@ bootargs = "console=ttyS0,115200"; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts index e45c2ab..d24412e 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts @@ -19,7 +19,7 @@ udc0 = &usb1; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index 591d96c..b25e6af 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -18,7 +18,7 @@ udc0 = &usb1; }; - memory { + memory@0 { name = "memory"; device_type = "memory"; reg = <0x0 0x40000000>; /* 1GB */ -- 2.5.0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
