On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
> On Mon, 2019-05-06 at 22:20 -0700, chee.hong@intel.com wrote:
>> From: "Ang, Chee Hong"
>>
>> Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
>> for booting Linux on Stratix 10 platform.
>>
>> Ang, Chee Hong (3):
>> ARM: socfpga: stra
Hi,
On Wed, 2019-05-08 at 11:11 +0530, Jagan Teki wrote:
> (Sorry for the noice, I have missed to send two patches from v7)
>
> This is v7 resend patchset for New rk3399 boards support wrt previous
> version[1]
>
> Unfortunately initial version of creating rk3399-u-boot.dtsi and
> orangepi rk33
On Thu, 2019-05-09 at 08:59 +0200, Marek Vasut wrote:
> On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
> >
> > On Mon, 2019-05-06 at 22:20 -0700, chee.hong@intel.com wrote:
> > >
> > > From: "Ang, Chee Hong"
> > >
> > > Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
> > > for boot
As much of the watchdog system has been migrated to DM now, formalize a
deadline for migration.
Please note that the old CONFIG_HW_WATCHDOG macro should be removed
completely at some point.
Signed-off-by: Stefan Roese
Cc: Michal Simek
Cc: Simon Glass
Cc: Tom Rini
---
Makefile | 11 ++
Dear Krzysztof Kozlowski,
On 16/03/2019 02:11, Krzysztof Kozlowski wrote:
> The CONFIG_DM_I2C_COMPAT was introduced in
> include/configs/exynos5-common.h in commit 189d80166b31 ("exynos5:
> enable dm i2c") and then it propagated up to configs/arndale_defconfig.
> However since beginning the Arndal
imx-regs.h under arch-imx has no user, drop it.
Signed-off-by: Peng Fan
---
CI: https://travis-ci.org/MrVan/u-boot/builds/530082356
arch/arm/include/asm/arch-imx/imx-regs.h | 637 ---
1 file changed, 637 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-imx
Without this definition, fsl_esdhc will access reserved registers
on i.MX chips, so define ARCH_MXC to fix it.
Signed-off-by: Peng Fan
---
CI: https://travis-ci.org/MrVan/u-boot/builds/530082356
arch/arm/include/asm/arch-imx8/imx-regs.h | 2 ++
arch/arm/include/asm/arch-imx8m/imx-regs.h | 2
On 5/9/19 10:03 AM, Ang, Chee Hong wrote:
> On Thu, 2019-05-09 at 08:59 +0200, Marek Vasut wrote:
>> On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
>>>
>>> On Mon, 2019-05-06 at 22:20 -0700, chee.hong@intel.com wrote:
From: "Ang, Chee Hong"
Add "SYTEM_RESET" (cold reset) and "CPU
On 5/9/19 5:57 AM, Chee, Tien Fong wrote:
> On Wed, 2019-05-08 at 14:55 +0200, Marek Vasut wrote:
>> On 5/8/19 12:17 PM, Chee, Tien Fong wrote:
>>>
>>> On Tue, 2019-05-07 at 21:44 +0200, Marek Vasut wrote:
On 5/7/19 9:43 PM, Simon Goldschmidt wrote:
>
>
>
>
> On 07.05.
2019-05-08 16:21:43
-0400)
are available in the Git repository at:
git://git.denx.de/u-boot-amlogic.git tags/u-boot-amlogic-20190509
for you to fetch changes up to 92d911b2eedec8fee1f494ab961585e253351d4f:
mach-meson: g12a: add DWC2 peripheral mode support (2019-05-09 10:3
Lukasz, Marek,
On 07/05/2019 17:54, Lukasz Majewski wrote:
> On Tue, 7 May 2019 17:16:52 +0200
> Marek Vasut wrote:
>
>> On 5/7/19 5:11 PM, Neil Armstrong wrote:
>>> Hi Marek,
>>>
>>> On 07/05/2019 15:05, Marek Vasut wrote:
On 5/7/19 10:43 AM, Neil Armstrong wrote:
> This patchset a
Hello Heiko
On Tue, Apr 30, 2019 at 06:54:01AM +0200, Heiko Schocher wrote:
>Am 15.04.2019 um 17:32 schrieb Markus Klotzbuecher:
>> From: Markus Klotzbuecher
>
>please add a commit message.
>
>> Signed-off-by: Markus Klotzbuecher
>> Cc: Heiko Schocher
>> Cc: Kyungmin Park
>> ---
>> env/Kcon
On 07.05.19 16:43, Niel Fourie wrote:
> Hi Tom,
>
> On 5/7/19 3:19 PM, Tom Rini wrote:
>> On Tue, May 07, 2019 at 11:39:12AM +0200, Niel Fourie wrote:
>>> Hi Tom,
>>>
>>> On 5/6/19 7:24 PM, Tom Rini wrote:
On Mon, May 06, 2019 at 06:44:48PM +0200, Niel Fourie wrote:
> Hi Tom,
>
>
Hi Tom,
Please pull some riscv updates:
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
https://travis-ci.org/rickchen36/u-boot-riscv/builds/530082266
Thanks
Rick
The following changes since commit 504bf790d
On 03.05.19 08:42, Stefan Roese wrote:
This patch enables CONFIG_BLK and some DM enabled drivers on clearfog
to remove these compile warnings:
= WARNING ==
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019
On 03.05.19 08:42, Stefan Roese wrote:
This patch enables CONFIG_BLK to remove this compile warning:
= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the dead
On 07.05.19 19:35, Luka Kovacic wrote:
CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and
like some of the other similar boards requires bin_hdr.
bin_hdr (DDR3 init stage) is currently retrieved from the stock
bootloader and compiled into the kwb image.
Adds support for U-Boot,
On 08.05.19 16:47, Baruch Siach wrote:
This allows SPL to load the main U-Boot image from MMC once DM_MMC is
enabled.
Signed-off-by: Baruch Siach
Applied to u-boot-marvell/master.
Thanks,
Stefan
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On 03.05.19 08:42, Stefan Roese wrote:
This patch enables CONFIG_BLK and some DM enabled drivers on
db-88f6820-gp to remove these compile warnings:
= WARNING ==
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the
Hi Tom,
please pull the following Marvell related patches:
- DM updates for multiple MVEBU boards (Stefan)
- Add CRS305-1G-4S board (Luka)
- Enable MMC in SPL on clearfog (Baruch)
---
Hi Tom,
Please ignore this pull and I'm going to send v2 of PULL with drop
some board support for it does not have available SPL now.
Thanks,
- Kever
On 05/09/2019 09:17 AM, Kever Yang wrote:
> Hi Tom,
>
> Here is the second batch of changes for the Rockchip side of the repository.
>
> Clean
> -Original Message-
> From: Jagan Teki
> Sent: 2019年5月6日 15:03
> To: Chuanhua Han
> Cc: Jagan Teki ; Wolfgang Denk ;
> Shengzhou Liu ; Ruchika Gupta
> ; U-Boot-Denx ; Jiafei Pan
> ; Yinbo Zhu
> Subject: Re: [EXT] Re: [U-Boot] [PATCH 2/5] dm: spi: Convert Freescale ESPI
> driver to dri
Hi Simon,
On 05/09/2019 11:52 AM, Simon Glass wrote:
> Hi,
>
> On Fri, 5 Apr 2019 at 05:43, Christoph Müllner
> wrote:
>> Hi Simon,
>>
>> any plans to get this merged?
> Yes, Kever should do it.
OK, I will take this.
I didn't notice this before you send this patch, it does not in rockchip
relat
Here is the v2 of second batch of changes for the Rockchip repository.
Drop support for rk3399 neo4, rockpro64, rock-pi boards support since v1.
Clean bill-of-health in Travis-CI at
https://travis-ci.org/keveryang/u-boot/builds/529695743
And I have test on all evb of Rockchip SoCs.
Thanks,
- Ke
Hi Paul,
On Thu, May 9, 2019 at 12:38 PM Paul Kocialkowski
wrote:
>
> Hi,
>
> On Wed, 2019-05-08 at 11:11 +0530, Jagan Teki wrote:
> > (Sorry for the noice, I have missed to send two patches from v7)
> >
> > This is v7 resend patchset for New rk3399 boards support wrt previous
> > version[1]
> >
Hi Christoph,
Could you re-send this patch with re-base on top of master,
because there is a conflict when I try to merge it.
Thanks,
- Kever
On 05/09/2019 11:52 AM, Simon Glass wrote:
> Hi,
>
> On Fri, 5 Apr 2019 at 05:43, Christoph Müllner
> wrote:
>> Hi Simon,
>>
>> any plans to get thi
Hi Christoph,
Could you re-send this patch with re-base on top of master,
because there is a conflict when I try to merge it.
Thanks,
- Kever
On 05/09/2019 11:52 AM, Simon Glass wrote:
> Hi,
>
> On Fri, 5 Apr 2019 at 05:43, Christoph Müllner
> wrote:
>> Hi Simon,
>>
>> any plans to get thi
Enable TPL for OrangePI rk3399 board.
Signed-off-by: Jagan Teki
---
configs/orangepi-rk3399_defconfig | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/configs/orangepi-rk3399_defconfig
b/configs/orangepi-rk3399_defconfig
index 3f02c89983..90021bb695 100644
--- a/config
Enable TPL for NanoPC T4, NanoPI M4 boards.
Signed-off-by: Jagan Teki
---
configs/nanopc-t4-rk3399_defconfig | 7 ---
configs/nanopi-m4-rk3399_defconfig | 7 ---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/configs/nanopc-t4-rk3399_defconfig
b/configs/nanopc-t4-rk3399_
This patch add documentation for TPL build and flashing steps
for rk3399 boards.
Add full boot log for future reference.
Signed-off-by: Jagan Teki
---
doc/README.rockchip | 51 -
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/doc/README
On Thu, May 9, 2019 at 5:33 AM Peng Fan wrote:
>
> imx-regs.h under arch-imx has no user, drop it.
>
> Signed-off-by: Peng Fan
Reviewed-by: Fabio Estevam
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On Thu, May 9, 2019 at 5:33 AM Peng Fan wrote:
>
> Without this definition, fsl_esdhc will access reserved registers
> on i.MX chips, so define ARCH_MXC to fix it.
>
> Signed-off-by: Peng Fan
Reviewed-by: Fabio Estevam
___
U-Boot mailing list
U-Boot@l
Hello Markus,
Am 09.05.2019 um 10:59 schrieb Markus Klotzbuecher:
Hello Heiko
On Tue, Apr 30, 2019 at 06:54:01AM +0200, Heiko Schocher wrote:
Am 15.04.2019 um 17:32 schrieb Markus Klotzbuecher:
From: Markus Klotzbuecher
please add a commit message.
Signed-off-by: Markus Klotzbuecher
Cc
Hello Andreas,
Am 08.05.2019 um 23:37 schrieb Andreas Dannenberg:
From: Vignesh R
K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.
Signed-off-by: Vignesh R
Signed-off-by: Andreas Dannenberg
---
drivers/i2c/Kconfig | 2 +-
1 file changed, 1 in
Hello Andreas,
Am 08.05.2019 um 23:37 schrieb Andreas Dannenberg:
From: Vignesh R
There is no need for to include this header here, so drop it.
Signed-off-by: Vignesh R
---
arch/arm/include/asm/omap_i2c.h | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Heiko Schocher
bye,
Heiko
--
On Thu, May 09, 2019 at 12:15:34AM +0200, Graf, Alexander wrote:
>
> On 09.05.19 00:03, Heinrich Schuchardt wrote:
> >On 5/8/19 7:50 PM, Tom Rini wrote:
> >>On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:
> >>
> >>>The following changes since commit
> >>>44237e272f1eac3b026709
On 25/04/19, 7:07 PM, "Tom Rini" wrote:
> On Thu, Apr 25, 2019 at 01:13:24PM +, Ajay Kaher wrote:
> >
> > Tom, [PATCH v2 1/2] reviewed by 'Matthias Brugger'.
> > But no update on [Patch v2 2/2] (includes changes in include/configs/rpi.h)
>
> Since Matthias is the Pi custodian, I
Hi Ajay,
On 09/05/2019 13:26, Ajay Kaher wrote:
>
>
> On 25/04/19, 7:07 PM, "Tom Rini" wrote:
>
>> On Thu, Apr 25, 2019 at 01:13:24PM +, Ajay Kaher wrote:
>> >
>> > Tom, [PATCH v2 1/2] reviewed by 'Matthias Brugger'.
>> > But no update on [Patch v2 2/2] (includes changes in
>> incl
Hi,
On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
> Hi Paul,
>
> On Thu, May 9, 2019 at 12:38 PM Paul Kocialkowski
> wrote:
> > Hi,
> >
> > On Wed, 2019-05-08 at 11:11 +0530, Jagan Teki wrote:
> > > (Sorry for the noice, I have missed to send two patches from v7)
> > >
> > > This is v7
On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
wrote:
>
> Hi,
>
> On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
> > Hi Paul,
> >
> > On Thu, May 9, 2019 at 12:38 PM Paul Kocialkowski
> > wrote:
> > > Hi,
> > >
> > > On Wed, 2019-05-08 at 11:11 +0530, Jagan Teki wrote:
> > > > (Sorry for
On Thu, 2019-05-09 at 18:06 +0530, Jagan Teki wrote:
> On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
> wrote:
> > Hi,
> >
> > On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
> > > Hi Paul,
> > >
> > > On Thu, May 9, 2019 at 12:38 PM Paul Kocialkowski
> > > wrote:
> > > > Hi,
> > > >
>
Jagan,
> On 09.05.2019, at 14:36, Jagan Teki wrote:
>
> On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
> mailto:paul.kocialkow...@bootlin.com>> wrote:
>>
>> Hi,
>>
>> On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
>>> Hi Paul,
>>>
>>> On Thu, May 9, 2019 at 12:38 PM Paul Kocialkowski
On Thu, May 9, 2019 at 6:09 PM Paul Kocialkowski
wrote:
>
> On Thu, 2019-05-09 at 18:06 +0530, Jagan Teki wrote:
> > On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
> > wrote:
> > > Hi,
> > >
> > > On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
> > > > Hi Paul,
> > > >
> > > > On Thu, May
On 09.05.2019 02:05, Vladimir Oltean wrote:
> On 5/9/19 1:55 AM, Tom Rini wrote:
>> On Wed, May 08, 2019 at 10:52:28PM +, Vladimir Oltean wrote:
>>> On 5/9/19 1:48 AM, Tom Rini wrote:
On Wed, May 08, 2019 at 10:45:50PM +, Vladimir Oltean wrote:
> On 5/9/19 1:42 AM, Tom Rini wrote:
Hi,
On Thu, 2019-05-09 at 14:40 +0200, Philipp Tomsich wrote:
> Jagan,
>
> > On 09.05.2019, at 14:36, Jagan Teki wrote:
> >
> > On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
> > wrote:
> > > Hi,
> > >
> > > On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
> > > > Hi Paul,
> > > >
> >
Hi Philipp,
On Thu, May 9, 2019 at 6:10 PM Philipp Tomsich
wrote:
>
> Jagan,
>
> On 09.05.2019, at 14:36, Jagan Teki wrote:
>
> On Thu, May 9, 2019 at 6:01 PM Paul Kocialkowski
> wrote:
>
>
> Hi,
>
> On Thu, 2019-05-09 at 16:15 +0530, Jagan Teki wrote:
>
> Hi Paul,
>
> On Thu, May 9, 2019 at 12
On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
> Hey folks,
>
> I'm attempting, again, to see what we need to do in order to use gcc-8.x
> for U-Boot and ran into, again:
> https://patchwork.ozlabs.org/patch/920329/ which in short is that when
> using -mcpu=xscale gcc-8.x throws an odd
Acked-by: Sylvain Lemieux
On Tue, Apr 30, 2019 at 4:48 PM Vladimir Zapolskiy wrote:
>
> Hi Jagan,
>
> On 04/28/2019 11:48 PM, Jagan Teki wrote:
> > Mark LPC32XX_SSP has BROKEN, this so the resulting build shows
> > warning for broken configuration enabled and associated code
> > will remove in v
LS1046AFRWY board supports LS1046A family SoCs. This patch
add base support for this board.
Board support's 4GB ddr memory, i2c, micro-click module,microSD card,
serial console,qspi nor flash,ifc nand flash,qsgmii network interface,
usb 3.0 and serdes interface to support two x1gen3 pcie interface.
On Thu, May 09, 2019 at 12:03:38AM +0200, Heinrich Schuchardt wrote:
> On 5/8/19 7:50 PM, Tom Rini wrote:
> >On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:
> >
> >>The following changes since commit
> >>44237e272f1eac3b026709e76333a07b2d3a3523:
> >>
> >>Merge branch 'master' o
On 5/9/19 4:02 PM, Tom Rini wrote:
> On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
>
>> Hey folks,
>>
>> I'm attempting, again, to see what we need to do in order to use gcc-8.x
>> for U-Boot and ran into, again:
>> https://patchwork.ozlabs.org/patch/920329/ which in short is that when
On Thu, May 9, 2019 at 7:56 AM Marek Vasut wrote:
>
> On 5/9/19 4:02 PM, Tom Rini wrote:
> > On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
> >
> >> Hey folks,
> >>
> >> I'm attempting, again, to see what we need to do in order to use gcc-8.x
> >> for U-Boot and ran into, again:
> >> ht
On 5/9/19 5:03 PM, Vasily Khoruzhick wrote:
> On Thu, May 9, 2019 at 7:56 AM Marek Vasut wrote:
>>
>> On 5/9/19 4:02 PM, Tom Rini wrote:
>>> On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
>>>
Hey folks,
I'm attempting, again, to see what we need to do in order to use gcc-
On Thu, May 09, 2019 at 05:12:25PM +0200, Marek Vasut wrote:
> On 5/9/19 5:03 PM, Vasily Khoruzhick wrote:
> > On Thu, May 9, 2019 at 7:56 AM Marek Vasut wrote:
> >>
> >> On 5/9/19 4:02 PM, Tom Rini wrote:
> >>> On Mon, May 06, 2019 at 09:26:04AM -0400, Tom Rini wrote:
> >>>
> Hey folks,
> >>
On 5/1/19 4:51 PM, Stephen Warren wrote:
On 4/30/19 10:27 AM, Marek Vasut wrote:
On 4/30/19 5:29 PM, Stephen Warren wrote:
On 4/16/19 4:04 PM, Stephen Warren wrote:
From: Stephen Warren
Fix test_mmc_dev(), test_mmc_rescan(), test_mmc_info() not to use the
same configuration data that test_mm
On 08/05/2019 20:33, Pierre-Jean Texier wrote:
Hi Bryan,
Le 08/05/2019 à 20:14, Bryan O'Donoghue a écrit :
Reusing the loadaddr to load the boot script breaks some of the logic we
want to have around the bootscript/FIT load addresses. Making a dedicated
bootscript address allows us to differe
Configuration option CONFIG_CMD_BOOTEFI_SELFTEST is useful for the
development of the UEFI sub-system. For production it is not needed.
Remove CONFIG_CMD_BOOTEFI_SELFTEST from bcm963158_ram_defconfig.
Suggested-by: Tom Rini
Signed-off-by: Heinrich Schuchardt
---
configs/bcm963158_ram_defconfig
On Tue, May 07, 2019 at 09:04:16PM -0600, Simon Glass wrote:
> Hi Bin,
>
> On Tue, 7 May 2019 at 03:28, Bin Meng wrote:
> >
> > Hi Simon, Thierry,
> >
> > On Fri, May 3, 2019 at 12:22 AM Simon Glass wrote:
> > >
> > > Hi Thierry,
> > >
> > > On Thu, 2 May 2019 at 03:25, Thierry Reding wrote:
>
Configuration option CONFIG_CMD_BOOTEFI_SELFTEST is useful for the
development of the UEFI sub-system. For production it is not needed.
Remove CONFIG_CMD_BOOTEFI_SELFTEST from bcm968580xref_ram_defconfig.
Suggested-by: Tom Rini
Signed-off-by: Heinrich Schuchardt
---
configs/bcm968580xref_ram_d
Hello Heiko
On Thu, May 09, 2019 at 01:17:06PM +0200, Heiko Schocher wrote:
>
>Am 09.05.2019 um 10:59 schrieb Markus Klotzbuecher:
>> Hello Heiko
>>
>> On Tue, Apr 30, 2019 at 06:54:01AM +0200, Heiko Schocher wrote:
>>
>> > Am 15.04.2019 um 17:32 schrieb Markus Klotzbuecher:
>> > > From: Markus
On 5/8/19 11:52 PM, Lokesh Vutla wrote:
>
>
> On 09/05/19 3:07 AM, Andreas Dannenberg wrote:
>> The board detection scheme employed on various TI EVMs makes use of
>> SRAM scratch space to share data read from an on-board EEPROM between
>> the different bootloading stages. Map the associated defi
On 5/9/19 4:16 PM, Tom Rini wrote:
> On Thu, May 09, 2019 at 12:03:38AM +0200, Heinrich Schuchardt wrote:
>> On 5/8/19 7:50 PM, Tom Rini wrote:
>>> On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:
>>>
The following changes since commit
44237e272f1eac3b026709e76333a07b2
On Thu, May 09, 2019 at 06:05:57PM +0200, Heinrich Schuchardt wrote:
> On 5/9/19 4:16 PM, Tom Rini wrote:
> > On Thu, May 09, 2019 at 12:03:38AM +0200, Heinrich Schuchardt wrote:
> >> On 5/8/19 7:50 PM, Tom Rini wrote:
> >>> On Wed, May 08, 2019 at 07:57:57AM +0200, Heinrich Schuchardt wrote:
> >>>
Andrew,
On Thu, May 09, 2019 at 12:03:31PM -0400, Andrew F. Davis wrote:
> On 5/8/19 11:52 PM, Lokesh Vutla wrote:
> >
> >
> > On 09/05/19 3:07 AM, Andreas Dannenberg wrote:
> >> The board detection scheme employed on various TI EVMs makes use of
> >> SRAM scratch space to share data read from a
On Thu, 2019-05-09 at 08:20 +0200, Anatolij Gustschin wrote:
> On Wed, 8 May 2019 23:30:01 +
> Trent Piepho tpie...@impinj.com wrote:
> ...
> > diff --git a/board/wandboard/wandboard.c
> > b/board/wandboard/wandboard.c
> > index 69fbc8b690..9d7a94ff9d 100644
> > --- a/board/wandboard/wandboard.
This moves sysreset support for socfgpa from ad-hoc code in mach-socfpga
to a UCLASS_SYSRESET based dm driver.
A side effect is that gen5 and a10 can now select between cold and warm
reset.
Signed-off-by: Simon Goldschmidt
---
Changes in v3:
- this patch enables the new drivers and drops the ad
This adds a define for the bit in rstmgr's ctrl regiser that issues
a cold reset (we had a define for the warm reset bit only) in preparation
for a proper sysrese driver.
Signed-off-by: Simon Goldschmidt
Series changes: 2
- separate this patch to the register descriptions from the actual
sysres
This adds a UCLASS_SYSRESET sysreset driver for socfgpa stratix10.
Signed-off-by: Simon Goldschmidt
---
Changes in v3:
- moved socfpga stratix sysreset driver to extra patch
Changes in v2: None
drivers/sysreset/Kconfig| 7 ++
drivers/sysreset/Makefile | 1 +
This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.
Signed-off-by: Simon Goldschmidt
---
Changes in v3:
- moved socfpga gen5 sysreset driver to extra patch
Changes in v2: None
drivers/sysreset/Kconfig| 7
drivers/sysreset/Makefile | 1 +
drivers/sysreset
âFrom: Markus Klotzbuecher
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This fixes 3 boards that don't use CONFIG_EXTRA_ENV_SETTINGS from
socfpga_common.h. They need to enable reset manager compatibility
mode unless all peripheral drivers in Linux support reset handling.
Fixes: commit 4b2e32efa4e7 ("arm: socfpga: gen5: deassert peripheral reset by
default")
Signed-of
On Tue, Apr 30, 2019 at 11:04 AM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> Add support for CONFIG_DM_ETH to the davinci_emac driver. Optimally
> we should only support DM-enabled platforms but there are several
> non-DT boards that still use it so either we need to keep support
On 09.05.19 20:08, Simon Goldschmidt wrote:
This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.
Signed-off-by: Simon Goldschmidt
---
Changes in v3:
- moved socfpga gen5 sysreset driver to extra patch
Changes in v2: None
drivers/sysreset/Kconfig| 7
drivers/sy
On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
>
> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
> TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
> (r8a77995).
>
> Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM
>
Hello Simon,
Am 09.05.19 um 20:42 schrieb Simon Goldschmidt:
> This fixes 3 boards that don't use CONFIG_EXTRA_ENV_SETTINGS from
> socfpga_common.h. They need to enable reset manager compatibility
> mode unless all peripheral drivers in Linux support reset handling.
>
> Fixes: commit 4b2e32efa4e7
Am 09.05.2019 um 21:13 schrieb Wolfgang Grandegger:
Hello Simon,
Am 09.05.19 um 20:42 schrieb Simon Goldschmidt:
This fixes 3 boards that don't use CONFIG_EXTRA_ENV_SETTINGS from
socfpga_common.h. They need to enable reset manager compatibility
mode unless all peripheral drivers in Linux suppor
Share the code that prints out a register field with the function that
prints out the "special" fields.
There were two arrays the register dump list, one with reg number and
name, another with a pointer to the field table and the table size.
These two arrays had have each entry match what register
These are standard across gigabit phys. These mostly extend the
auto-negotiation information with gigabit fields.
Signed-off-by: Trent Piepho
---
cmd/mii.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/cmd/mii.c b/cmd/mii.c
index fcc677b
When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver. When using DM_ETH, they should come
from the device tree. However, if the device tree does not have the
properties, the driver will silent use -1. Which is entirely out of
range, programs nons
On 5/9/19 8:56 PM, Joe Hershberger wrote:
> On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
>>
>> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
>> TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
>> (r8a77995).
>>
>> Avoid setting the APSR:TDM
On Wed, Apr 17, 2019 at 4:02 AM Yinbo Zhu wrote:
>
> From: Yinbo Zhu
>
> At present the MMC subsystem maintains its own list
> of MMC devices. This cannot work with driver model
> when CONFIG_BLK is enabled, use blk_dread to
> replace previous mmc read interface,
>
> Signed-off-by: Yinbo Zhu
> -
This series converts (hopefully) all drivers used in socfpga to livetree
so that none of them references 'gd' any more (with the exception of
some a10/s10 drivers that should be fixed).
Simon Goldschmidt (6):
timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR
spi: cadence_qspi: convert to l
Convert 'altera_uart_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt
---
drivers/serial/altera_uart.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/serial/alt
The dw-apb timer does not use 'gd', so remove its declaration.
Signed-off-by: Simon Goldschmidt
---
drivers/timer/dw-apb-timer.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index cb48801af1..86312b8dc7 100644
--- a/drivers/tim
Convert 'socfpga_reset_probe' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int'.
Signed-off-by: Simon Goldschmidt
---
drivers/reset/reset-socfpga.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index
Convert 'cadence_spi_ofdata_to_platdata' to use dev_read_* functions to
read driver parameters and 'dev_read_first_subnode'/'ofnode_read_*' to
read flash (child node) parameters.
Tested on socfpga_socrates (socfpga gen5).
Signed-off-by: Simon Goldschmidt
---
drivers/spi/cadence_qspi.c | 39 +++
Convert 'gpio_dwapb_bind' to iterate over subnodes using livetree
functions (inspired from mt7621_gpio.c).
Signed-off-by: Simon Goldschmidt
---
drivers/gpio/dwapb_gpio.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/dwapb_gpio.c b/d
Convert 'dw_spi_ofdata_to_platdata' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int' and get rid of DECLARE_GLOBAL_DATA_PTR.
Signed-off-by: Simon Goldschmidt
---
drivers/spi/designware_spi.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/designw
On 5/9/19 10:18 PM, Joe Hershberger wrote:
> On Thu, May 9, 2019 at 3:01 PM Marek Vasut wrote:
>>
>> On 5/9/19 8:56 PM, Joe Hershberger wrote:
>>> On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
TX clock in
On Thu, May 9, 2019 at 3:01 PM Marek Vasut wrote:
>
> On 5/9/19 8:56 PM, Joe Hershberger wrote:
> > On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
> >>
> >> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
> >> TX clock internal delay mode isn't supported on R-Car E3 (
On Thu, May 9, 2019 at 3:24 PM Marek Vasut wrote:
>
> On 5/9/19 10:18 PM, Joe Hershberger wrote:
> > On Thu, May 9, 2019 at 3:01 PM Marek Vasut wrote:
> >>
> >> On 5/9/19 8:56 PM, Joe Hershberger wrote:
> >>> On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
>
> According to the R-Car
On 5/9/19 10:26 PM, Joe Hershberger wrote:
> On Thu, May 9, 2019 at 3:24 PM Marek Vasut wrote:
>>
>> On 5/9/19 10:18 PM, Joe Hershberger wrote:
>>> On Thu, May 9, 2019 at 3:01 PM Marek Vasut wrote:
On 5/9/19 8:56 PM, Joe Hershberger wrote:
> On Wed, May 1, 2019 at 5:36 PM Marek Vasu
On Wed, May 1, 2019 at 5:36 PM Marek Vasut wrote:
>
> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
> TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
> (r8a77995).
>
> Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM
>
On Sat, May 4, 2019 at 12:28 PM Marek Vasut wrote:
>
> Add support for RZ/A1 SoC specifics.
>
> Signed-off-by: Marek Vasut
> Cc: Chris Brandt
> Cc: Joe Hershberger
> Cc: Nobuhiro Iwamatsu
Acked-by: Joe Hershberger
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On Sat, May 4, 2019 at 12:28 PM Marek Vasut wrote:
>
> Add ifdeffery to allow operation without the clock framework
> enabled. This is required on RZ/A1, as it does not have clock
> driver yet.
>
> Signed-off-by: Marek Vasut
> Cc: Chris Brandt
> Cc: Joe Hershberger
> Cc: Nobuhiro Iwamatsu
Ack
On Wed, May 1, 2019 at 6:18 AM Horatiu Vultur
wrote:
>
> Update Luton network driver to have support also for pcb90. The pcb90
> has 24 ports from which 12 ports are connected to SerDes6G.
Can you separate this into a restructuring patch and the patch that
adds support for this device? This is a
On 5/9/19 8:42 PM, Simon Goldschmidt wrote:
[...]
> diff --git a/include/configs/socfpga_vining_fpga.h
> b/include/configs/socfpga_vining_fpga.h
> index 29a92b9146..737a304217 100644
> --- a/include/configs/socfpga_vining_fpga.h
> +++ b/include/configs/socfpga_vining_fpga.h
> @@ -145,6 +145,7 @@
On 5/9/19 8:55 PM, Simon Goldschmidt wrote:
>
>
> On 09.05.19 20:08, Simon Goldschmidt wrote:
>> This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.
>>
>> Signed-off-by: Simon Goldschmidt
>> ---
>>
>> Changes in v3:
>> - moved socfpga gen5 sysreset driver to extra patch
>>
>> Changes i
Hi Thierry,
On Thu, Apr 25, 2019 at 8:32 AM Thierry Reding wrote:
>
> On Tue, Apr 16, 2019 at 04:36:16PM +, Joe Hershberger wrote:
> > On Tue, Apr 16, 2019 at 11:21 AM Thierry Reding
> > wrote:
> > >
> > > From: Thierry Reding
> > >
> > > Implement this callback that allows the MAC address
On 5/9/19 8:08 PM, Simon Goldschmidt wrote:
> This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.
>
> Signed-off-by: Simon Goldschmidt
> ---
>
> Changes in v3:
> - moved socfpga gen5 sysreset driver to extra patch
>
> Changes in v2: None
[...]
> +static int socfpga_sysreset_request(
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