On Thu, May 9, 2019 at 3:01 PM Marek Vasut <marek.va...@gmail.com> wrote: > > On 5/9/19 8:56 PM, Joe Hershberger wrote: > > On Wed, May 1, 2019 at 5:36 PM Marek Vasut <marek.va...@gmail.com> wrote: > >> > >> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the > >> TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3 > >> (r8a77995). > >> > >> Avoid setting the APSR:TDM bit on these SoCs. Moreover, only set APSR:TDM > >> when the DT explicitly specifies RGMII ID or TXID mode instead of setting > >> it unconditionally when the PHY link speed is 1000 Mbit/s. > > > > We just ran into an issue with a very similar patch. It blocked my > > tree being merged for a few months. Finally got to the bottom of it. > > https://patchwork.ozlabs.org/patch/1096572/ > > > > Are you sure there are no boards depending on the broken DT, like the > > 335-evm was? > > I cannot be sure, but the boards which are supported and tested work > fine. If someone runs into any issue. they can raise them, and we'll > solve the problem when we come to that bridge.
The point that came up is that the DT is considered the ABI, so it shouldn't break / change behavior. Just wanted to make sure you were aware. Thanks, -Joe _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot