Hi Masahiro,
On Fri, 2014-04-18 at 20:30 +0900, Masahiro Yamada wrote:
> This patch is a review feedback against Denali NAND controller driver.
>
> http://patchwork.ozlabs.org/patch/333077/
>
> This is not applicable to the mainline.
>
> --
>
> This driver code has diverged too much from that
Hi Masahiro,
On Fri, 2014-04-18 at 20:41 +0900, Masahiro Yamada wrote:
> Hi Chin,
>
>
> I found another fatal problem in v7.
> "nand markbad" command does not work at all.
> I think write_oob_data() is buggy.
I believe I already comment that on the previous mail. In short, its
working for me a
On Tue, 2014-04-22 at 14:12 -0500, Scott Wood wrote:
> On Tue, 2014-04-22 at 10:04 +0900, Masahiro Yamada wrote:
> > Hi Scott,
> >
> >
> > > > It is really really painful to wait more than 10 seconds just for bad
> > > > block
> > > > scanning to boot Linux.
> > >
> > > Making bad block scans f
Hi Masahiro,
I am back :)
Sorry for late reply as I was aways for few weeks.
On Fri, 2014-04-18 at 20:30 +0900, Masahiro Yamada wrote:
> This patch is a review feedback against Denali NAND controller driver.
> http://patchwork.ozlabs.org/patch/333077/
>
> This is not applicable to the mainline.
From: Thomas Diener
Signed-off-by: Thomas Diener
---
arch/arm/include/asm/arch-mx25/imx-regs.h | 175 +
1 file changed, 175 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h
b/arch/arm/include/asm/arch-mx25/imx-regs.h
index a17f828..3dffa4a 1006
Commit 4a271cb1b4ff doesn't take into account that fdtdec_setup_gpio()
returns success when the gpio passed to it is FDT_GPIO_NONE (no
gpio node found in the fdtdec_decode_gpio() call). This results in
calling gpio_direction_output() on invalid gpio. For this reason
executing "usb start" command on
From: Thomas Diener
This patch adds support for the imx25 lcd display controller.
Signed-off-by: Thomas Diener
---
drivers/video/Makefile|1 +
drivers/video/imx25lcdc.c | 123 +
2 files changed, 124 insertions(+)
create mode 100644 drivers/
From: Thomas Diener
This patchset adds support for the imx25 lcd controller and support for
variants of cpu and base boards with drivers.
Thomas Diener (4):
imx25: Add new hardware registers
video: Add support for imx25 lcd controller
zmx25: Add extended support for the cpu board and belon
From: Thomas Diener
Signed-off-by: Thomas Diener
---
tools/logos/syteco.bmp | Bin 11414 -> 11414 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/tools/logos/syteco.bmp b/tools/logos/syteco.bmp
index
9a994fe3e3812bdc2d63f7045d2740d931b2a42a..14031f2c8c5eaee2e961a89b684ac3c
On 04/16/2014 08:44 AM, Masahiro Yamada wrote:
> arch/arm/include/asm/spl.h requires all SoCs to have
> arch/arm/include/asm/arch-*/spl.h.
>
> But many of them just define BOOT_DEVICE_* macros.
>
> Those macros are used in the "switch (boot_device) { ... }"
> statement in common/spl/spl.c.
>
> S
Hi Masahiro,
> This commit modifies mkconfig not to define CONFIG_SYS_ARCH,
> CONFIG_SYS_CPU, CONFIG_SYS_SOC, CONFIG_SYS_VENDOR, CONFIG_SYS_BOARD.
>
> They are still used in some board files.
> Tegra family, OMAP-Panda board, some Samsung boards.
>
> Add CONFIG_SYS_SOC, CONFIG_SYS_BOARD definiti
On Tue, Apr 15, 2014 at 11:44 PM, Masahiro Yamada
wrote:
> arch/arm/include/asm/spl.h requires all SoCs to have
> arch/arm/include/asm/arch-*/spl.h.
>
> But many of them just define BOOT_DEVICE_* macros.
>
> Those macros are used in the "switch (boot_device) { ... }"
> statement in common/spl/spl.
Hi Stefano,
Am 2014-04-17 10:50, schrieb Stefano Babic:
> On 16/04/2014 15:36, Stefan Agner wrote:
Can you better explain this ? There is only one board in mainline with
vf610. CONFIG_SYS_TEXT_BASE is set to 0x3f008000. I cannot get the
offset in your example. Are you referring to N
Enable errata A006261, A006593, A006379 for T208x.
Additionally enable CONFIG_CMD_ERRATA for T2080RDB.
Signed-off-by: Shengzhou Liu
---
based on 'next' branch of u-boot-mpc85xx.
arch/powerpc/include/asm/config_mpc85xx.h | 3 +++
include/configs/T208xRDB.h| 1 +
2 files changed,
Hello,
I would like to know what changes should I make in u-boot 2013
source code to generate hab.o file in u-boot/arch/arm/cpu/armv7/mx6
directory.
Regards
Jyoti Dubey
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In thor's download_tail() function, dfu_get_entity() is called
before each dfu_write() call and the returned entity pointers
are the same. So dfu_get_entity() can be called just once and
this patch changes this.
Signed-off-by: Przemyslaw Marczak
Cc: Lukasz Majewski
Cc: Marek Vasut
Cc: Heiko Sch
Since dfu read/write operations needs to be flushed manually,
writing to filesystem on MMC by thor was broken. MMC raw write
actually is working fine because current dfu_flush() function
writes filesystem only. This commit adds dfu_flush() to f_thor
and now filesystem write is working.
This change
Hi Rob,
> From: Rob Herring
>
> Add missing missing disconnect and unbind calls to the musb gadget
^^^ I suppose that one missing is redundant.
> driver's usb_gadget_unregister_driver function. Otherwise, any gadget
> drivers fail to uninitialize and run a 2nd time.
>
> Signed-off-by
Hi Rob,
> From: Sebastian Siewior
>
> This patch contains an implementation of the fastboot protocol on the
> device side and documentation. This is based on USB download gadget
> infrastructure. The fastboot function implements the getvar, reboot,
> download and reboot commands. What is missing
Hi Wolfgang,
On Tue, 22 Apr 2014 14:13:44 +0200
Wolfgang Denk wrote:
> Dear Masahiro,
>
> In message <1398159826-29398-2-git-send-email-yamad...@jp.panasonic.com> you
> wrote:
> > CONFIG_ENV_VARS_UBOOT_CONFIG, if defined, sets environment
> > variables, "arch", "cpu", "board", etc. depending
Adding two configs:
* CONFIG_FIT - Enable FIT image support.
* CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from
FIT image by comparing compatibles.
Signed-off-by: Akshay Saraswat
---
include/configs/exynos5-dt.h | 4
1 file changed, 4 insertions(+)
diff --
CC-ing Pekon Gupta which add those changes in commit:
6e562b1106ea6afc78752f50925e87e9dd14f8b4
On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek wrote:
> Hi,
>
> we're running 2014.04-rc3 on custom am335x board (same configuration as BBB).
> When spl is loading u-boot from nand flash we can see a l
arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.
But many of them just define BOOT_DEVICE_* macros.
Those macros are used in the "switch (boot_device) { ... }"
statement in common/spl/spl.c.
So they should not be archtecture specific, but be described as
a
Hi Przemyslaw,
> Since dfu read/write operations needs to be flushed manually,
> writing to filesystem on MMC by thor was broken. MMC raw write
> actually is working fine because current dfu_flush() function
> writes filesystem only. This commit adds dfu_flush() to f_thor
> and now filesystem writ
On Mon, Apr 21, 2014 at 11:33:07AM +0900, Masahiro Yamada wrote:
> This reverts commit a8b993eb81c142a439c24b871a2317f765fe5397.
>
> Commit a8b993eb claims it fixes u-boot.lds rule by replacing
> $(call if_changed) with $(call filechk).
>
> But the problem had already been fixed by commit 395e60
On Wednesday, April 23, 2014 at 02:40:52 PM, Lukasz Majewski wrote:
> Hi Przemyslaw,
>
> > Since dfu read/write operations needs to be flushed manually,
> > writing to filesystem on MMC by thor was broken. MMC raw write
> > actually is working fine because current dfu_flush() function
> > writes f
On Wednesday, April 23, 2014 at 01:02:13 PM, Lukasz Majewski wrote:
[...]
> > +#include
> > +
> > +#ifdef CONFIG_CMD_FASTBOOT
> > +int fastboot_add(struct usb_configuration *c);
> > +#else
> > +static int fastboot_add(struct usb_configuration *c)
> > +{
> > + return 0;
> > +}
> > +#endif
> > +
On Tuesday, April 22, 2014 at 07:23:49 PM, andrey.konova...@linaro.org wrote:
> Commit 4a271cb1b4ff doesn't take into account that fdtdec_setup_gpio()
> returns success when the gpio passed to it is FDT_GPIO_NONE (no
> gpio node found in the fdtdec_decode_gpio() call). This results in
> calling gpi
Currently, flash quad bit is set in "spi_flash_validate_params" and later
at the end in the same api, we write 0 to status register for few flashes,
thereby overriding the quad bit set. This fix moves the quad bit setting
outside this api in "spi_flash_probe_slave"
Signed-off-by: Sourav Poddar
--
This series add atmelimage support to mkimage.
An atmelimage is a quite dumb image type cause it has no real header. The file
is mostly unmodified but the 6'th ARM vector gets replaced by the image size
to load.
Heiko, I know your approach setting the vector in start.S but I think this
solution i
The new atmelimage converts a machine code BLOB to bootable ROM image. Atmel
ROM has no sophisticated image format, it only checks the first 7 ARM vectors.
The vectors can contain valid B or LDR opcodes, the 6'th vector contains the
image size to load. The image size must not exceed 64 KiB.
Signed
For sama5d3xek we need to modify the SPL image for correct detection by ROM
code.
Signed-off-by: Andreas Bießmann
---
arch/arm/cpu/armv7/at91/config.mk | 10 ++
spl/Makefile |5 +
2 files changed, 15 insertions(+)
create mode 100644 arch/arm/cpu/armv7/at9
On Mon, Apr 21, 2014 at 10:13 AM, Marek Vasut wrote:
> On Friday, April 18, 2014 at 06:14:26 PM, Wolfgang Denk wrote:
>> Dear Rob,
>>
>> In message <1397829272-22266-1-git-send-email-robherri...@gmail.com> you
> wrote:
[...]
>> ...I don't see the README in the list of modified files - but new
>>
Hi Masahiro,
On 21 April 2014 19:00, Masahiro Yamada wrote:
> Hi Simon,
>
>
> On Mon, 21 Apr 2014 15:02:20 -0600
> Simon Glass wrote:
>
>> Hi Masahiro,
>>
>> On 21 April 2014 03:39, Masahiro Yamada wrote:
>> > Prior to commit 33a02da0, all boards must have board/${BOARD}/
>> > or board/${VENDOR
On Sun, Apr 20, 2014 at 01:28:53PM +0200, Daniel Schwierzeck wrote:
> The following changes since commit b149c4c399b111cec1ff7505ca9fabbeeb4fe394:
>
> ARM:tegra20: Remove aes debug prints (2014-04-18 16:14:17 -0400)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-mi
Hi Stefan,
On 23/04/2014 04:34, Stefan Agner wrote:
>>>
>>> The header total size is 0x3fc (sizeof(imx_header_v2_t)) right now. This
>>> patch would make alter it to be exactly 0x400.
>>
>> This renforces my suspect. Making the image bigger, it seems that the
>> SOC loads more data as before.
>>
Hi Tim,
On 09/04/2014 17:46, Tim Harvey wrote:
> On Wed, Apr 9, 2014 at 7:57 AM, Nikita Kiryanov wrote:
>> Hi Tim,
>>
>>
>> On 04/03/2014 09:01 AM, Tim Harvey wrote:
>>>
>>> This is an attempt at using a macro to allow mx6dl-ddr.h and
>>> mx6q-ddr.h registers to be used together which is needed f
Hi Stefano,
Am 2014-04-23 17:19, schrieb Stefano Babic:
> Hi Stefan,
>
> On 23/04/2014 04:34, Stefan Agner wrote:
>
The header total size is 0x3fc (sizeof(imx_header_v2_t)) right now. This
patch would make alter it to be exactly 0x400.
>>>
>>> This renforces my suspect. Making t
On 23 April 2014 06:05, Akshay Saraswat wrote:
> Adding two configs:
> * CONFIG_FIT - Enable FIT image support.
> * CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from
> FIT image by comparing compatibles.
>
> Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
_
On 04/23/2014 06:03 AM, Masahiro Yamada wrote:
> On Tue, 22 Apr 2014 14:13:44 +0200
> Wolfgang Denk wrote:
>> In message <1398159826-29398-2-git-send-email-yamad...@jp.panasonic.com> you
>> wrote:
>>> CONFIG_ENV_VARS_UBOOT_CONFIG, if defined, sets environment
>>> variables, "arch", "cpu", "board"
From: Stefan Agner
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/imx-regs.h | 1 +
board/freescale/vf610tw
On 04/23/2014 06:20 AM, Masahiro Yamada wrote:
> arch/arm/include/asm/spl.h requires all SoCs to have
> arch/arm/include/asm/arch-*/spl.h.
>
> But many of them just define BOOT_DEVICE_* macros.
>
> Those macros are used in the "switch (boot_device) { ... }"
> statement in common/spl/spl.c.
>
> S
From: Rob Herring
My Calxeda email is gone, so update my email address.
Signed-off-by: Rob Herring
---
boards.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boards.cfg b/boards.cfg
index b4203f1..d6eb3ea 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -293,7 +293,7 @@ Acti
On Wednesday, April 23, 2014 at 04:36:04 PM, Rob Herring wrote:
> On Mon, Apr 21, 2014 at 10:13 AM, Marek Vasut wrote:
> > On Friday, April 18, 2014 at 06:14:26 PM, Wolfgang Denk wrote:
> >> Dear Rob,
> >>
> >> In message <1397829272-22266-1-git-send-email-robherri...@gmail.com> you
> >
> > wrot
Hi Tim, hi Nikita,
On 10/04/2014 16:08, Nikita Kiryanov wrote:
>> The cfg files are currently all written to use the IOMUX register
>> names as MX6_ (no Q vs DL) so that a single cfg file can be used for a
>> build-time configuration of IMX6Q or IMX6DL.
>
> OK now I understand. It seems to me t
On 03/04/2014 08:01, Tim Harvey wrote:
> use the new iomux function and a macro to create a multi-dimensional array
> of iomux values without duplicating the defintions.
>
> Signed-off-by: Tim Harvey
> ---
> board/gateworks/gw_ventana/gw_ventana.c | 497
>
> 1 f
Hi Tim,
On 03/04/2014 08:01, Tim Harvey wrote:
> Switch to an SPL image. The SPL for Ventana does the following:
> - setup i2c and read the factory programmed EEPROM to obtain DRAM config
>and model for board-specific calibration data
> - configure DRAM per CPU/size/layout/devices/calibratio
Hi Stefan,
On 23/04/2014 11:55, Stefan Agner wrote:
>> Have you tried to ask Freescale about this issue ? It is quite strage
>> and it seems Vybrid-related.
>
> No not yet. I need to setup an example. However, in the end they will
> not change the ROM anyway, especially not on Vybrids already del
Hello Marek,
>From: Belisko Marek [mailto:marek.beli...@gmail.com]
>
>CC-ing Pekon Gupta which add those changes in commit:
>6e562b1106ea6afc78752f50925e87e9dd14f8b4
>
>On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek
>wrote:
>> Hi,
>>
>> we're running 2014.04-rc3 on custom am335x board (same con
Fixed some copy paste typos in ECC layout below..
>From: Gupta, Pekon
>Hello Marek,
>
>>From: Belisko Marek [mailto:marek.beli...@gmail.com]
>>
>>CC-ing Pekon Gupta which add those changes in commit:
>>6e562b1106ea6afc78752f50925e87e9dd14f8b4
>>
>>On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek
This patch series should be picked above
[1] http://lists.denx.de/pipermail/u-boot/2014-April/177231.html
*changes v2 -> v3*
- dropped [PATCH] am33xx: elm: add support for BCH16_ECC - ELM driver updates
re-using existing code in omap_elm.c
- rebased and refreshed above [1] and u-boot-2014.04
- D
updates documentation with explanation on how to select ECC schemes.
Signed-off-by: Pekon Gupta
---
doc/README.nand | 42 ++
1 file changed, 42 insertions(+)
diff --git a/doc/README.nand b/doc/README.nand
index 90d857e..a5d20bc 100644
--- a/doc/README.nan
This patch add support for BCH16_ECC to omap_gpmc driver.
*need to BCH16 ECC scheme*
With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes
Flash devices have become more suspectible to bit-flips. Thus stronger
ECC schemes are required for protecting the data.
But stronger
Hi Stefano,
On 04/23/2014 10:07 AM, Stefano Babic wrote:
Hi Tim, hi Nikita,
On 10/04/2014 16:08, Nikita Kiryanov wrote:
The cfg files are currently all written to use the IOMUX register
names as MX6_ (no Q vs DL) so that a single cfg file can be used for a
build-time configuration of IMX6Q o
Dear Masahiro,
In message <20140423210335.18ee.aa925...@jp.panasonic.com> you wrote:
>
> > Finally, I don't see what your replacement code would be to create the
> > set of environment settigns - and I think these are needed, as some
> > user defined scripts are processing these?
>
> The user wh
These boards have compiling error with latest change in u-boot. The image
grows and exceeds the preconfigured size. This patch only address the
compiling error. It is not verified on the boards. The affected boards are
MPC8572DS, dlvision, io, iocon, neo
Signed-off-by: York Sun
CC: Dirk Eibach
On 04/18/2014 09:04 AM, Tom Rini wrote:
> On Fri, Apr 18, 2014 at 08:38:32AM -0700, York Sun wrote:
>> On 04/18/2014 05:36 AM, Tom Rini wrote:
>>> Hey guys,
>>>
>>> Adding AES256 support to FIT images means that a handful of boards (ion,
>>> MPC8572DS, others) now don't link because of growth in th
On 04/11/2014 08:09 AM, Alexander Graf wrote:
> In QEMU we implement a PV machine type called "ppce500". That board is able
> to run any e500+ FSL cores (e500v2, e500mc, e5500, e6500).
>
> It is heavily inspired by the MPC8544DS SoC and board combination, but
> implements only the bare minimum to
On 04/08/2014 06:41 AM, Prabhakar Kushwaha wrote:
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> This patch set contains:-
>
> [PATCH 1/10] powerpc/mpc85xx: Move LAW_EN define outside of config
>
> [PATCH 2/10] powerpc/mpc85xx: Avoid hardcoding in SPL linker script
>
> [PATCH 3/10] powerp
On 03/31/2014 03:01 AM, Prabhakar Kushwaha wrote:
> It is not necessary for bootpg to be present at text + 512KB.
> With increase of u-boot size (768KB), bootpg section's address
> cannot be fixed.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
___
On 04/20/2014 10:16 PM, Prabhakar Kushwaha wrote:
> qe_init() does not use data copied from NAND. Thise code is not tested or
> complied causing compilation error during NAND boot
>
> So, remove QE firmware copy from NAND to ddr.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to u-boot-mpc
On 03/31/2014 03:01 AM, Prabhakar Kushwaha wrote:
> U-boot binary size has been increased from 512KB to 768KB.
>
> So update CONFIG_SYS_MONITOR_LEN to reflect the same.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> include/configs/B4860QDS.h |2 +-
> include/configs/BSC9131RDB.h |
On 04/20/2014 10:17 PM, Prabhakar Kushwaha wrote:
> T1042RDB_PI board does not have QE connector.
>
> So disable CONFIG_QE and CONFIG_U_QE for T1042RDB_PI
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
__
On 04/20/2014 10:17 PM, Prabhakar Kushwaha wrote:
> B4420 is a personality of B4860.
> It should have same FM1_CLK_SEK and FM1_CLK_SHIFT as B4860
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
___
U-Boot m
On 03/27/2014 05:54 PM, York Sun wrote:
> Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
> calculation and programming.
>
> Signed-off-by: York Sun
> ---
Applied to u-boot-mpc85xx/master.
York
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On 03/27/2014 05:54 PM, York Sun wrote:
> T1040QDS_D4 is a variant of T1040QDS, with additional circuit to support
> DDR4 memory.
>
> Signed-off-by: York Sun
> ---
Applied to u-boot-mpc85xx/master.
York
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h
On 02/26/2014 04:13 AM, Nikhil Badola wrote:
> Put a delay of 5 millisecond after reset so that ULPI phy
> gets enough time to come out of reset. Erratum A007075 applies
> to following SOCs and their variants, if any
> P1010 rev 1.0
> B4860 rev 1.0, 2.0
> P4080 rev 2.0, 3.0
On 03/08/2014 03:15 AM, Prabhakar Kushwaha wrote:
> The MDC generate by default value of MDIO_CLK_DIV is too high i.e. higher
> than 2.5 MHZ. It violates the IEEE specs.
>
> So Slow MDC clock to comply IEEE specs
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> Changes for v2: Update commit messag
On 03/12/2014 07:19 PM, Shengzhou Liu wrote:
> NOR flash is on CS1 instead of CS2 when NAND boot.
> So correct NOR chip selection to CS1 from CS2.
>
> Signed-off-by: Shengzhou Liu
>
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
___
U-Boot ma
On 03/31/2014 03:02 AM, Prabhakar Kushwaha wrote:
> Fix following compile warnings
> fsl_esdhc_spl.c: In function 'mmc_boot':
> fsl_esdhc_spl.c:35:10: warning: unused variable 'byte_num' [-Wunused-variable]
> fsl_esdhc_spl.c:35:7: warning: unused variable 'i' [-Wunused-variable]
> fsl_esdhc_spl.c:3
On 04/06/2014 08:16 PM, Nikhil Badola wrote:
> Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev
> 2.0.
> This decreases data burst rate with which data packets are posted from the TX
> latency FIFO to compensate for latencies in DDR pipeline during DMA.
> This avoids Tx
On 04/07/2014 10:25 PM, Priyanka Jain wrote:
> MDIO clock needs to be initialized in u-boot code for SoCs
> having FMAN-v3(v3H or v3L) controller due to below reasons
>
> -On SoCs that have FMAN-v3H like B4860, default value of
> MDIO_CLK_DIV bits in mdio_stat(mdio_cfg) register generates
> mdio
On 04/01/2014 11:28 PM, Shengzhou Liu wrote:
> We use dynamical mtdparts partition instead of directly puting
> mtd partitions nodes in device tree.
>
> Signed-off-by: Shengzhou Liu
> ---
> v2: update nand name to u64.
Applied to u-boot-mpc85xx/master, thanks.
York
___
On 04/01/2014 11:28 PM, Shengzhou Liu wrote:
> We use dynamical mtdparts partition instead of directly puting
> mtd partitions nodes in device tree.
>
> Signed-off-by: Shengzhou Liu
> ---
> v2: update nand name to u64.
>
Applied to u-boot-mpc85xx/master, thanks.
York
_
On 03/30/2014 11:16 PM, Vijay Rai wrote:
> T1040RDB, T1042RDB header files are very similar so merged into new header
> file T104xRDB.
> T104xRDB header file can support both T1040RDB and T1042RDB_PI header.
>
> Patch makes following changes
> -Update Boards.cfg file for T1040RDB and T1042RDB_PI
On 04/02/2014 04:56 AM, Prabhakar Kushwaha wrote:
> We use dynamical mtdparts partition instead of directly puting
> mtd partitions nodes in device tree.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
___
On 03/28/2014 09:57 AM, Codrin Ciubotariu wrote:
> T1040RDB and T1040QDS boards have an integrated l2 switch.
> The switch needs a MAC address for Layer 2 protocols
> (MSTP, LLDP, LACP, etc). Setting a MAC address on l2switchaddr will add
> a MAC in device-tree, under node l2switch.
>
> Signed-off
On 04/03/2014 04:20 AM, Prabhakar Kushwaha wrote:
> T1040RDB and T1042RDB_PI has CPLD. Here CPLD controls board mux/features.
>
> This support of CPLD includes
> - files and register defintion
> - Commands to swtich alternate bank and default bank
>
> Signed-off-by: Prabhakar Kushwaha
> ---
>
On 03/21/2014 01:21 AM, Zhao Qiang wrote:
> CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address.
> Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
> and CONFIG_SYS_QE_FW_ADDR for QE microcode address.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
>
On 03/21/2014 01:21 AM, Zhao Qiang wrote:
> Modify code to adapt to both u-qe and qe.
>
> U_QE is a kind of cutted QE.
> the differences between U_QE and QE
> 1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
> 2. IMMR: have different immr base addr.
> 3. iopin: U_QE d
On 03/13/2014 07:11 PM, Zhao Qiang wrote:
> add CONFIG_QE, CONFIG_U_QE and CONFIG_SYS_QE_FW_ADDR into
> "include/configs/T1040RDB.h"
>
> Signed-off-by: Zhao Qiang
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
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On 03/21/2014 01:21 AM, Zhao Qiang wrote:
> Add u-qe support for t1040qds
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and
> CONFIG_SYS_QE_FW_ADDR
> Changes for v3:
> - use CONFIG_U_QE instead of CONFIG_PPC_T10
On 03/07/2014 05:42 AM, Aneesh Bansal wrote:
> In case of secure boot from NAND, the DDR is initialized by the
> BootROM using the config words (CF_WORDS) in the CF_HEADER
> and u-boot image is copied from NAND to DDR by the BootROM.
> So, CONFIG_SYS_RAMBOOT has been defined for Secure Boot from NA
On 01/20/2014 01:27 AM, Aneesh Bansal wrote:
> The workaround for IFC errata A003399 was not enabled
> in case of secure boot. So, secure boot from NOR was not
> working.
>
> Signed-off-by: Aneesh Bansal
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
On 03/11/2014 10:51 AM, Aneesh Bansal wrote:
> ISBC creates a LAW 0 entry for non PBL platforms, which is not
> disabled before transferring the control to uboot.
> The LAW 0 entry has to be disabled.
>
> Signed-off-by: Aneesh Bansal
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
__
On 03/11/2014 11:37 AM, Aneesh Bansal wrote:
> Add NOR, SPI and SD secure boot targets for BSC9132QDS.
>
> Changes:
> - Debug TLB entry is not required for Secure Boot Target.
>
> Signed-off-by: Aneesh Bansal
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
__
On 03/18/2014 11:10 AM, Aneesh Bansal wrote:
> Changes:
> 1. L2 cache is being invalidated by Boot ROM code for e6500 core.
>So removing the invalidation from start.S
> 2. Clear the LAW and corresponding configuration for CPC. Boot ROM
>code uses it as hosekeeping area.
> 3. For Secure boot
On 03/12/2014 09:30 AM, Aneesh Bansal wrote:
> In case of secure boot from NAND, the DDR is initialized by the
> BootROM using the config words (CF_WORDS) in the CF_HEADER
> and u-boot image is copied from NAND to DDR by the BootROM.
> So, CONFIG_SYS_RAMBOOT has been defined for Secure Boot from NA
On 03/18/2014 11:10 AM, Aneesh Bansal wrote:
> Secure Boot Target is added for T4240QDS and T4160QDS
> Changes:
> For Secure boot, CPC is configured as SRAM and used as house
> keeping area which needs to be disabled.
> So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T4240QDS.
>
> Signed-off-by:
On 03/18/2014 11:11 AM, Aneesh Bansal wrote:
> Secure Boot Target is added for T1040QDS and T1040RDB
> Changes:
> For Secure boot, CPC is configured as SRAM and used as house
> keeping area which needs to be disabled.
> So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T1040QDS and
> CONFIG_T1040RDB
On 03/18/2014 11:10 AM, Aneesh Bansal wrote:
> Secure Boot Target is added for T2080QDS
> Changes:
> For Secure boot, CPC is configured as SRAM and used as house
> keeping area which needs to be disabled.
> So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080QDS.
>
> Signed-off-by: Aneesh Bansal
On 12/18/2013 09:38 PM, Nikhil Badola wrote:
> Set correct phy_type value for second USB controller.
> This is required for supporting SOCs having 2 USB controllers
> working simultaneously, one with UTMI phy and other with ULPI phy
>
> Signed-off-by: Nikhil Badola
> ---
Applied to u-boot-mpc85
On 03/19/2014 01:52 PM, York Sun wrote:
> For fsl-lsch3 NOR flash boot, IFC CS0 needs to be binded with address
> within 32-bit at fist. After u-boot relocates to DDR, CS0 can be binded
> to higher address to support large space.
>
> Signed-off-by: York Sun
> CC: Prabhakar Kushwaha
> ---
Applie
On 03/26/2014 06:30 PM, Scott Wood wrote:
> The value written to L2CSR1 didn't match the value written to the
> device tree.
>
> Signed-off-by: Scott Wood
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
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On 03/26/2014 09:13 AM, Codrin Ciubotariu wrote:
> In the current Datasheet for VSC8514 there is a mistake, saying that
> the PHY id is 0x70570. The real value in the identifier registers is
> 0x70670. Linux PHY driver uses 0x70670 also.
>
> Signed-off-by: Codrin Ciubotariu
> Cc: York Sun
> ---
On 04/09/2014 08:16 PM, Haijun Zhang wrote:
> u-boot binary size for Freescale mpc8536DS platforms is 512KB.
> This has been reached to upper limit of the platforms and causig
> linker error. So increase the u-boot binary size to 768KB.
>
> Signed-off-by: Haijun Zhang
> ---
Applied to u-boot-mpc
On 04/16/2014 06:31 PM, York Sun wrote:
> This is a theoretical possible out of bounds error in DDR driver. Adding
> check before using array index. Also change some runtime conditions to
> pre-compiling conditions.
>
> Signed-off-by: York Sun
> ---
> Change log:
> v2: Revise subject and commit
On 04/10/2014 09:12 PM, shh@gmail.com wrote:
> From: Shaohui Xie
>
> There should be a break for case PHY_INTERFACE_MODE_SGMII, otherwise it
> will fall into case PHY_INTERFACE_MODE_RGMII.
>
> Signed-off-by: Shaohui Xie
> ---
Applied to u-boot-mpc85xx/master, thanks.
York
__
On 04/14/2014 11:04 PM, Vijay Rai wrote:
> T1040 and it's variants provide "Single Oscillator Source" Reference Clock
> Mode.
>
> In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the
> reference clock
> (100MHz) to the following PLLs:
> • Platform PLL
> • Core PLLs
> • USB PLL
>
On 04/15/2014 02:14 AM, Nikhil Badola wrote:
> Adds support for clock sourcing from sysclk(100MHz) for usb
> on T104xRDB and T1040QDS. This requires changing reference divisor
> and multiplication factor to derive usb clock from sysclk.
>
> Signed-off-by: Nikhil Badola
> ---
> Dependency on
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