On 04/06/2014 08:16 PM, Nikhil Badola wrote:
> Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 
> 2.0.
> This decreases data burst rate with which data packets are posted from the TX
> latency FIFO to compensate for latencies in DDR pipeline during DMA.
> This avoids Tx buffer underruns and leads to successful usb writes
> 
> Signed-off-by: Ramneek Mehresh <ramneek.mehr...@freescale.com>
> Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com>
> ---

Applied to u-boot-mpc85xx/master, thanks.

York


_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to