On 04/14/2014 11:04 PM, Vijay Rai wrote:
> T1040 and it's variants provide "Single Oscillator Source" Reference Clock 
> Mode.
> 
> In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the 
> reference clock
> (100MHz) to the following PLLs:
> • Platform PLL
> • Core PLLs
> • USB PLL
> • DDR PLL, etc
> 
> The cfg_eng_use0 of porsr1 register identifies whether the SYSCLK 
> (single-ended) or
> DIFF_SYSCLK (differential) is selected as the clock input to the chip.
> 
> get_sys_info has been enhanced to add the diff_sysclk so that the
> various drivers can be made aware of ths diff sysclk configuration and
> act accordingly.
> 
> Other changes:
> -single_src to ddr_refclk_sel, as it is use for checking ddr reference clock
> -Removed the print of single_src from get_sys_info as this will be
> -printed whenever somebody calls get_sys_info which is not appropriate.
> -Add print of single_src in checkcpu as it is called only once during 
> initialization
> 
> Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com>
> Signed-off-by: Priyanka Jain <priyanka.j...@freescale.com>
> Signed-off-by: Vijay Rai <vijay....@freescale.com>
> ---

Applied to u-boot-mpc85xx/master, thanks.

York


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