> -Original Message-
> From: Michael Nazzareno Trimarchi
> Sent: Thursday, 27 February 2025 2:34 pm
> To: Maniyam, Dinesh
> Cc: u-boot@lists.denx.de; Marek ; Simon
> ; Tom Rini ; Dario
> Binacchi ; Johan Jonker
> ; Michal Simek ; Arseniy
> Krasnov ; Alexander Dahl ;
> William Zhang ; Ig
From: Vaishnav Achath
Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
latest changes added in the K3 Resource Partitioning Tool.
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels
Hi Dinesh
On Wed, Feb 26, 2025 at 5:18 PM wrote:
>
> From: Dinesh Maniyam
>
> This patchset add Cadence NAND driver support for
> Intel Agilex5 devices.
>
> The NAND driver is leveraged from the cadence-nand-controller.c
> from Linux version 6.11.2. U-Boot will support read, write and erase
> NA
Based on the UFS speed mode(HS or PWM) the timeout might vary and
can result timeouts.
ufs-versal2-pltfm ufs@f10b: Timedout waiting for UTP response
ufs-versal2-pltfm ufs@f10b: OCS error from controller = f
It's a temporary workaround to solve the timeout issue.
Signed-off-by: Venkatesh
Hi Sebastian,
On Thu, 27 Feb 2025 at 00:15, Sebastian Reichel
wrote:
>
> Hi,
>
> I have a couple of fixes/improvements for the TCPM code. Three are fixing
> actual problems I noticed on the Rock 5B, which prevented booting up the
> system. One of them simply adds an error print before potentially
Am 27.02.25 um 05:35 schrieb Jonathan Humphreys:
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards,
From: Tien Fong Chee
Altera officially split off from Intel, the email need be updated to ensure
uninterrupted support and communication
Signed-off-by: Tien Fong Chee
---
doc/git-mailrc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 11
> Subject: Re: [PATCH 2/2] imx8mm: imx8mm_evk: fix BOOTSTD boot
>
> Hi Peng,
>
> On Thu, Feb 27, 2025 at 12:11 AM Peng Fan
> wrote:
>
> > I am just trying your setup.
> > Appreciate your effort on helping this.
>
> From what I can see, it is only imx93-evk and imx8mp-evk that lacks
> setting k
Hi Peng,
On Thu, Feb 27, 2025 at 12:11 AM Peng Fan wrote:
> I am just trying your setup.
> Appreciate your effort on helping this.
>From what I can see, it is only imx93-evk and imx8mp-evk that lacks
setting kernel_addr_r.
I will test and submit patches for these boards tomorrow.
Cheers
> Subject: Re: [PATCH 2/2] imx8mm: imx8mm_evk: fix BOOTSTD boot
>
> On Wed, Feb 26, 2025 at 11:27 PM Tom Rini
> wrote:
>
> > Did you reset the environment at some point to be the new default?
>
> Yes, this was the issue, thanks.
>
> Besides that, I also need to set kernel_addr_r for the boot t
On Wed, Feb 26, 2025 at 11:27 PM Tom Rini wrote:
> Did you reset the environment at some point to be the new default?
Yes, this was the issue, thanks.
Besides that, I also need to set kernel_addr_r for the boot to succeed:
--- a/board/freescale/imx93_evk/imx93_evk.env
+++ b/board/freescale/imx
On Thu, Feb 27, 2025 at 12:31:59AM +, Peng Fan wrote:
> Hi Andre,
>
> > Subject: [PATCH 1/2] sunxi: mmc: Fix T113-s3 MMC clock divider
> >
> > On the Allwinner D1/R528/T113-s3 SoCs the MMC clock source
> > selected by mux value 1 is PLL_PERIPH0(1x), not (2x), as in the other
> > SoCs.
> > But
On Wed, Feb 26, 2025 at 07:47:03PM -0300, Fabio Estevam wrote:
> Hi Peng,
>
> On Sat, Feb 22, 2025 at 8:10 AM Peng Fan (OSS) wrote:
> >
> > From: Peng Fan
> >
> > Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND
> > Correct DEFAULT_FDT_FILE
> > Correct env file for imx8mm_evk_fspi_defconfig
> >
> > F
On Wed, Feb 26, 2025 at 10:47:43PM -0300, Fabio Estevam wrote:
> On Wed, Feb 26, 2025 at 9:55 PM Tom Rini wrote:
>
> > But what part of things here is trying to call "sysboot" as a command?
>
> This is my first time using bootstd, and I am not familiar with it.
>
> I got a 'Unknown command 'sys
> Subject: Re: [PATCH 1/2] sunxi: mmc: Fix T113-s3 MMC clock divider
>
> On Thu, Feb 27, 2025 at 12:31:59AM +, Peng Fan wrote:
> > Hi Andre,
> >
> > > Subject: [PATCH 1/2] sunxi: mmc: Fix T113-s3 MMC clock divider
> > >
> > > On the Allwinner D1/R528/T113-s3 SoCs the MMC clock source
> selecte
On Wed, Feb 26, 2025 at 11:09 PM Tom Rini wrote:
> Yes, it's not that extlinux.conf is doing it, it's part of bootstd?
> Sounds like it should be implied as part of BOOTSTD_something rather
> than per-board.
What about this?
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -564,7 +564,7 @@ config BOOTM
On Wed, Feb 26, 2025 at 10:47 PM Fabio Estevam wrote:
>
> On Wed, Feb 26, 2025 at 9:55 PM Tom Rini wrote:
>
> > But what part of things here is trying to call "sysboot" as a command?
>
> This is my first time using bootstd, and I am not familiar with it.
>
> I got a 'Unknown command 'sysboot' err
On Wed, Feb 26, 2025 at 9:55 PM Tom Rini wrote:
> But what part of things here is trying to call "sysboot" as a command?
This is my first time using bootstd, and I am not familiar with it.
I got a 'Unknown command 'sysboot' error as shown below:
mmc1 is current device
Scanning mmc 1:1...
Found
On Wed, Feb 26, 2025 at 07:58:26PM -0300, Fabio Estevam wrote:
> On Wed, Feb 26, 2025 at 7:47 PM Fabio Estevam wrote:
>
> > How can we fix this boot regression? This affects imx8mm-evk,
> > imx8mn-evk, imx8mp-evk as well.
>
> After adding:
>
> --- a/configs/imx93_11x11_evk_defconfig
> +++ b/con
> Subject: [PATCH 2/2] sunxi: sun50i_h6: clock: fix PLL_PERIPH0 rate
> calculation
>
> On the Allwinner D1/R528/T113-s3 SoCs (NCAT2) the factors encoded
> in the PLL register describe the doubled clock rate, as in the other SoCs.
>
> Correct for that by always dividing the calculated rate by 2, e
Hi Andre,
> Subject: [PATCH 1/2] sunxi: mmc: Fix T113-s3 MMC clock divider
>
> On the Allwinner D1/R528/T113-s3 SoCs the MMC clock source
> selected by mux value 1 is PLL_PERIPH0(1x), not (2x), as in the other
> SoCs.
> But we have still the hidden divisor of 2 in the MMC mod clock, so
> need to
> Subject: Re: [PATCH 2/2] imx8mm: imx8mm_evk: fix BOOTSTD boot
>
> On Wed, Feb 26, 2025 at 7:47 PM Fabio Estevam
> wrote:
>
> > How can we fix this boot regression? This affects imx8mm-evk,
> > imx8mn-evk, imx8mp-evk as well.
It boots well with NXP yocto generated image, anyway I will
try buil
Hi Fabio,
> Subject: Re: [PATCH 2/2] imx8mm: imx8mm_evk: fix BOOTSTD boot
>
> Hi Peng,
>
> On Sat, Feb 22, 2025 at 8:10 AM Peng Fan (OSS)
> wrote:
> >
> > From: Peng Fan
> >
> > Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND Correct
> DEFAULT_FDT_FILE
> > Correct env file for imx8mm_evk_fspi_defc
Fix a couple of typos in mach-mvebu/Kconfig.
Signed-off-by: Chris Packham
---
arch/arm/mach-mvebu/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index adb816982f87..22180b011559 100644
--- a/arch/arm/mach
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 7 ++
drivers/pinctrl/qcom/Makefile
On Wed, Feb 26, 2025 at 7:47 PM Fabio Estevam wrote:
> How can we fix this boot regression? This affects imx8mm-evk,
> imx8mn-evk, imx8mp-evk as well.
After adding:
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -128,3 +128,4 @@ CONFIG_ULP_WATCHDOG=y
CONFIG_
Hi Peng,
On Sat, Feb 22, 2025 at 8:10 AM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND
> Correct DEFAULT_FDT_FILE
> Correct env file for imx8mm_evk_fspi_defconfig
>
> Fixes: 364ba68ed1a ("imx: imx8mm_evk: Switch to BOOTSTD")
> Reported-by: Ludwig Nussel
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so rem
For capsule update, explicitly set the dfu_alt_info environment variable
before the DFU operation, and then restore it to the original value.
Previously, the dfu_alt_info environment variable was set with the
set_dfu_alt_info() function.
The problem with setting the capsule update's dfu_alt_info s
The current implementation of EFI capsule update uses set_dfu_alt_info() to
set the dfu_alt_info environment variable with the settings it requires.
However, set_dfu_alt_info() is doing this for all DFU operations, even
those unrelated to capsule update.
Thus other uses of DFU, such as DFU boot wh
From: Michal Simek
Directly fill update_info.dfu_string to prepare platforms to switch
from using dfu_alt_info variable to dfu_string which contains description
for capsule update when switch is done.
Signed-off-by: Michal Simek
Reviewed-by: Mattijs Korpershoek
Acked-by: Ilias Apalodimas
---
Add support to decompress LZO images.
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 29d7c3279b39..a6341a078019 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -14,6 +14,9 @@
#include
#include
#includ
Add support to decompress LZ4 images. LZ4 is used on more recent
Chromebooks to store the FIT image.
Signed-off-by: Stephen Boyd
---
cmd/ximg.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/cmd/ximg.c b/cmd/ximg.c
index a6341a078019..eed66c776d12 100644
--- a/cmd/ximg.c
+++
Coreboot sets up the DRAM, CPU, and devices before booting a payload,
meaning we can parse the coreboot tables at boot for memory info when
running as a payload. Use the memory descriptors from coreboot if the
tables are present so that Snapdragon SoCs can run U-boot as a coreboot
payload.
Signed-
Move the timestamp code out of x86/cpu/coreboot to lib/coreboot and make
it generic. This lets us migrate the timestamp table from coreboot into
U-Boot's version of boot stage timing and use it on ARM based devices.
---
arch/x86/cpu/coreboot/Makefile | 1 -
arch/x86/cpu/coreb
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 7 +++
lib/coreboot/cb_sysinfo.c | 120 ++
3 files
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
index 9795
The SKU ID is part of the coreboot tables. Historically, it was under
the coreboot tag for sku_id specifically, but modern coreboot versions
have put all the ID values together in one entry CB_TAG_BOARD_CONFIG
along with fw_config. Parse that tag to populate the sku_id and
fw_config fields.
Signed
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
in
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 4 ++--
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysinfo.c | 0
cmd/x86/Makefile
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Signed-off-by: Stephen Boyd
---
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Makefile | 4
arch/arm/cpu/armv8/coreboot/cpu.c| 33 +++
Lay the groundwork to run U-Boot as a payload on ARM coreboot based
devices. Move the coreboot table parsing code out of arch/x86 into
lib/coreboot. The headers like cb_sysinfo.h and coreboot_tables.h need
to be globally accessible, so move them into the top level include
directory. Introduce helpe
This should be negative EFAULT to indicate an error code.
Reviewed-by: Simon Glass
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a/b
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 527
3 files changed, 538 insertions(+)
create mode 100644 drivers/spi/spi-
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-sc7180.c | 150 +
This series supports running U-Boot as a payload on sc7180 Trogdor
Chromebooks like Lazor or Wormdingler. This is a jumble of different
patches to get to the final goal of booting a Linux distro from the eMMC
on Lazor. I'm able to boot Fedora Workstation 41 from a USB stick on my
Lazor.
I moved th
Hi Tom,
On Wed, 26 Feb 2025 at 10:39, Tom Rini wrote:
>
> On Wed, Feb 26, 2025 at 10:25:22AM -0500, Raymond Mao wrote:
>
> > Hi Tom,
> >
> > Is it able to merge this series for the upcoming release?
> > This series includes the hotfix for the building failures when
> > WGET_HTTPS,NET_LWIP and MBE
On Wed, Feb 26, 2025 at 09:26:13AM -0700, Simon Glass wrote:
> This series has the skip-at-start change and a few fixes.
>
> Sadly it also includes a revert for the dm_probe_devices() patch, since
> it breaks jerry (RK3288). I will need to investigate way.
>
> It is based on -next and I can send
Add optional argument git_branch to build_from_git. The new argument
allows specifying which branch of the repo to use.
Signed-off-by: Leonard Anderweit
---
tools/binman/bintool.py | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/tools/binman/bintool.py b/tools/binm
On Wed, Feb 26, 2025 at 09:26:15AM -0700, Simon Glass wrote:
> Snow requires a fixed bloblist to operate, so re-enable this option.
>
> Signed-off-by: Simon Glass
> Fixes: 864106f3c47 ("bloblist: Make BLOBLIST_ALLOC the default")
> ---
>
> (no changes since v1)
>
> configs/snow_defconfig | 2
Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.
Signed-off-by: Leonard Anderweit
---
v2: fix tests
---
tools/binman/bintool.py | 9 +++--
tools
Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the descr
Quoting Caleb Connolly (2025-02-26 03:04:29)
>
>
> On 2/25/25 21:49, Stephen Boyd wrote:
>
> > this supposed to work in general? Should I be storing the DTB on disk so
>
> The SystemReady approach is that firmware provides the FDT, if you don't
> pick a DTB then the one that U-Boot itself was using
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
Cc: Tim Harvey
Cc: Stefan Roese
This does change how some platforms are built.
---
cmd/mvebu/bubt.c | 2 +-
1 file changed, 1 insertion(+), 1 d
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
Cc: Simon Glass
Cc: Bin Meng
---
arch/x86/include/asm/intel_pinctrl_defs.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --g
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
Cc: Simon Glass
Cc: Bin Meng
---
arch/x86/lib/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/lib/spl.c b/arc
These two files were using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
Cc: Kever Yang
---
drivers/clk/rockchip/clk_rk3568.c | 4 ++--
drivers/clk/rockchip/clk_rk3588.c | 4 ++--
2 files changed, 4 insertions(+
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
Cc: Simon Glass
Cc: Bin Meng
---
drivers/power/acpi_pmc/acpi-pmc-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/dr
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini
---
test/common/event.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/common/event.c b/test/common/event.c
index bfbbf01976
bbmiiphy clean up and DM alignment, finally gets rid of the static bbmiiphy
variables and plugs bbmiiphy into MDIO framework.
The following changes since commit 8dd7186ca7821446c6f46b6cccefab502912f2e0:
Merge patch series "Remove "saveenv" functionality from am57xx evms"
(2025-02-25 11:11:32 -
The current TCPM code implements source capability message handling
according to the USB-PD specification. Unfortunately some USB PD
sources do not properly follow the specification and do not send
source capability messages after a soft reset when they already
negotiated a specific contract before
When the Rock 5B is booted with the current TCPM with its power supplied
by a "Cambrionix PDSync-C4" port it reaches the power-supply ready state.
Once that has happened the hub starts sending GetSinkCap messages, but
U-Boot already stopped processing PD messages. After retrying a bunch of
times th
A USB-PD hard reset involves removing the voltage from VBUS for some
time. So basically it has the same effect as removing the USB-C plug
for a short moment. If the machine is powered from the USB-C port and
does not have a fallback supply (e.g. a battery), this will result in
a full machine reset
On Radxa ROCK 5B I managed to get U-Boot into an endless loop of
printing
fusb302 usb-typec@22: TCPM: data role mismatch, initiating error recovery
messages by changing the data role in Linux and then rebooting the
system. This is happening because the external device (A cheap USB-C hub
powered t
Hi,
I have a couple of fixes/improvements for the TCPM code. Three are fixing
actual problems I noticed on the Rock 5B, which prevented booting up the
system. One of them simply adds an error print before potentially committing
hara-kiri by triggering a hard reset, which helps people understanding
On Wed, Feb 26, 2025 at 02:49:07PM +, Caleb Connolly wrote:
>
>
> On 2/26/25 14:34, Caleb Connolly wrote:
> > Hi Tom,
> >
> > Sorry this is a bit later than expected.
> >
> > The clk_stub, regulator, and pinctrl fixes enable the sdcard on the RB5 dev
> > board (and sm8250 devices broadly).
From: Nathan Barrett-Morrison
This adds support for the ADI-specific SPI driver present in the ADI
SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block
that uses the Cadence driver. Both may be used at once with appropriate
pin muxing configuration.
Co-developed-by: Greg Malysa
The ADI SC598 includes a Designware QoS 5.20a IP block. This
commit adds support for using the existing ethernet QoS driver
with the SC598 SoC.
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Signed-off-by:
From: Nathan Barrett-Morrison
This adds support for the ADP588 GPIO expander from Analog Devices. It
is accessed over I2C and provides up to 18 pins. It is largely a port of
the Linux driver developed by Michael Hennerich
Signed-off-by: Ian Roberts
Signed-off-by: Greg Malysa
Signed-off-by: Va
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by: Nathan
From: Nathan Barrett-Morrison
This adds the ability to load ldr-formatted files to the SHARC
coprocessors using the rproc interface. Only a minimal subset
of rproc functionality is supported: loading and starting
the remote core.
Secure boot and signed ldr verification are not available
at this
Add a rudimentary MDMA driver for the Analog Devices SC5xx SoCs,
primarily intended for use with and tested against the QSPI/OSPI
IP included in the SoC.
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Sign
From: Nathan Barrett-Morrison
This adds support for the MUSB-based USB controller found in the
Analog Devices SC57x and SC58x SoCs.
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
Signed-off-by: Oliver Gaskell
Signed-off-by: Nathan
From: Nathan Barrett-Morrison
Co-developed-by: Greg Malysa
Signed-off-by: Greg Malysa
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Co-developed-by: Angelo Dureghello
Signed-off-by: Angelo Dureghello
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: A
This adds support for using the GPIO pins on the SC5XX family of SoCs
from Analog Devices.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Co-developed-by: Ian Roberts
Signed-off-by: Ian Roberts
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Si
This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.
Changes in v3:
- Add check if PORT peri
This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.
Signed-off-by: Vasileios Bimpikas
Signed-off-by: Utsav Agarwal
Signed-off-by: Arturs Artamonovs
S
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.
Co-developed-by: Nathan Barrett-Morrison
Signed-off-by: Nathan Barrett-Morrison
Co-developed-by: Ian Roberts
Signed-off-b
From: Dinesh Maniyam
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 d
On 22/02/2025 20:33, Marek Vasut wrote:
> Pull the bbmiiphy initialization code from designware_eth_probe() into
> dedicated function, dw_bb_mdio_init(), just like all the other MDIO
> initialization functions.
>
> Keep check for "snps,bitbang-mii" in the designware_eth_probe(), so the
> driver ca
From: Dinesh Maniyam
This patchset add Cadence NAND driver support for
Intel Agilex5 devices.
The NAND driver is leveraged from the cadence-nand-controller.c
from Linux version 6.11.2. U-Boot will support read, write and erase
NAND with Cadence driver. The driver further enhanced in U-Boot
to su
On 22/02/2025 20:33, Marek Vasut wrote:
> Instead of doing another lookup, trivially access the struct mii_dev
> embedded in struct bb_miiphy_bus . No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPG
On 22/02/2025 20:33, Marek Vasut wrote:
> Instead of doing another lookup, trivially access the struct mii_dev
> embedded in struct bb_miiphy_bus . No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPG
On 22/02/2025 20:33, Marek Vasut wrote:
> Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
> currently listed in bb_miiphy_buses[] array. This is a temporary
> duplication of assignment to avoid breakage, which will be removed
> in follow up patches. At this point, the bb_miiphy cal
On 22/02/2025 20:33, Marek Vasut wrote:
> Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
> currently listed in bb_miiphy_buses[] array. This is a temporary
> duplication of assignment to avoid breakage, which will be removed
> in follow up patches. At this point, the bb_miiphy cal
On 22/02/2025 20:33, Marek Vasut wrote:
> Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
> currently listed in bb_miiphy_buses[] array. This is a temporary
> duplication of assignment to avoid breakage, which will be removed
> in follow up patches. At this point, the bb_miiphy cal
On 22/02/2025 20:33, Marek Vasut wrote:
> There is literally one single bbmiiphy bus in this driver,
> remove the bus index handling.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Description: OpenPGP public key
OpenPGP_signature.asc
On 22/02/2025 20:33, Marek Vasut wrote:
> All the resources needed by this .init callback should already
> be available by the time probe function runs, simply call the
> init callback directly and set the bb_miiphy init callback to
> NULL. This shouldn't break anything on this hardware, but would
On 22/02/2025 20:33, Marek Vasut wrote:
> Move the bb_miiphy functions before MDIO registration. This is a
> preparatory patch, the functions will be referenced around the MDIO
> registration in the follow up patches. No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
On 22/02/2025 20:33, Marek Vasut wrote:
> Move the bb_miiphy functions before MDIO registration. This is a
> preparatory patch, the functions will be referenced around the MDIO
> registration in the follow up patches. No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
On 22/02/2025 20:33, Marek Vasut wrote:
> Move the bb_miiphy functions before MDIO registration. This is a
> preparatory patch, the functions will be referenced around the MDIO
> registration in the follow up patches. No functional change.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
Snow requires a fixed bloblist to operate, so re-enable this option.
Signed-off-by: Simon Glass
Fixes: 864106f3c47 ("bloblist: Make BLOBLIST_ALLOC the default")
---
(no changes since v1)
configs/snow_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/snow_defconfig b/confi
From: Dinesh Maniyam
Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam
---
v2:
- remove the "this patch is to" commit phrases
---
---
drivers/mtd/nand/raw/cadence_nand.c | 48 ++
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Wednesday, 26 February 2025 11:37 am
> To: 'Michael Nazzareno Trimarchi'
> Cc: u-boot@lists.denx.de; Marek ; Simon
> ; Tom Rini ; Dario
> Binacchi ; Johan Jonker
> ; Michal Simek ; Arseniy
> Krasnov ; Alexander Dahl ;
> William Zhang ;
With a recent Binman change, the skip-at-start property is now honoured,
meaning that all image-pos values in the affected section start from
the skip-at-start value.
The x86 code works around the old behaviour at present, so update it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new pa
The property is named end_at_4gb so name the variable the same, to avoid
confusion.
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/entry.py | 2 +-
tools/binman/etype/section.py | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/tools/binman/e
On 26/02/2025 15:44, Caleb Connolly wrote:
On 2/26/25 14:22, Tom Rini wrote:
On Wed, Feb 26, 2025 at 08:21:34AM -0600, Tom Rini wrote:
On Wed, Feb 26, 2025 at 02:07:28PM +0100, Neil Armstrong wrote:
Hi,
On 25/11/2024 18:12, Neil Armstrong wrote:
Add support for RNG on newer SoCs which shar
A discussion on the mailing list about dealing with block offsets and
binman symbols made me think that something is wrong with how Binman
deals with the skip-at-start property.
The feature was originally designed to handle x86 ROMs, which are mapped
at the top of the address space. That seemed to
Unfortunately this change was not safe as some devices are bound before
relocation, but we don't want to probe them.
It causes 'raise: Signal # 8 caught' on jerry.
Move the bootstage timer to after autoprobe in initf_dm() since the
trace test does not tolerate any variance.
This reverts commit 2
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