On 2/3/25 10:28, Michal Simek wrote:
do_fpga_loads() is not called from anywhere else that's why make it static.
Signed-off-by: Michal Simek
---
cmd/fpga.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 212f421739fa..9dc7b63db5d1 10064
On 04/02/25 19:38, Kumar, Udit wrote:
>
> On 2/4/2025 6:01 PM, Neha Malcom Francis wrote:
>> Add a driver for the BIST module that support triggering of both PBIST
>> (Memory BIST) and LBIST (Logic BIST) tests. Also expose the relevant
>> operations and functions that would be required for an end
On 05/02/25 11:38, Manorit Chawdhry wrote:
> Hi Neha,
>
> On 18:01-20250204, Neha Malcom Francis wrote:
>> Trigger all tests of PBIST and LBIST using appropriate calls to set the
>> core under test (MAIN R5 2_0) to it's required state.
>>
>> Signed-off-by: Ne
On 1/8/25 5:40 PM, Caleb Connolly via groups.io wrote:
Hi Alexey,
Thanks for the patch! Really happy to see support for this new platform.
On 08/01/2025 12:59, Alexey Minnekhanov wrote:
Apparently not all GDSCs are the same. In Linux driver, depending on which
GDSC flags are set, different sta
Hi Neha,
On 18:01-20250204, Neha Malcom Francis wrote:
> Trigger all tests of PBIST and LBIST using appropriate calls to set the
> core under test (MAIN R5 2_0) to it's required state.
>
> Signed-off-by: Neha Malcom Francis
> ---
> arch/arm/mach-k3/j7
On Feb 05, 2025 at 05:30:11 +0100, Wadim Egorov wrote:
> Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
> are accessible across all stages. This enables reading the SoM
> configuration at any point during the boot process.
>
> Signed-off-by: Wadim Egorov
> Tested-by: Daniel
On Feb 05, 2025 at 05:30:12 +0100, Wadim Egorov wrote:
> Detect RAM size via EEPROM and adjust DDR size and banks accordingly.
> Include necessary fixups to handle ECC-enabled configurations.
>
> Signed-off-by: Wadim Egorov
> Tested-by: Daniel Schultz
> ---
> v2: Add Tested-by from Daniel
> ---
Hi Andrew,
On 09:43-20250204, Andrew Davis wrote:
> On 2/3/25 10:43 PM, Manorit Chawdhry wrote:
> > Hi Andrew,
> >
> > On 14:44-20250203, Andrew Davis wrote:
> > > On 1/6/25 3:34 AM, Manorit Chawdhry wrote:
> > > > From: Neha Malcom Francis
> >
On Feb 05, 2025 at 05:30:13 +0100, Wadim Egorov wrote:
> Enable configs required for detecting and fixing up for different RAM
> variants.
> Also resync after savedefconfig.
>
> Signed-off-by: Wadim Egorov
> Tested-by: Daniel Schultz
> ---
Reviewed-by: Dhruva Gole
--
Best regards,
Dhruva Go
Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
are accessible across all stages. This enables reading the SoM
configuration at any point during the boot process.
Signed-off-by: Wadim Egorov
Tested-by: Daniel Schultz
---
v2: Add Tested-by from Daniel
---
arch/arm/dts/k3-am6
Detect RAM size via EEPROM and adjust DDR size and banks accordingly.
Include necessary fixups to handle ECC-enabled configurations.
Signed-off-by: Wadim Egorov
Tested-by: Daniel Schultz
---
v2: Add Tested-by from Daniel
---
board/phytec/phycore_am64x/Kconfig | 25 +
board/phytec/p
Enable configs required for detecting and fixing up for different RAM variants.
Also resync after savedefconfig.
Signed-off-by: Wadim Egorov
Tested-by: Daniel Schultz
---
v1: https://lists.denx.de/pipermail/u-boot/2025-January/578618.html
v2:
- Rebase after 0e198ff1a911 ("configs: Resync with
Hi Ilias,
On 04/02/25 5:42 pm, Ilias Apalodimas wrote:
Hi Love,
On Tue, 4 Feb 2025 at 13:53, Love Kumar wrote:
Hi Ilias,
On 30/01/25 12:50 pm, Ilias Apalodimas wrote:
U-Boot maps all pages as RWX. Sadly it's not not 1990 anymore and we are
better off mapping binaries with proper permissio
On 2025/1/31 06:07, Jonas Karlman wrote:
Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x6000 and RK3576 use 0x4000 as DRAM base address.
CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in s
On 2025/1/31 06:07, Jonas Karlman wrote:
U-Boot only works correctly when it uses RAM below the 4G address
boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v3: Use u64 to fix 32-bit overflow
v2: New pat
On 2025/1/29 23:24, Quentin Schulz wrote:
From: Quentin Schulz
The build system uses HAVE_VENDOR_COMMON_LIB to automatically include
board/$(VENDOR)/common/Makefile, therefore let's use that to implicitly
include board/theobroma-systems/common/Makefile and compile the common.c
file when build
Support phy io micro voltage setting for NPCM8XX rgmii
interface.
Signed-off-by: Michael Chang
---
drivers/net/designware.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 94d8f1b4c0..0a1fff3872 100644
--- a/drivers/net/
The rockchip image is written to the media at block 64, which is a 32K
offset, so set the skip-at-start property to 0x8000
Update CONFIG_SPL_PAD_TO to point to the offset in the image, since
Binman is dealing with the 'missing' 32K now.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-bo
Hi Chen-Yu,
Le Wed 05 Feb 25, 01:23, Chen-Yu Tsai a écrit :
> From: Chen-Yu Tsai
>
> The IO domain driver controls the I/O voltage for various pins,
> MMC included.
>
> Enable it by default for all supported Rockchip SoCs.
Thanks for the cleanup!
Reviewed-by: Paul Kocialkowski
> Signed-off-
This series completes the work to enable VBE on a suitable board. Most
of it is rockchip-specific patches to support the VPL phase, i.e. the
one which decides which boot patch to take (A, B or recovery).
A good chunk of this series is adding an image for VBE, by creating a
new Binman image. Future
From: Chen-Yu Tsai
The IO domain driver controls the I/O voltage for various pins,
MMC included.
Enable it by default for all supported Rockchip SoCs.
Signed-off-by: Chen-Yu Tsai
---
configs/chromebook_bob_defconfig | 1 -
configs/chromebook_kevin_defconfig | 1 -
confi
BEGIN:VCALENDAR
PRODID:-//Google Inc//Google Calendar 70.9054//EN
VERSION:2.0
CALSCALE:GREGORIAN
METHOD:REQUEST
BEGIN:VTIMEZONE
TZID:America/Bahia_Banderas
X-LIC-LOCATION:America/Bahia_Banderas
BEGIN:STANDARD
TZOFFSETFROM:-0600
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19700101T00
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END:VT
Hi Jon,
Thank you for the patch.
On lun., févr. 03, 2025 at 15:53, Jonathan Humphreys wrote:
> Now that capsule update sets the dfu_alt_info environment variable
> explicitly, there is no need to support it in the set_dfu_alt_info()
> function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWAR
Hi Jon,
Thank you for the patch.
On lun., févr. 03, 2025 at 15:53, Jonathan Humphreys wrote:
> The current implementation of EFI capsule update uses set_dfu_alt_info() to
> set the dfu_alt_info environment variable with the settings it requires.
> However, set_dfu_alt_info() is doing this for a
TPL runs before VPL. The earliest updatable phase with VBE is SPL. We
want to be able to update the RAM-init code in the field.
So when VPL is being used, init the RAM later, in SPL.
Signed-off-by: Simon Glass
---
drivers/ram/rockchip/sdram_rk3399.c | 6 --
1 file changed, 4 insertions(+),
The VPL image is immutable and has a single VPL binary plus a devicetree
for each board we need to support.
The devicetree is run through fdtgrep to remove unwanted nodes and
properties and reduce its size.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 94 +
The U-Boot section is currently getting an invalid OS. Use the correct
value to fix this.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
i
When VBE is in use, the size of each phase is obtained by reading it
from a FIT. Avoid using binman symbols unless necessary, i.e. in TPL.
Signed-off-by: Simon Glass
---
common/spl/spl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 6b75910e243.
Add a rockchip rk3399 board which runs Verified Boot for Embedded.
Signed-off-by: Simon Glass
---
.gitlab-ci.yml | 6 ++
1 file changed, 6 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 3487ad7e579..813db4df98c 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -740,3 +7
Where the bloblist is located in internal memory and TF-A's BL31 blob
removes access to this memory, the best option seems to be to relocate
the bloblist just before running TF-A.
Add an option to select this behaviour and provide a relocation address.
Signed-off-by: Simon Glass
---
common/Kco
The logic of this has become too confusing.
The primary issue with the patch is that U-Boot needs to set up a
bloblist in the first phase where BLOBLIST is enabled. Subsequent
phases can then use that bloblist.
But the first phase of U-Boot cannot assume that one exists.
Reverting this commit se
Now that VBE is running at a basic level on rk3399, add mention of it in
the documentation.
Signed-off-by: Simon Glass
---
doc/board/rockchip/rockchip.rst | 13 +
1 file changed, 13 insertions(+)
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 9
This build-target is used to build an image which can run on multiple
rk3399 boards, using VBE to boot.
To use it, the TPL binary for a particular board must be placed into the
first part of the image. The rest of the image (i.e. VPL, SPL and
U-Boot) are largely generic and can work on any support
The current logic assumes that if TPL exists then it must be setting up
the SDRAM. This is not true with VBE, so allow this to be controlled by
whether CONFIG_TPL_RAM is enabled, or not.
Signed-off-by: Simon Glass
---
arch/arm/mach-rockchip/tpl.c | 10 ++
1 file changed, 6 insertions(+)
There doesn't seem to be a good reason to use a different value for TPL
than SPL. Change the TPL value, since it allows a 256-byte bloblist to
be safely located above the stack in all phases.
Signed-off-by: Simon Glass
---
arch/arm/mach-rockchip/rk3399/Kconfig | 2 +-
1 file changed, 1 insertio
The TPL image must be built for each board we need to support. It is the
only part of the image which is board-specific.
This helps to save space and reduce the size of TPL, so that it can fit
within the internal 192K IRAM.
As with other phases, the TPL devicetree is run through fdtgrep to
remove
Add various symbols so that this feature works as intended. This allows
xPL to copy the relocating-jump code up to the top of memory, then use
it to decompress and start the next phase.
Signed-off-by: Simon Glass
---
arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 13 +
1 file changed, 1
Add support for this new phase, which runs after TPL. It determines the
state of the machine, then selects which SPL image to use. SDRAM init is
then done in SPL, so that it is updatable.
Signed-off-by: Simon Glass
---
arch/arm/include/asm/spl.h | 1 +
arch/arm/mach-rockchip/Kco
When VPL is in use, memory init happens in SPL, so there is no need to
include the DMC device before that. Adjust the tags to save space.
Signed-off-by: Simon Glass
---
arch/arm/dts/rk3399-u-boot.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk339
The SPL phase has a single SPL binary plus a devicetree for each board
we need to support.
The devicetree is run through fdtgrep to remove unwanted nodes and
properties and reduce its size.
While it would be nicer to just have a single FIT holding both the SPL
and U-Boot images, there may not be
Provide a compatible string so that U-Boot can decide which
configuration to use.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 39908495894..67cb2c
Add bootstd information for VBE.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 8c6e62398a4..7cce213c32e 100644
--- a/a
VBE may want to load the SPL image from the same FIT as contains U-Boot,
if there is enough memory, so add it.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/
Add 'u-boot' as the phase for the images intended for use with U-Boot
proper.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 281119a53d3..8c6e62
Add an fdtmap so it is possible to look at the image with 'binman ls'.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 8d6b2184f43..da0ac078cb6 1
Move this up higher on kevin and bob so we can accommodate a larger
U-Boot, e.g. with debugging info enabled.
Signed-off-by: Simon Glass
---
configs/chromebook_bob_defconfig | 2 +-
configs/chromebook_kevin_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/confi
Fix the indentation on the template. This is done in a separate patch
so that it is easier to review.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 178 +++---
1 file changed, 89 insertions(+), 89 deletions(-)
diff --git a/arch/arm/dts/rockchip-u-bo
Move the FIT description into a template so that it can (later) be used
in multiple places in the image.
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 57 ++-
1 file changed, 34 insertions(+), 23 deletions(-)
diff --git a/arch/arm/dts/rockchip-u
Declare these at the top of the file to avoid needing #ifdefs in every
usage.
Add a few comments to help with the remaining #ifdefs
Signed-off-by: Simon Glass
---
arch/arm/dts/rockchip-u-boot.dtsi | 44 +++
1 file changed, 22 insertions(+), 22 deletions(-)
diff --g
Collect information about the memory-margin in each phase which uses
this feature. Update the 'vbe state' command to show it.
Signed-off-by: Simon Glass
---
cmd/vbe.c | 8 ++--
common/spl/spl_reloc.c | 12
include/vbe.h | 3 +++
3 files changed, 21 inser
Update for the new xPL naming, which was missed in a previous patch
which proported to do this.
Signed-off-by: Simon Glass
---
common/spl/spl_reloc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl_reloc.c b/common/spl/spl_reloc.c
index 324b98eaf98..216c0f3662
VPL has the same needs as TPL in situations where the stack is at the
top of SRAM. Add an option for this and implement it for arm
Signed-off-by: Simon Glass
---
arch/arm/lib/crt0_64.S | 4 +++-
common/spl/Kconfig.vpl | 13 +
2 files changed, 16 insertions(+), 1 deletion(-)
diff -
This patch enables switch auto-detction for mt7981 as some new mt7981
boards will use AN8855 ethernet switch.
Signed-off-by: Weijie Gao
---
arch/arm/dts/mt7981-emmc-rfb.dts | 2 +-
arch/arm/dts/mt7981-rfb.dts | 2 +-
arch/arm/dts/mt7981-sd-rfb.dts | 2 +-
3 files changed, 3 insertions(+),
This patch add support to read register base address by name if
provided.
Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT
live tree.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --
The change from pinctrl to pio was missing in mt7986-u-boot.dtsi ans will
cause build failure. Now fix it.
Fixes: f1775996ba9 (mediatek: mt7986: move gpio-controller up and rename
pinctrl to pio)
Signed-off-by: Weijie Gao
---
arch/arm/dts/mt7986-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+
Use the "pipreqs" tool to re-create these files, with a few manual
corrections. We still need to include pytest-xdist which the tool does
not detect. We also for now don't upgrade most of the required tools as
that creates problems with various tests, which should be resolved
independently.
Signed
On Tue, Feb 04, 2025 at 04:33:53PM -0700, Simon Glass wrote:
> Recent versions of this module call time.perf_counter() so add a patch
> for this also.
>
> Signed-off-by: Simon Glass
Reported-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
Now that we have more requirements.txt files we need to grab all of them
for creating our cache. Also, we do longer should install
python3-pyelftools on the host as it's not used.
Signed-off-by: Tom Rini
---
tools/docker/Dockerfile | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
We can invoke pip once to install the various requirements.txt files
that we need rather than invoking the tool multiple times.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 36 ++--
.gitlab-ci.yml | 27 ++-
2 files changed, 28 i
We should install all of our requirements.txt files after starting the
virtualenv rather than ad-hoc throughout each test.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 13 +++--
.gitlab-ci.yml | 14 --
2 files changed, 23 insertions(+), 4 deletions(-)
diff --git
Before we invoke pip we should always have first created and started our
virtualenv. This was done most of the time, but not always.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 8 ++--
.gitlab-ci.yml | 10 --
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git
Rather than have a requirements.txt file that's shared between multiple
python projects within U-Boot, create one for each using "pipreqs".
Signed-off-by: Tom Rini
---
Cc: Simon Glass
---
tools/binman/requirements.txt | 5 +
tools/patman/requirements.txt | 5 +
tools/u_boot_
Hey all,
A challenge we've run in to is making it easier for more people to use
various python tools that we include in the tree. Part of the problem is
that when we have a requirements.txt file, aside from the doc one we
share with the kernel, I created it using "pip freeze". And while this
might
Recent versions of this module call time.perf_counter() so add a patch
for this also.
Signed-off-by: Simon Glass
---
tools/buildman/test.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/buildman/test.py b/tools/buildman/test.py
index 385a34e5254..c5feb74a105 100644
--- a/tools/build
Hey all,
I've edited the calendar entry for the previous community meeting to be
recurring and so here again are the details:
> U-Boot community meeting
> Tuesday Jan 28, 2025 ⋅ 9am – 10am
> Central Standard Time - Bahía de Banderas
>
> Join with Google Meet
> https://meet.google.com/btj-wgcg-eu
From: Benjamin Szőke
In U-Boot, most of mmc releated commands uses decimal value in arguments, like
"mmc dev ${bootseq}" or "bootargs=root=/dev/mmcblk${bootseq}p2". In order to
improve compatibilities, export "bootseq" number to environment variable in
decimal format instead of hex.
Signed-off-b
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.
Upstream Linux commit 26c100232b09 "arm64: dts: rockchip
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MCI
driver set PRWEN high on MMC_POWER_UP and low on MMC_POWER_OFF.
Similarly U-Boot also set PRWEN high before accessing mmc.
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state
Radxa ROCK S0 HW revision prior to v1.2 must pull GPIO4_D6 low to boot
from sdmmc.
This series pick a device tree fix that has landed in Linux v6.14-rc1,
include required nodes in SPL and enable required Kconfig options to
fix the sdmmc boot issue on HW revision v1.1 boards.
Changes in v3:
- Pick
On Tue, 04 Feb 2025 10:45:56 -0600, Tom Rini wrote:
> The way that test/py/conftest.py has always worked is that it translates
> all "-" to "_" when looking for boardenv files. Rename the few
> incorrectly named ones that we had.
>
>
Applied to u-boot/u-boot-test-hooks.git/master, thanks!
--
On Fri, 31 Jan 2025 16:04:20 -0600, Tom Rini wrote:
> Given how files are searched and parsed,
> py/travis-ci/u_boot_boardenv_sifive_unleashed_spi-nor_qemu.py was not
> being used due to the dash in the name. Use an underbar for consistency.
>
>
Applied to u-boot/u-boot-test-hooks.git/master, t
On Wed, 29 Jan 2025 14:47:12 -0600, Tom Rini wrote:
> Whereas with Azure the JUnit results file is available for download,
> Gitlab doesn't default to including it as an artifact to download and
> only makes it available via its own JUnit parser. Fix this by listing it
> as an artifact to save as
On Tue, 28 Jan 2025 17:29:48 -0600, Tom Rini wrote:
> Now that we can run sandbox on arm64 hosts, have these jobs run on both
> the fast arm64 and amd64 hosts to catch any issues.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Tue, 28 Jan 2025 09:13:16 +0800, 1425075...@qq.com wrote:
> Refer to the commit a3c101a61348 ("examples: fix building on arm64")
> fix for arm32. crt0.S does not even build with:
> operating system and architecture:
> 5.15.0-130-generic x86_64
> installed version of gcc and binu
On Mon, 27 Jan 2025 08:18:46 +0100, Heinrich Schuchardt wrote:
> CONFIG_STANDALONE_LOAD_ADDR has been used for examples/standalone
> but not for examples/api.
>
> The suitability of an address to load an ELF binary and run it does
> not only depend on the architecture but also on the memory layou
On Mon, 27 Jan 2025 17:38:11 +0800, 1425075...@qq.com wrote:
> Refer to api/api platform-powerpc.c implementation
>
>
Applied to u-boot/master, thanks!
--
Tom
On Wed, 22 Jan 2025 16:53:15 +0100, Quentin Schulz wrote:
> A FIT image which is NOT using -E when created by mkimage - that is with
> image data within the FIT - will fail to apply FDTO if the base FDT
> image node does not specify a load property (which points to an address
> in DRAM). This is b
On Mon, 27 Jan 2025 07:49:36 +0100, Heinrich Schuchardt wrote:
> The current load address for the 'demo' binary does not work for
> qemu_arm_defconfig.
>
> The suitability of an address to load an ELF binary and run it does
> not only depend on the architecture but also on the memory layout of
>
On Mon, 27 Jan 2025 14:40:37 +0100, Christian Marangi wrote:
> This is the last batch of part to push actual support of
> OF_UPSTREAM for the mediatek SoC.
>
> The plan is to make the current downstream DTS on part with
> upstream implementation so we can permit a gradual transition to
> it while
Hi all,
On 1/30/25 4:32 PM, Judith Mendez wrote:
Some K3 devices like am62x and am64x have a M4 processor in the MCU
voltage domain. This patch series introduces remoteproc M4 driver which
will be used to load firmware into and start the M4 remote core.
This series also adds support for R5F cor
On 25/01/2025 12:28, Marek Vasut wrote:
> Update the debug() print, use __func__ to always print matching
> function name, and also print bus name in case there are multiple
> busses.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Paul Barker
--
Paul Barker
OpenPGP_0x27F4B3459F002257.asc
Descri
On 25/01/2025 12:30, Marek Vasut wrote:
> On 1/21/25 1:03 PM, Paul Barker wrote:
>> On 18/01/2025 06:16, Marek Vasut wrote:
>>> Replace ifdeffery with plain debug() function call. No functional change.
>>>
>>> Signed-off-by: Marek Vasut
>>> ---
>>> Cc: Adam Ford
>>> Cc: Hai Pham
>>> Cc: Ilias Ap
On 25/01/2025 12:34, Marek Vasut wrote:
> On 1/21/25 1:15 PM, Marek Vasut wrote:
>> On 1/21/25 1:07 PM, Paul Barker wrote:
>>> On 18/01/2025 06:34, Marek Vasut wrote:
The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, sk
Hi Chen-Yu,
Le Wed 05 Feb 25, 01:29, Chen-Yu Tsai a écrit :
> From: Chen-Yu Tsai
>
> In the GRF header file, some instances of UART2 pinmux are prefixed with
> "GRF_UART2DBG" while others have "GRF_UART2DGB".
>
> Since UART2 is the default console UART and used for debugging, it is
> more likel
On 27/01/2025 13:28, Paul Barker wrote:
> On 27/01/2025 11:30, Marek Vasut wrote:
>> On 1/27/25 11:32 AM, Paul Barker wrote:
>>> Hi Marek,
>>>
>>> On 25/01/2025 12:56, Marek Vasut wrote:
On 1/21/25 3:38 PM, Paul Barker wrote:
> On 18/01/2025 06:53, Marek Vasut wrote:
>> Introduce mdio_
Hi Chen-Yu,
On 2/4/25 6:53 PM, Chen-Yu Tsai wrote:
On Wed, Feb 5, 2025 at 1:49 AM Quentin Schulz wrote:
Hi Chen-Yu,
On 2/4/25 6:21 PM, Chen-Yu Tsai wrote:
From: Chen-Yu Tsai
Device tree overlays are immensely useful.
Enable it by default by implying it from ARCH_ROCKCHIP.
Signed-off-by:
Enable bloblist on vexpress64 platforms to facilitate information
passing from TF-A using the firmware handoff framework.
Signed-off-by: Harrison Mutai
---
board/armltd/vexpress64/Kconfig | 2 +-
board/armltd/vexpress64/Makefile| 5 -
board/armltd/vexpress64/vexpress64.c
When the configuration option CONFIG_BLOBLIST_PASSAGE is selected, the
bloblist present in the incoming standard passage is utilised in-place.
There is no need to specify the size of the bloblist as the system
automatically detects it using the header information.
Signed-off-by: Harrison Mutai
--
When booting into the Linux kernel with semi-hosting, use the device
tree provided by hardware unless one is provided in the current
directory.
Signed-off-by: Harrison Mutai
---
include/configs/vexpress_aemv8.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/con
Fix the two typos in the spelling of same and set in common/Kconfig and
include/bloblist.h.
Signed-off-by: Harrison Mutai
---
common/Kconfig | 6 +++---
include/bloblist.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/common/Kconfig b/common/Kconfig
index 7685914fa6.
This series of patches enhances the vexpress64 platform by enabling bloblist
support. It also introduces support for CONFIG_BLOBLIST_PASSAGE. This is
necessary to boot vexpress64 and other boards without manually specifying a
fixed address and size for the bloblist.
After this change, all the blob
On Mon, Jan 27, 2025 at 05:16:12AM +0100, Wadim Egorov wrote:
> Enable configs required for detecting and fixing up for different RAM
> variants.
> Also resync after savedefconfig.
>
> Signed-off-by: Wadim Egorov
> ---
> configs/phycore_am64x_r5_defconfig | 4 +++-
> 1 file changed, 3 insertio
Hi Chen-Yu,
On 2/4/25 6:29 PM, Chen-Yu Tsai wrote:
From: Chen-Yu Tsai
In the GRF header file, some instances of UART2 pinmux are prefixed with
"GRF_UART2DBG" while others have "GRF_UART2DGB".
Since UART2 is the default console UART and used for debugging, it is
more likely the name should be
On Wed, Feb 5, 2025 at 1:49 AM Quentin Schulz wrote:
>
> Hi Chen-Yu,
>
> On 2/4/25 6:21 PM, Chen-Yu Tsai wrote:
> > From: Chen-Yu Tsai
> >
> > Device tree overlays are immensely useful.
> >
> > Enable it by default by implying it from ARCH_ROCKCHIP.
> >
> > Signed-off-by: Chen-Yu Tsai
> > ---
>
Hi Chen-Yu,
On 2/4/25 6:21 PM, Chen-Yu Tsai wrote:
From: Chen-Yu Tsai
Device tree overlays are immensely useful.
Enable it by default by implying it from ARCH_ROCKCHIP.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig
Hi Chen-Yu,
On 2/4/25 6:23 PM, Chen-Yu Tsai wrote:
From: Chen-Yu Tsai
The IO domain driver controls the I/O voltage for various pins,
MMC included.
Enable it by default for all supported Rockchip SoCs.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Quentin Schulz
Thanks!
Quentin
Hi Justin,
On 1/28/25 10:37 PM, Justin Klaassen wrote:
Allows use of the regulator functions of the RK8XX PMIC in SPL, which is
necessary to support the functionality of the Rockchip IO-domain driver
on relevant platforms.
Signed-off-by: Justin Klaassen
---
Changes in v2:
- Added separate pat
Hi Justin,
On 1/28/25 10:37 PM, Justin Klaassen wrote:
Allows use of the regulator functions of the RK8XX PMIC in SPL, which is
necessary to support the functionality of the Rockchip IO-domain driver
on relevant platforms.
Signed-off-by: Justin Klaassen
---
Changes in v2:
- Added separate pat
From: Chen-Yu Tsai
In the GRF header file, some instances of UART2 pinmux are prefixed with
"GRF_UART2DBG" while others have "GRF_UART2DGB".
Since UART2 is the default console UART and used for debugging, it is
more likely the name should be UART2DBG.
Fix the ones that are wrong.
Fixes: a2c08d
Hi Justin,
On 1/28/25 10:37 PM, Justin Klaassen wrote:
[You don't often get email from jus...@tidylabs.net. Learn why this is
important at https://aka.ms/LearnAboutSenderIdentification ]
Log the value of the regulators during initialization of the IO-domain
driver to aid in debugging GPIO volt
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