The TPL image must be built for each board we need to support. It is the
only part of the image which is board-specific.
This helps to save space and reduce the size of TPL, so that it can fit
within the internal 192K IRAM.
As with other phases, the TPL devicetree is run through fdtgrep to
remove unwanted nodes and properties and reduce its size.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/arm/dts/rockchip-u-boot.dtsi | 42 +++++++++++++++++++++----------
1 file changed, 29 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 0611533a310..f6348c532a4 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -254,23 +254,23 @@
pad-byte = <0xff>;
skip-at-start = <0x8000>;
- mkimage {
- filename = "idbloader.img";
- args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
- multiple-data-files;
+#ifdef CONFIG_VPL
+ alternates-fdt {
+ fdt-list-dir = "dts/upstream/src/arm64/rockchip";
+ filename-pattern = "alt-NAME.bin";
+ fdt-phase = "tpl";
-#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
- rockchip-tpl {
- };
-#elif defined(CONFIG_TPL)
- u-boot-tpl {
- };
-#endif
- u-boot-spl {
+ mkimage {
+ filename = "idbloader.img";
+ args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+ multiple-data-files;
+
+ u-boot-tpl {
+ symbols-base = <0>;
+ };
};
};
-#ifdef CONFIG_VPL
vpl {
type = "fit";
offset = <(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR *
0x200 + 0x8000)>;
@@ -361,6 +361,22 @@
# endif /* VBE method */
#else /* !VPL */
+ mkimage {
+ filename = "idbloader.img";
+ args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+ multiple-data-files;
+
+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
+ rockchip-tpl {
+ };
+#elif defined(CONFIG_TPL)
+ u-boot-tpl {
+ };
+#endif
+ u-boot-spl {
+ };
+ };
+
#ifdef HAS_FIT
fit {
offset = <CONFIG_SPL_PAD_TO>;
--
2.43.0
