Re: [U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

Hi Priyanka, > -Original Message- > From: Priyanka Jain > Sent: Monday, October 21, 2019 11:13 AM > To: Wasim Khan ; Z.q. Hou > Cc: u-boot@lists.denx.de > Subject: RE: [PATCH 3/8] pci: layerscape: Update API names for layerscape > fixup > > > >-Original Message- > >From: Wasim

Re: [U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

On 21/10/2019 08:32, Keerthy wrote: On 15/10/19 12:27 PM, Lokesh Vutla wrote: [..snip..] +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index f431f3bf29..605b52905e 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -31,6 +31,7 @@ enum uclass_id {   UC

Re: [U-Boot] [PATCH 1/2] armv8: dts: ls1088a: add PSCI binding for LS1088A

>-Original Message- >From: Mathew McBride >Sent: Saturday, October 19, 2019 2:16 AM >To: Priyanka Jain ; u-boot@lists.denx.de; Pramod >Kumar >Subject: RE: [PATCH 1/2] armv8: dts: ls1088a: add PSCI binding for LS1088A > >Hell Priyanka, > > >>-Original Message- >>From: Mathew McBr

Re: [U-Boot] [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup

>-Original Message- >From: Wasim Khan >Sent: Friday, October 18, 2019 7:38 PM >To: Priyanka Jain >Cc: u-boot@lists.denx.de; Wasim Khan >Subject: [PATCH 3/8] pci: layerscape: Update API names for layerscape fixup > >Update API names for layerscape fixup. Better description woul be suffix

Re: [U-Boot] [PATCH 2/8] pci: layerscape: Add stream_id_cur field to ls_pcie structure

>-Original Message- >From: Wasim Khan >Sent: Friday, October 18, 2019 7:38 PM >To: Priyanka Jain >Cc: u-boot@lists.denx.de; Wasim Khan >Subject: [PATCH 2/8] pci: layerscape: Add stream_id_cur field to ls_pcie >structure > >Add stream_id_cur field to ls_pcie structure and initialize it w

Re: [U-Boot] [PATCH 1/8] driver/pci : enable pcie layerscape code for pcie gen4 code

>-Original Message- >From: Wasim Khan >Sent: Friday, October 18, 2019 7:38 PM >To: Priyanka Jain >Cc: u-boot@lists.denx.de; Wasim Khan >Subject: [PATCH 1/8] driver/pci : enable pcie layerscape code for pcie gen4 >code > >lx2 rev2 has SNP controller. Enable pcie_layerscape code for >CON

Re: [U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

On 15/10/19 12:27 PM, Lokesh Vutla wrote: [..snip..] +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index f431f3bf29..605b52905e 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -31,6 +31,7 @@ enum uclass_id { UCLASS_ADC, /* Analog-to-

Re: [U-Boot] [PATCH v3 2/5] Makefile: Rename idbloader.img with u-boot-spl-rockchip.bin

Hi Kever, On Fri, Oct 18, 2019 at 4:26 PM Kever Yang wrote: > > Jagan, > > > On 2019/10/18 上午3:07, Jagan Teki wrote: > > idbloader.img name is specific to rockchip, > > This is specific for rockchip, like rksd, rkspi type in mkimage, since > it's clear for what it stands for, > > I think it can a

Re: [U-Boot] [PATCH v2 1/6] armv8: fsl-layerscape: guard caam specific defines

>-Original Message- >From: Laurentiu Tudor >Sent: Friday, October 18, 2019 7:34 PM >To: u-boot@lists.denx.de; Priyanka Jain >Cc: Horia Geanta >Subject: Re: [PATCH v2 1/6] armv8: fsl-layerscape: guard caam specific defines > >Hi Priyanka, > >On 18.10.2019 12:01, Laurentiu Tudor wrote: >>

[U-Boot] [PATCH v3 055/108] x86: fsp: Make graphics support common to FSP1/2

Both versions of FSP can use the same graphics support, so move it into the common directory. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/lib/fsp/Makefile | 3 +++ arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c | 2 +- arch/x86/lib/fsp1/Makefile

Re: [U-Boot] [PATCH v5 1/5] spl: dm: disable SPI DM flash for non-DM SPL

Hi Lukasz, My patches depends on your patches https://patchwork.ozlabs.org/project/uboot/list/?series=129069, do you have plan to update it? I saw that the status is "changes required", any comments? Thanks Xiaowei > -Original Message- > From: Lukasz Majewski > Sent: 2019年8月23日 4:48 >

[U-Boot] [PATCH v3 084/108] spi: ich: Support hardware sequencing

Apollolake (APL) only supports hardware sequencing. Add support for this into the SPI driver, as an option. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 205 +- drivers/spi/ich.h | 39 + 2 files

[U-Boot] [PATCH v3 107/108] x86: apollolake: Add FSP support

The memory and silicon init parts of the FSP need support code to work. Add this for apollolake. Signed-off-by: Simon Glass --- Changes in v3: - Add bootstage timing for reading vbt - Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash) - Don't allow BOOT_FROM_FAST_SPI_FLASH with

[U-Boot] [PATCH v3 035/108] x86: power: Add a 'pmc' command

Add a simple command to show information about the PMC. Signed-off-by: Simon Glass --- Changes in v3: - Rename power-mgr uclass to acpi-pmc Changes in v2: None arch/Kconfig | 1 + cmd/Kconfig | 8 ++ cmd/Makefile | 1 + cmd/pmc.c| 81 +++

[U-Boot] [PATCH v3 096/108] x86: apollolake: Add hostbridge driver

This driver models the hostbridge as a northbridge. It simply sets up the graphics BAR. It supports of-platdata. Signed-off-by: Simon Glass --- Changes in v3: - Move pad programming into the hostbridge to reduce TPL device-tree size - Use pci_get_devfn() Changes in v2: None arch/x86/cpu/apoll

[U-Boot] [PATCH v3 025/108] x86: tpl: Add a fake PCI bus

In TPL we try to minimise code size so do not include the PCI subsystem. We can use fixed BARs and drivers can directly program the devices that they need. However we do need to bind the devices on the PCI bus and without PCI this does not ordinarily happen. As a work-around, define a fake PCI bus

[U-Boot] [PATCH v3 067/108] x86: Update .dtsi file for FSP2

Include the IFWI section and the FSP-M binary. The FSP-T binary is not currently used, as CAR is set up manually. Also drop the FSP binary as this relates only to FSP1. Signed-off-by: Simon Glass --- Changes in v3: - Add FSP-S and VBT also Changes in v2: None arch/x86/dts/u-boot.dtsi | 35 ++

[U-Boot] [PATCH v3 104/108] x86: apollolake: Add P2SB driver

Adds a driver for the apollolake Primary-to-sideband bus. This supports various child devices. It supposed both device tree and of-platdata. Signed-off-by: Simon Glass --- Changes in v3: - Use pci_get_devfn() Changes in v2: None arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolak

[U-Boot] [PATCH v3 027/108] x86: Drop unnecessary cpu code for TPL

We don't need to know every detail about the CPU in TPL. Drop some superfluous functions to reduce code size. Add a simple CPU detection algorithm which just supports Intel and AMD, since we only support TPL on Intel, so far. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None

[U-Boot] [PATCH v3 070/108] x86: Add an fdtmap and image-header

Add these entries to the ROM so that we can list the contents of an image with 'binman ls'. The image-header is not essential but does speed up access. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/dts/u-boot.dtsi | 5 + 1 file changed, 5 insertions(+) di

[U-Boot] [PATCH v3 031/108] x86: Don't print CPU info in TPL

We don't need to do this and it is done (in more detail) in U-Boot proper. Drop this to save code space. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/lib/tpl.c | 5 - 1 file changed, 5 deletions(-) diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c ind

[U-Boot] [PATCH v3 076/108] spi: ich: Move init function just above probe()

It is annoying to have some of the init code in a different part of the file. Move ich_init_controller() to just above probe() to keep things together. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 122 +++---

[U-Boot] [PATCH v3 089/108] x86: apollolake: Add basic IO addresses

Add some fixed IO and mmap addresses for use in the device tree and with some early-init code. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/include/asm/arch-apollolake/iomap.h | 28 1 file changed, 28 insertions(+) create mode 100644 arc

[U-Boot] [PATCH v3 088/108] mtd: spi: Export spi_flash_std_probe()

With of-platdata we need to create drivers for particular chips, or at least drivers that are separate from the standard code, since C structures are created by dtoc which are private to that driver. To avoid duplicating the probing code, export this probe function for use by these drivers. Signe

[U-Boot] [PATCH v3 100/108] x86: apollolake: Add PUNIT driver

Add a driver for the apollolake power unit. It is modelled as a syscon driver since it only needs to be probed. Signed-off-by: Simon Glass --- Changes in v3: - Use pci_get_devfn() Changes in v2: None arch/x86/cpu/apollolake/Makefile | 3 + arch/x86/cpu/apollolake/punit.c | 121

[U-Boot] [PATCH v3 060/108] x86: fsp: Allow remembering the location of FSP-S

FSP-S is used by the notify call after it has been used for silicon init. To avoid having to load it again, add a field to store the location. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/include/asm/global_data.h | 3 +++ 1 file changed, 3 insertions(+) dif

[U-Boot] [PATCH v3 066/108] x86: Update the fsp command for FSP2

The current 'fsp' command only works with FSP1. Update it to handle FSP2 as well. Convert everything to hex which is what U-Boot uses. Signed-off-by: Simon Glass --- Changes in v3: - Convert code to use hex increased of decimal - Update the 'fsp' command for FSP2, instead of disabling it Change

[U-Boot] [PATCH v3 098/108] x86: apollolake: Add LPC driver

This driver the LPC and provides a few functions to set up LPC features. These should probably use ioctls() or perhaps, better, have specific uclass methods. Signed-off-by: Simon Glass --- Changes in v3: - Drop unused code in lpc_configure_pads() - Fix value of LPC_BC_LE Changes in v2: None a

[U-Boot] [PATCH v3 041/108] x86: Reduce mrccache record alignment size

At present the records are 4KB in size. This is unnecessarily large when the SPI-flash erase size is 256 bytes. Reduce it so it will be more efficient with Apollolake's 24-byte variable-data record. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/include/asm/mrc

[U-Boot] [PATCH v3 077/108] spi: ich: Move the protection/lockdown code into a function

Reduce the size of the probe function but putting this code into its own function. Also remove the assumption that the PCH is always a parent of the SPI controller, as this is not the case APL platforms. Use driver model to find the PCH instead. Signed-off-by: Simon Glass --- Changes in v3: Non

[U-Boot] [PATCH v3 053/108] x86: Allow removal of standard PCH drivers

These drivers are not needed on all platforms. While they are small, it is useful in TPL to drop then. Add Kconfig control to allow this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: - Change 'queensbay' to 'baytrail' in help - Fix 'proides' typo dri

[U-Boot] [PATCH v3 108/108] x86: Add chromebook_coral

Add support for coral which is a range of apollolake-based Chromebook released in 2017. This also includes reef released in 2016, since it is based on the same SoC. Signed-off-by: Simon Glass --- Changes in v3: - Ad FSP-S support - Add CONFIG_TPL_X86_ASSUME_CPUID to reduce code size - Add Chrome

[U-Boot] [PATCH v3 071/108] x86: Don't repeat microcode in U-Boot if not needed

At present if SPL sets up the microcode then it is still included in U-Boot as well. This is wasteful as microcode is large. Adjust the logic in the image to prevent this. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/dts/u-boot.dtsi | 7 +++ 1 file change

[U-Boot] [PATCH v3 068/108] x86: Add an option to control the position of U-Boot

The existing work-around for positioning U-Boot in the ROM when it actually runs from RAM still exists and there is not obvious way to change this. Add a proper Kconfig option to handle this case. This also adds a new bool property to indicate whether CONFIG_SYS_TEXT_BASE exists. Signed-off-by: S

[U-Boot] [PATCH v3 034/108] x86: sandbox: Add a PMC emulator and test

Add a simple PMC for sandbox to permit tests to run. Signed-off-by: Simon Glass --- Changes in v3: - Rename power-mgr uclass to acpi-pmc Changes in v2: None Makefile | 3 +- arch/Kconfig | 2 + arch/sandbox/dts/sandbox.dtsi | 14 ++ arch/

[U-Boot] [PATCH v3 057/108] x86: fsp: Add FSP2 base support

Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_M and memory-mapped SPI reads. Signed-off-by: Simon Glass --- Chang

[U-Boot] [PATCH v3 074/108] spi: Correct operations check in dm_spi_xfer()

At present we have to have an xfer() method even if it does nothing. This is not correct, so fix it. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c| 9 + drivers/spi/spi-uclass.c | 5 - include/spi.h| 2 +- 3 files chang

[U-Boot] [PATCH v3 043/108] x86: Adjust mrccache_get_region() to use livetree

Change the algorithm to first find the flash device then read the properties using the livetree API. With this change the device is not probed so this needs to be done in mrccache_save(). Signed-off-by: Simon Glass --- Changes in v3: - Update mrccache livetree patch to just convert to livetree

[U-Boot] [PATCH v3 050/108] x86: Set the DRAM banks to reflect real location

At present with fsp a single DRAM bank is added which extends to the whole size of memory. However there is typically only 2GB of memory available below the 4GB boundary, and this is what is used by U-Boot while running in 32-bit mode. Scan the tables to set the banks correct. The first bank is se

[U-Boot] [PATCH v3 056/108] x86: fsp: Correct wrong header inlude in fsp_support.c

This generic FSP file should include the generic FSP support header, not the FSP1 version. Fix it. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/lib/fsp/fsp_support.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/fsp/fsp_supp

[U-Boot] [PATCH v3 045/108] x86: Add a new global_data member for the cache record

At present we reuse the mrc_output char * to also point to the cache record after it has been set up. This is confusing and doesn't save much data space. Add a new mrc_cache member instead. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: None arch/x86/

[U-Boot] [PATCH v3 102/108] x86: apollolake: Add a CPU driver

Add a bare-bones CPU driver so that CPUs can be probed. Signed-off-by: Simon Glass --- Changes in v3: - Add two more defines for the CPU driver - Expand comments for BOOT_FROM_FAST_SPI_FLASH Changes in v2: None arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/cpu.c

[U-Boot] [PATCH v3 080/108] spi: ich: Various small tidy-ups

Use debug() instead of printf() to reduce code size and change a bool return value to the use the 'bool' type. Also drop the global data declaration since it not actually used. Finally, set the log category. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich

[U-Boot] [PATCH v3 062/108] x86: Don't include the BIOS emulator in TPL

We don't generally have enough space to run this, so don't build it into TPL. This helps reduce the size of TPL. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: None arch/x86/lib/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/li

[U-Boot] [PATCH v3 075/108] x86: spi: Don't enable SPI_FLASH_BAR by default

We don't normally need this on x86 unless the size of SPI flash devices is larger than 16MB. This can be enabled by particular SoCs as needed, since it adds to code size. Drop the default enabling of this option on x86. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None dr

[U-Boot] [PATCH v3 097/108] x86: apollolake: Add ITSS driver

This driver models some sort of interrupt thingy but there are so many abreviations that I cannot find out what it stands for. Possibly something to do with interrupts. Signed-off-by: Simon Glass --- Changes in v3: - Add snapshot/restore for IRQs - Use the IRQ uclass instead of ITSS Changes in

[U-Boot] [PATCH v3 086/108] spi: ich: Add TPL support

In TPL we want to reduce code size and support running with CONFIG_PCI disabled. Add special code to handle this using a fixed BAR programmed into the SPI on boot. Also cache the SPI flash to speed up boot. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.

[U-Boot] [PATCH v3 038/108] x86: Move UCLASS_IRQ into a separate file

Update this uclass to support the needs of the apollolake ITSS. It supports four operations. Move the uclass into a separate directory so that sandbox can use it too. Add a new Kconfig to control it and enable this on x86. Signed-off-by: Simon Glass --- Changes in v3: - Add two more operations

[U-Boot] [PATCH v3 024/108] x86: spl: Support init of a PUNIT

The x86 power unit handles power management. Support initing this device which is modelled as a new type of system controller since there are no operations needed. Signed-off-by: Simon Glass --- Changes in v3: - Fix 'err-%d' typo Changes in v2: None arch/x86/include/asm/cpu.h | 1 + arch/x86

[U-Boot] [PATCH v3 052/108] x86: Don't imply libfdt or SPI flash in TPL

We don't want to pull in libfdt if of-platdata is being used, since it reduces the available code-size saves. Also, SPI flash is seldom needed in TPL. Drop these options. Signed-off-by: Simon Glass --- Changes in v3: - Don't imply SPI flash either - Rewrite commit message Changes in v2: None

[U-Boot] [PATCH v3 022/108] x86: timer: Use a separate flag for whether timer is inited

At present the value of the timer base is used to determine whether the timer has been set up or not. It is true that the timer is essentially never exactly 0 when it is read. However 'time 0' may indicate the time that the machine was reset so it is useful to be able to denote that. Update the co

[U-Boot] [PATCH v3 093/108] x86: apollolake: Add GPIO driver

Add a driver for the apollolake GPIOs. It also handles pinctrl since this is not very well separated on x86. Signed-off-by: Simon Glass --- Changes in v3: - Fix mixed case in GPIO defines - Rework how pads configuration is defined in TPL and SPL - Use the IRQ uclass instead of ITSS Changes in v

[U-Boot] [PATCH v3 090/108] x86: apollolake: Add PMC driver

Add a driver for the apollolake SoC. It supports the basic operations and can use device tree or of-platdata. Signed-off-by: Simon Glass --- Changes in v3: - Use pci_get_devfn() Changes in v2: None arch/x86/cpu/apollolake/Makefile | 5 + arch/x86/cpu/apollolake/pmc.c |

[U-Boot] [PATCH v3 047/108] x86: Update mrccache to support multiple caches

With apollolake we need to support a normal cache, which almost never changes and a much smaller 'variable' cache which changes every time. Update the code to add a cache type, use an array for the caches and use a for loop to iterate over the caches. Signed-off-by: Simon Glass --- Changes in v

[U-Boot] [PATCH v3 048/108] x86: Add mrccache support for a 'variable' cache

Add support for a second cache type, for apollolake. Signed-off-by: Simon Glass --- Changes in v3: - Move the mrccache_get_region() change into this patch Changes in v2: None arch/x86/include/asm/mrccache.h | 1 + arch/x86/lib/mrccache.c | 3 ++- 2 files changed, 3 insertions(+), 1 de

[U-Boot] [PATCH v3 058/108] x86: fsp: Set up an MTRR for the graphics frame buffer

The FSP-S may do this but at least for coral it does not. Set this up so that graphics is not deathly slow. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/lib/fsp/fsp_graphics.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/x86/lib/fsp/fsp_graphi

[U-Boot] [PATCH v3 051/108] x86: Set up the MTRR for SDRAM

Set up MTRRs for the FST SDRAM regions to improve performance. Signed-off-by: Simon Glass --- Changes in v3: - Move mtrr_add_request() call into this patch Changes in v2: None arch/x86/lib/fsp/fsp_dram.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/lib/fsp/fsp_dram.c b/ar

[U-Boot] [PATCH v3 063/108] x86: Add an option to include a FIT

Many Intel SoCs require a FIT in order to boot properly. Add an option to include this and enable it by default. Signed-off-by: Simon Glass --- Changes in v3: - Add help to CONFIG_FIT and don't make it 'default y' Changes in v2: None arch/x86/Kconfig | 9 + arch/x86/dts/u-boot

[U-Boot] [PATCH v3 085/108] spi: ich: Add support for get_mmap() method

Add this method so that the memory-mapped location of the SPI flash can be queried. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 32 1 file changed, 32 insertions(+) diff --git a/drivers/spi/ich.c b/drivers/spi/ich

[U-Boot] [PATCH v3 092/108] x86: apollolake: Add UART driver

Add a driver for the apollolake UART. It uses the standard ns16550 device but also sets up the input clock with LPSS and supports configuration via of-platdata. Signed-off-by: Simon Glass --- Changes in v3: - Use the LPSS code from a separate file Changes in v2: None arch/x86/cpu/apollolake/M

[U-Boot] [PATCH v3 081/108] spi: ich: Add mmio_base to struct ich_spi_platdata

It is useful to store the mmio base in platdata. It reduces the amount of casting needed. Update the code and move the struct to the C file at the same time, as we will need to use with of-platdata. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 27 +

[U-Boot] [PATCH v3 083/108] spi: ich: Support of-platdata for fast-spi

The Intel Fast SPI interface is similar to ICH. Add of-platdata support for this using the "intel,fast-spi" compatible string. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff

[U-Boot] [PATCH v3 072/108] x86: Separate out U-Boot and device tree in ROM image

At present binman does not support updating a device tree that is part of U-Boot (i.e u-boot.bin). Separate the entries into two so that we can get updated entry information. This makes binman_entry_find() work correctly. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None a

[U-Boot] [PATCH v3 082/108] spi: ich: Correct max-size bug in ich_spi_adjust_size()

This incorrectly shortens read operations if there is a maximum write size but no maximum read size. Fix it. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/spi/ich.c b/

[U-Boot] [PATCH v3 032/108] x86: Quieten TPL's jump_to_image_no_args()

We already a message indicating that U-Boot is about to jump to SPL, so make this one a debug() to reduce code size. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/lib/tpl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/tpl.c

[U-Boot] [PATCH v3 059/108] x86: fsp: Add a new arch_fsp_init_r() hook

With FSP2 we need to run silicon init early after relocation. Add a new hook for this. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None common/board_r.c | 3 +++ include/init.h | 11 +++ 2 files changed, 14 insertions(+) diff --git a/common/board_r.c b/common/

[U-Boot] [PATCH v3 023/108] x86: timer: Allow a timer base of 0

On some platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the t

[U-Boot] [PATCH v3 033/108] x86: power: Add an ACPI PMC uclass

Intel x86 SoCs have a power manager/controller which handles several power-related aspects of the platform. Add a uclass for this, with a few useful operations. Signed-off-by: Simon Glass --- Changes in v3: - Rename power-mgr uclass to acpi-pmc Changes in v2: None drivers/power/Kconfig

[U-Boot] [PATCH v3 037/108] sandbox: Add PCI driver and test for p2sb

Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass --- Changes in v3: - Fix build errors in sandbox_spl, etc Changes in v2: None arch/sandbox/cpu/state.c | 1 + arch/s

[U-Boot] [PATCH v3 028/108] x86: Drop unnecessary interrupt code for TPL

We don't expect an exception in TPL and don't need to print out full details if one happens. Add a reduced version of the code for TPL. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/i386/interrupt.c | 13 + 1 file changed, 13 insertions(+) dif

[U-Boot] [PATCH v3 103/108] x86: apollolake: Add SPL/TPL init

Add code to init the system both in TPL and SPL. Each phase has its own procedure. Signed-off-by: Simon Glass --- Changes in v3: - Adjust fast_spi_cache_bios_region() to avoid using SPI driver - Drop calls to x86_cpu_init_f(), x86_cpu_reinit_f() - Fix build error when debug UART is disabled - In

[U-Boot] [PATCH v3 091/108] x86: apollolake: Add low-power subsystem (lpss) support

Add very basic support for taking an lpss device out of reset. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/lpss.c | 31 +++ arch/x86/include/asm/lpss.h | 11 ++

[U-Boot] [PATCH v3 061/108] x86: fsp: Make the notify API call common

The fsp_notify() API is the same for FSP1 and FSP2. Move it into a new common API file. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/include/asm/fsp/fsp_api.h | 27 +++ arch/x86/include/asm/fsp1/fsp_api.h | 21 +++-- 2

[U-Boot] [PATCH v3 094/108] i2c: designware: Add apollolake support

For apollolake we need to take the I2C bus controller out of reset before using this. Add this functionality to the driver. Signed-off-by: Simon Glass --- Changes in v3: - Add a weak function to avoid errors on other platforms Changes in v2: None drivers/i2c/dw_i2c_pci.c | 20

[U-Boot] [PATCH v3 046/108] x86: Tidy up error handling in mrccache_save()

This function is a bit confusing at present due to the error handling. Update it to remove the goto, returning errors as they happen. While we are here, use hex for the data size since this is the norm in U-Boot. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: - Move an add

[U-Boot] [PATCH v3 073/108] x86: Make MSR_PKG_POWER_SKU common

This is used on several boards so add it to the common file. Also add a useful power-limit value while we are here. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/include/asm/arch-broadwell/cpu.h | 1 - arch/x86/include/asm/arch-ivybridge/model_206ax.h

[U-Boot] [PATCH v3 095/108] x86: apollolake: Add systemagent driver

This driver handles communication with the systemagent which needs to be told when U-Boot has completed its init. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/apollolake/Makefile | 2 ++ arch/x86/cpu/apollolake/systemagent.c | 19 +++

[U-Boot] [PATCH v3 064/108] x86: Add support for newer CAR schemes

Newer Intel SoCs have different ways of setting up cache-as-ram (CAR). Add support for these along with suitable configuration options. Signed-off-by: Simon Glass --- Changes in v3: - Drop unneeded Kconfig file Changes in v2: None arch/x86/Kconfig| 16 + arch/x86/cpu/

[U-Boot] [PATCH v3 039/108] sandbox: Add a test for IRQ

Add a simple sandbox test for this uclass. Signed-off-by: Simon Glass --- Changes in v3: - Change the sandbox test from ITSS to IRQ Changes in v2: None arch/sandbox/dts/test.dts | 4 +++ configs/sandbox_defconfig | 3 +- configs/sandbox_flattree_defconfig | 1 + configs/s

[U-Boot] [PATCH v3 079/108] spi: ich: Fix header order

Move the header files into the right order. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 7c29369a169..516b859a674 100644 --- a/drivers

[U-Boot] [PATCH v3 054/108] x86: Allow interrupt to happen once

At present the interrupt table is included in all phases of U-Boot. Allow it to be omitted, e.g. in TPL, to reduce size. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: - Move write_pirq_routing_table() to avoid 64-bit build error Changes in v2: None arch/x86/cpu/Makefile

[U-Boot] [PATCH v3 087/108] spi: ich: Add Apollolake support

Add support for Apollolake to the ICH driver. This involves adjusting the mmio address and skipping setting of the bbar. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 19 ++- drivers/spi/ich.h | 1 + 2 files changed, 15 insertions(+

[U-Boot] [PATCH v3 069/108] x86: Add an option to control the position of SPL

For apollolake SPL is run from CAR (cache-as-RAM) which is in a different location from where SPL must be placed in ROM. In other words, although SPL runs before SDRAM is set up, it is not execute-in-place (XIP). Add a Kconfig option for the ROM position. Signed-off-by: Simon Glass --- Changes

[U-Boot] [PATCH v3 042/108] x86: Correct mrccache find_next_mrc_cache() calculation

This should take account of the end of the new cache record since a record cannot extend beyond the end of the flash region. This problem was not seen before due to the alignment of the relatively small amount of MRC data. But with apollolake the MRC data is about 45KB, even if most of it is zeroe

[U-Boot] [PATCH v3 040/108] x86: Define the SPL image start

Define this symbol so that we can use binman symbols correctly. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/u-boot-spl.lds | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds i

[U-Boot] [PATCH v3 030/108] x86: Move CPU init to before spl_init()

At present we call spl_init() before identifying the CPU. This is not a good idea - e.g. if bootstage is enabled then it will try to set up the timer which works better if the CPU is identified. Put explicit code at each entry pointer to identify the CPU. Signed-off-by: Simon Glass --- Changes

[U-Boot] [PATCH v3 029/108] x86: Add a CPU init function for TPL

For TPL we only need to set up the features and identify the CPU to a basic level. Add a function to handle that. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/x86/cpu/i386/cpu.c | 8 arch/x86/include/asm/u-boot-x86.h | 9 + 2 files chan

[U-Boot] [PATCH v3 026/108] x86: timer: Reduce timer code size in TPL on Intel CPUs

Most of the timer-calibration methods are not needed on recent Intel CPUs and just increase code size. Add an option to use the known-good way to get the clock frequency in TPL. Size reduction is about 700 bytes. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/ti

[U-Boot] [PATCH v3 049/108] x86: Move fsp_prepare_mrc_cache() to fsp1 directory

This function needs to be different for FSP2, so move the existing function into the fsp1 directory. Since it is only called from one file, drop it from the header file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: None arch/x86/include/asm/fsp/fsp_s

[U-Boot] [PATCH v3 099/108] x86: apollolake: Add PCH driver

Add a driver for the apollolake Platform Controller Hub. It does not have any functionality and is just a placeholder for now. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: - Drop probe() function - Implement set_spi_protect() arch/x86/cpu/apollolake/Makefile | 1

[U-Boot] [PATCH v3 015/108] dm: doc: Correct of-platdata driver name

Add a note about the driver name in the of-platdata documentation since the naming must follow the compatible string. Signed-off-by: Simon Glass --- Changes in v3: - Rework patch now that the original CONFIG_IS_ENABLED() problems is fixed Changes in v2: None doc/driver-model/of-plat.rst | 2 +

[U-Boot] [PATCH v3 078/108] spi: ich: Convert to livetree

Use dev_get_driver_data() to obtain the device type. It has the same effect and is shorter. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None drivers/spi/ich.c | 22 +- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/spi/ich.c b/d

[U-Boot] [PATCH v3 014/108] spi: Add support for memory-mapped flash

On x86 platforms the SPI flash can be mapped into memory so that the contents can be read with normal memory accesses. Add a new SPI method to find the location of the SPI flash in memory. This differs from the existing device-tree "memory-map" mechanism in that the location can be discovered at r

[U-Boot] [PATCH v3 065/108] x86: Disable microcode section for FSP2

At present we don't support loading microcode with FSP2. The correct way to do this is by adding it to the FIT. For now, disable including microcode in the image. Signed-off-by: Simon Glass --- Changes in v3: - Drop unnecessary #else part of CONFIG_HAVE_MICROCODE Changes in v2: None arch/x86/

[U-Boot] [PATCH v3 105/108] x86: apollolake: Add Kconfig and Makefile

Add basic plumbing to allow apollolake support to be used. Signed-off-by: Simon Glass --- Changes in v3: - Add MMC, video, USB configs - Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot - Fix the incorrect value of CPU_ADDR_BITS Changes in v2: None arch/x86/Kconfig| 1

[U-Boot] [PATCH v3 036/108] pci: Add support for p2sb uclass

The Primary-to-Sideband bus (P2SB) is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added in the device tree as

[U-Boot] [PATCH v3 101/108] x86: apollolake: Add SPL loaders

Add loaders for SPL and TPL so that the next stage can be loaded from memory-mapped SPI or, failing that, the Fast SPI driver. Signed-off-by: Simon Glass --- Changes in v3: - Add a driver for APL SPI for TPL (using of-platdata) - Support TPL without CONFIG_TPL_SPI_SUPPORT - Support bootstage ti

[U-Boot] [PATCH v3 106/108] x86: apollolake: Add FSP structures

These are mostly specific to a particular SoC. Add the definitions for apollolake. Signed-off-by: Simon Glass --- Changes in v3: - Add VBT signature - Add structures for FSP-S also - Drop struct fsp_usp_header as it is now in the API file Changes in v2: None .../asm/arch-apollolake/fsp/fsp_co

[U-Boot] [PATCH v3 012/108] spl: Correct priority selection for image loaders

At present the name of the image comes first in the linker-list symbol used. This means that the name of the function sets the sort order, which is not the intention. Update it to put the boot-device type first, then the priority. This produces the expected behaviour. Signed-off-by: Simon Glass

[U-Boot] [PATCH v3 018/108] Revert "RFC: sandbox: net: Suppress the MAC-address warnings"

This reverts commit 96ac4def8b6686de8566b91419ce98cd5765079b. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None arch/sandbox/cpu/state.c | 12 ++-- arch/sandbox/include/asm/state.h | 5 + cmd/nvedit.c | 8 include/configs/

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