Fix an off-by-one error in `mips_cpu_gdb_write_register' for register
#72 that is handled further down in that function rather than here,
matching how `mips_cpu_gdb_read_register' handles it. This register
slot is a fake anyway, there's nothing in hardware that corresponds to
it.
Signed-off-b
CP1.FIR is read-only in hardware so gdbstub must respect it. We already
respect it for CTC1 instructions, so do it here too.
Signed-off-by: Maciej W. Rozycki
---
Not much to say about it here. Please apply.
Maciej
qemu-mips-fir.diff
Index: qemu-git-trunk/target-mips/gdbstub.c
=
* David Gibson (da...@gibson.dropbear.id.au) wrote:
> On Fri, Oct 03, 2014 at 06:47:17PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > The return path uses a non-blocking fd so as not to block waiting
> > for the (possibly broken) destination to finish retu
* David Gibson (da...@gibson.dropbear.id.au) wrote:
> On Fri, Oct 03, 2014 at 06:47:16PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Postcopy needs a method to send messages from the destination back to
> > the source, this is the 'return path'.
> >
> >
Make microMIPS FP branches respect CP0.Status.CU1 and trap with a
Coprocessor Unusable exception if COP1 has been disabled; also trap if
no FPU is present at all.
Standard MIPS FP instruction encodings have a more regular structure and
branches are covered with a single umbrella along other ins
On Mon, 03 Nov 2014 18:32:51 +0100
Paolo Bonzini wrote:
>
>
> On 03/11/2014 18:00, Igor Mammedov wrote:
> >> > This will always be off by 4 or so due to system RAM and ROM
> >> > slots. I think patch 1 is enough.
> > The goal of this patch is to prevent starting guest with not
> > supported am
On 11/02/2014 02:21 AM, Michael Tokarev wrote:
All "modern" 2-way drive/device specifications need to explicitly
specify if=none for the drive for it to not be used in the default
ide bus implicitly.
Which behave like this? I am reasonably sheltered in the IDE and S/ATA
lands.
But how abo
Performance wise it's better to align GVA by the backend's
page size.
Also do not allow to create DIMM device with suboptimal
size (i.e. not aligned to backends page size) to aviod
memory loss.
Do above only for 2.2 and newer machine types to avoid
breaking working configs with 2.1 machine type.
Add the 5KEc and 5KEf processors from MIPS Technologies that are the
original implementation of the MIPS64r2 ISA.
Silicon for these processors has never been taped out and no soft cores
were released even. They do exist though, a CP0.PRId value has been
assigned and experimental RTLs produced
On Monday 03 November 2014 15:58:35 Michael Tokarev wrote:
> 03.11.2014 15:22, Peter Wu wrote:
> []
> > As an aside, would it be possible to override the samba binary at runtime,
> > without compiling? Either an envvar (SMBD) or an option (-net
> > user,smb=...,smbd=...).
>
> The whole thing needs
On 11/03/2014 07:35 AM, Paolo Bonzini wrote:
On 31/10/2014 21:03, John Snow wrote:
- Adjust the prepare_buf() callback to return, simply, the number
of bytes it was able to prepare, or -1 on error. This resolves
an ambiguity around the nature of its return code meaning
"no sectors" or
The Power ISA supports a mode in many floating point instructions whereby
the Condition Register field 1 (CR[1]) receives a copy of the Floating
Point Status (FPSCR) bits 32:35, also known as FX, FEX VX and OX.
The existing QEMU code is mostly wrong -- CR[1] is set to the Floating
Point Condition
This patch series corrects some issues with floating point emulation
on Power.
Patch 1 corrects a corner case in the square root instructions, which
incorrectly react to NaNs whose sign bit is a 1.
Patches 2-6 correct a pervasive problem with modeling of the CR[1]
field (i.e. the so-called "dot f
The Power ISA square root instructions (fsqrt[s], frsqrte[s]) must
set the FPSCR[VXSQRT] flag when operating on a negative value.
However, NaNs have no sign and therefore this flag should not
be set when operating on one.
Change the order of the checks in the helper code. Move the
SNaN-to-QNaN ma
The Floating Point Move instructions (fmr., fabs., fnabs., fneg.,
and fcpsgn.) incorrectly copy FPSCR[FPCC] instead of [FX,FEX,VX,OX].
Furthermore, the current code does this via a call to gen_compute_fprf,
which is awkward since these instructions do not actually set FPRF.
Change the code to use
The set_fprf argument to the gen_compute_fprf() utility is no longer
needed -- gen_compute_fprf() is now called only when FPRF is actually
computed and set. Eliminate the obsolete argument.
Signed-off-by: Tom Musta
---
target-ppc/translate.c | 38 +++---
1 file
Eliminate the set_rc argument from the gen_compute_fprf utility and
the corresponding (and incorrect) implementation. Replace it with
calls to the gen_set_cr1_from_fpscr() utility.
Signed-off-by: Tom Musta
---
target-ppc/translate.c | 55 ---
1 file
The set_fprf argument to the helper_compute_fprf helper function
is no longer necessary -- the helper is only invoked when FPSCR[FPRF]
is going to be set.
Eliminate the unnecessary argument from the function signature and
its corresponding implementation. Change the return value of the
helper to
Update the Move From FPSCR (mffs.) instruction to correctly
set CR[1] from FPSCR[FX,FEX,VX,OX].
Signed-off-by: Tom Musta
---
target-ppc/translate.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 9653ba9..0247af5 1
On 3 November 2014 11:50, Stefan Hajnoczi wrote:
> The following changes since commit 0a2923f8488498000eec54871456aa64a4391da4:
>
> tcg/mips: fix store softmmu slow path (2014-11-02 13:30:00 +0100)
>
> are available in the git repository at:
>
> git://github.com/stefanha/qemu.git tags/block-pu
Added DACR32_EL2 definition and converted dacr fields to uint64_t in v9.
On 31 October 2014 10:38, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > When EL3 is running in AArch32 (or ARMv7 with Security Extensions)
> > DACR has a secure and
You seem to not be a fan of the fields setting moved around and Fabian
appears to have done this in a number of places. I left them as is because
I found the changes to add consistency and compactness.
Would you like me to undo any such changes?
Greg
On 31 October 2014 12:22, Peter Maydell wro
On 11/03/2014 08:32 AM, Daniel P. Berrange wrote:
On Mon, Nov 03, 2014 at 02:11:35PM +0100, Kevin Wolf wrote:
Am 03.11.2014 um 14:06 hat Cornelia Huck geschrieben:
After the latest gtk updates, master fails to build for me on a
SLES11SP3 machine:
/home/cohuck/git/qemu/ui/gtk.c: In function ‘gd
On 3 November 2014 22:06, Greg Bellows wrote:
> You seem to not be a fan of the fields setting moved around and Fabian
> appears to have done this in a number of places. I left them as is because
> I found the changes to add consistency and compactness.
I particularly dislike it where it makes t
On 3 November 2014 12:02, wrote:
> From: Riku Voipio
>
> The following changes since commit 0a2923f8488498000eec54871456aa64a4391da4:
>
> tcg/mips: fix store softmmu slow path (2014-11-02 13:30:00 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/riku.voipio/
On 31 October 2014 12:27, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > When EL3 is running in AArch32 (or ARMv7 with Security Extensions)
> > FCSEIDR, CONTEXTIDR, TPIDRURW, TPIDRURO and TPIDRPRW have a secure
> > and a non-secure instance
On 11/03/2014 03:31 PM, Alexander Graf wrote:
>
>
> On 30.10.14 13:33, Peter Maydell wrote:
>> Ping! It would be nice to be able to get glib2.12 builds fixed...
>
> Thanks, applied to ppc-next.
Uff. I misread the original mail and decided I have to do the patch :)
I checked ppc-next, works fine
On 31 October 2014 11:24, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > When EL3 is running in AArch32 (or ARMv7 with Security Extensions)
> > IFAR and DFAR have a secure and a non-secure instance.
> >
> > Signed-off-by: Fabian Aggeler
>
On 31 October 2014 12:21, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > When EL3 is running in AArch32 (or ARMv7 with Security Extensions)
> > PAR has a secure and a non-secure instance.
> >
> > Signed-off-by: Fabian Aggeler
> > Signed-of
On 31 October 2014 12:31, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > Added CP register info entries for the ARMv7 MAIR0/1 secure banks.
> >
> > Signed-off-by: Greg Bellows
> >
> > ---
> >
> > v5 -> v6
> > - Changed _el field variants to be array based
> > ---
> >
This patch series may require, and is based on another
AHCI series pending on-list:
http://lists.gnu.org/archive/html/qemu-devel/2014-10/msg04143.html
This series aims to improve the way that handle_cmd
reads and behaves in interpreting the FIS packets
received by the AHCI HBA. This series used to
A small helper to determine which S/ATA commands
are destined to be routed to the NCQ pathways.
This references SATA 3.2 section 13.6,
Native Command Queueing. See sections 13.6.4,
13.6.5, 13.6.6, 13.6.7 and 13.6.8 for all
SATA commands considered to be part of the
NCQ feature set. This is summari
This patch introduces a few changes to how FIS packets are
deciphered in the AHCI virtual device. The summary of
changes can be grouped into two pieces:
[A] Changes to how we apply a preliminary sieve to FISes,
[B] Changes in how we internalize a decomposed FIS.
== Changes to how we apply a preli
Error checking in ahci's handle_cmd is re-ordered so that we
initialize as few things as possible before we've done our
sanity checking. This simplifies returning from this call
in case of an error.
A check to make sure the DMA memory map succeeds with the
correct size is also added, and the debug
In order to make handle_cmd more readable at the macro level,
the details of how to decompose particular types of FIS packets
are left to helper functions.
In our case, the only type of FIS packet we currently expect to
see is a Register H2D FIS packet, but the gory details of its
decomposition ar
Instead of checking for a known byte, inspect the
fields of this byte explicitly to produce more meaningful
error messages and improve the readability of this section.
Signed-off-by: John Snow
---
hw/ide/ahci.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff
On 3 November 2014 16:35, Michael S. Tsirkin wrote:
> OK I backed that patch out and re-pushed.
> As other patches are unchanged, I don't want to re-do the pull
> request, it's just spam on list.
>
> Tag name is still for_upstream, new hash
> d43f0d641e366251bd9c63005241775f672bf3ec
OK, thanks; I
Hi; just a note to say that I still have the mips pullreq
to process, plus I'm expecting a late ppc pullreq from Alex
(who has had more important things to attend to recently ;-))
and I need to send out my own arm pullreq with a few last
patches too. So (given it's gone midnight here too) we're
def
On 31 October 2014 13:42, Alex Bennée wrote:
>
> Peter Maydell writes:
>
>> Instead of using IS_M(), use arm_dc_feature(s, ARM_FEATURE_M), so we
>> don't need to pass CPUARMState pointers around the decoder.
>>
>> Signed-off-by: Peter Maydell
>
> I almost wondered if it was killing of the IS_M m
On 31 October 2014 13:47, Alex Bennée wrote:
>
> Peter Maydell writes:
>
>> Refactor to avoid passing a CPUARMState * to disas_arm_insn(). To do this
>> we move the "read insn from memory" code to the callsite and pass the
>> insn to the function instead.
>>
>
>>
>> -static void disas_arm_insn(C
Hi Peter,
Apologies for the last minute nature of the pull request (I've been away),
however
this is an OpenBIOS update in preparation for the 2.2 release. Please pull.
ATB,
Mark.
The following changes since commit 47e8acb45feddcbc340583781b53935459330db2:
Merge remote-tracking branch 'r
On 4 November 2014 00:35, Peter Maydell wrote:
> Hi; just a note to say that I still have the mips pullreq
> to process, plus I'm expecting a late ppc pullreq from Alex
> (who has had more important things to attend to recently ;-))
> and I need to send out my own arm pullreq with a few last
> pat
On Fri, Oct 03, 2014 at 06:47:29PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Suspend to file is very much like a migrate, and it makes life
> easier if we have the Migration state available, so initialise it
> in the savevm.c code for suspending.
>
> Signed-
On Fri, Oct 03, 2014 at 06:47:28PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> QEMU_VM_CMD_PACKAGED is a migration command that allows a chunk
> of migration stream to be sent in one go, and be received by
> a separate instance of the loadvm loop while not inte
On Fri, Oct 03, 2014 at 06:47:31PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Provide a check to see if the OS we're running on has all the bits
> needed for postcopy.
>
> Creates postcopy-ram.c which will get most of the other helpers we need.
>
> Signed-of
On Fri, Oct 03, 2014 at 06:47:30PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Use that to split the qemu_savevm_state_pending counts into postcopiable
> and non-postcopiable amounts
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> arch_init.c
On Fri, Oct 03, 2014 at 06:47:33PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> 'MIG_STATE_POSTCOPY_ACTIVE' is entered after migrate_start_postcopy
>
> 'migration_postcopy_phase' is provided for other sections to know if
> they're in postcopy.
>
> Signed-off-b
On Fri, Oct 03, 2014 at 06:47:32PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Once postcopy is enabled (with migrate_set_capability), the migration
> will still start on precopy mode. To cause a transition into postcopy
> the:
>
> migrate_start_postcopy
>
On Mon, 11/03 15:32, Kevin Wolf wrote:
> Am 03.11.2014 um 02:46 hat Fam Zheng geschrieben:
> > On Fri, 10/31 10:01, Kevin Wolf wrote:
> > > Am 11.09.2014 um 07:05 hat Fam Zheng geschrieben:
> > > > Similar to drive-backup, but this command uses a device id as target
> > > > instead of creating/open
On Fri, Oct 03, 2014 at 06:47:34PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> When postcopy calls qemu_savevm_state_complete it's not really
> the end of migration, so skip:
>a) Finishing postcopiable iterative devices - they'll carry on
>b) The termin
On 2014/11/3 22:10, Michael Tokarev wrote:
03.11.2014 14:39, zhanghailiang wrote:
On 2014/11/3 18:03, Michael Tokarev wrote:
03.11.2014 12:44, zhanghailiang wrote:
Patch 1~3 fix wrong check about in-parameter.
The last two patches convert some open functions to use Error API.
v2:
- don't use
On 2014/11/3 23:33, Markus Armbruster wrote:
zhanghailiang writes:
On 2014/11/3 18:03, Michael Tokarev wrote:
03.11.2014 12:44, zhanghailiang wrote:
Patch 1~3 fix wrong check about in-parameter.
The last two patches convert some open functions to use Error API.
v2:
- don't use error_setg wh
On Fri, Oct 03, 2014 at 06:47:35PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> The PMI holds the state of each page on the incoming side,
> so that we can tell if the page is missing, already received
> or there is a request outstanding for it.
>
> Signed-off-
I still see this error in the latest QEMU. I find that this patch is not merged
in. Anybody knows why?
Thanks,
Feng
> -Original Message-
> From: qemu-devel-bounces+feng.wu=intel@nongnu.org
> [mailto:qemu-devel-bounces+feng.wu=intel@nongnu.org] On Behalf Of
> Igor Mammedov
> Sent:
03.11.2014 22:46, Peter Wu wrote:
> On Monday 03 November 2014 15:58:35 Michael Tokarev wrote:
>> 03.11.2014 15:22, Peter Wu wrote:
>> []
>>> As an aside, would it be possible to override the samba binary at runtime,
>>> without compiling? Either an envvar (SMBD) or an option (-net
>>> user,smb=...
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Saturday, November 01, 2014 1:07 AM
> To: Wangkai (Kevin,C)
> Cc: qemu-devel@nongnu.org; Lee yang
> Subject: Re: [Qemu-devel] using qemu arm bring up 2 cpus on x86, hang
> up on guest file system
>
> On
Fam Zheng writes:
> On Mon, 11/03 15:32, Kevin Wolf wrote:
>> Am 03.11.2014 um 02:46 hat Fam Zheng geschrieben:
>> > On Fri, 10/31 10:01, Kevin Wolf wrote:
>> > > Am 11.09.2014 um 07:05 hat Fam Zheng geschrieben:
>> > > > Similar to drive-backup, but this command uses a device id as target
>> > >
> -Original Message-
> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
> Bonzini
> Sent: Tuesday, November 04, 2014 1:16 AM
> To: SeokYeon Hwang; qemu-devel@nongnu.org
> Cc: arm...@redhat.com; alex.william...@hp.com
> Subject: Re: [PATCH] smbios: fixed compiler warni
"Michael S. Tsirkin" writes:
> On Mon, Nov 03, 2014 at 05:13:15PM +0100, Markus Armbruster wrote:
>> "Michael S. Tsirkin" writes:
>>
>> > On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
>> >> "Michael S. Tsirkin" writes:
>> >>
>> >> > tcp_get_fds API discards fds if there's
Currently when *obj is not a TYPE_DEVICE, qemu will abort. This patch just
fixed it. When *obj is not a TYPE_DEVICE, just do not add it to hotpluggable
device list.
This patch also fixed the following issue:
1, boot qemu using cli:
$ /opt/qemu-git-arm/bin/qemu-system-x86_64 -monitor stdio -enable-
"smbios_build_type_17_table()" should take 'uint64_t' instead of 'ram_addr_t'
because it should be able to handle (16ll * GiB).
Otherwise, clang (>= 3.4) produces compilation warning in "smbios_get_tables()".
Signed-off-by: SeokYeon Hwang
---
hw/i386/smbios.c | 2 +-
1 file changed, 1 insertion
On Tue, 11/04 07:47, Markus Armbruster wrote:
> Fam Zheng writes:
>
> > On Mon, 11/03 15:32, Kevin Wolf wrote:
> >> Am 03.11.2014 um 02:46 hat Fam Zheng geschrieben:
> >> > On Fri, 10/31 10:01, Kevin Wolf wrote:
> >> > > Am 11.09.2014 um 07:05 hat Fam Zheng geschrieben:
> >> > > > Similar to driv
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