Acked-by: Guo Ren
On Sat, Mar 11, 2023 at 2:03 AM Alex Bennée wrote:
>
> This replaces the previous attempt to add c-sky.com so I've dropped
> the review/ack tags. Group everything under Alibaba now.
>
> Added as requested by LIU Zhiwei.
>
> Signed-off-by: Alex Benn
On Tue, Dec 20, 2022 at 9:13 AM LIU Zhiwei wrote:
>
> The c-sky domain mail is no longer being used for Guo Ren and me.
>
> C-SKY company and C-SKY arch is still existing, but its website domain
> has been moved to https://www.t-head.cn/.
Acked-by: Guo Ren
>
> Otherwise,
On Tue, Jan 25, 2022 at 5:49 PM Weiwei Li wrote:
>
>
> 在 2022/1/25 下午5:00, Guo Ren 写道:
> > On Tue, Jan 25, 2022 at 4:54 PM LIU Zhiwei wrote:
> >>
> >> On 2022/1/25 16:40, Guo Ren wrote:
> >>> On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrot
o several steps
> * improve commit messages to describe changes
>
> v3:
> * drop "x-" in exposed properties
>
> v2:
> * add extension check for svnapot and svpbmt
>
> Guo Ren (1):
> target/riscv: Ignore reserved bits in PTE for RV64
>
> Weiwei Li (4):
On Tue, Jan 25, 2022 at 4:54 PM LIU Zhiwei wrote:
>
>
> On 2022/1/25 16:40, Guo Ren wrote:
> > On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
> >>
> >> On 2022/1/25 14:45, Weiwei Li wrote:
> >>> From: Guo Ren
> >>>
> >>&g
On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote:
>
>
> On 2022/1/25 14:45, Weiwei Li wrote:
> > From: Guo Ren
> >
> > Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
> > need to ignore them. They cannot be a part of ppn.
> >
> > 1:
On Fri, Jan 21, 2022 at 6:48 AM LIU Zhiwei wrote:
>
>
> On 2022/1/20 下午9:47, Guo Ren wrote:
> > Hi Alistair and Anup,
> >
> > On Tue, Jan 18, 2022 at 12:56 PM Alistair Francis
> > wrote:
> >> On Tue, Jan 18, 2022 at 1:31 PM Anup Patel wrote:
>
Hi Alistair and Anup,
On Tue, Jan 18, 2022 at 12:56 PM Alistair Francis wrote:
>
> On Tue, Jan 18, 2022 at 1:31 PM Anup Patel wrote:
> >
> > On Tue, Jan 18, 2022 at 6:47 AM Weiwei Li wrote:
> > >
> > > From: Guo Ren
> > >
> > > Highest b
On Tue, Jan 18, 2022 at 7:28 PM Anup Patel wrote:
>
> On Tue, Jan 18, 2022 at 4:45 PM Guo Ren wrote:
> >
> > On Tue, Jan 18, 2022 at 4:51 PM Anup Patel wrote:
> > >
> > > On Tue, Jan 18, 2022 at 2:16 PM Guo Ren wrote:
> > > >
> >
On Tue, Jan 18, 2022 at 12:56 PM Alistair Francis wrote:
>
> On Tue, Jan 18, 2022 at 1:31 PM Anup Patel wrote:
> >
> > On Tue, Jan 18, 2022 at 6:47 AM Weiwei Li wrote:
> > >
> > > From: Guo Ren
> > >
> > > Highest bits of PTE has been used
On Tue, Jan 18, 2022 at 4:51 PM Anup Patel wrote:
>
> On Tue, Jan 18, 2022 at 2:16 PM Guo Ren wrote:
> >
> > On Tue, Jan 18, 2022 at 11:32 AM Anup Patel wrote:
> > >
> > > On Tue, Jan 18, 2022 at 6:47 AM Weiwei Li wrote:
> > > >
> > >
On Tue, Jan 18, 2022 at 11:32 AM Anup Patel wrote:
>
> On Tue, Jan 18, 2022 at 6:47 AM Weiwei Li wrote:
> >
> > From: Guo Ren
> >
> > Highest bits of PTE has been used for svpbmt, ref: [1], [2], so we
> > need to ignore them. They cannot be a part of ppn.
&
} else if (!(pte & (PTE_R | PTE_W | PTE_X))) {
> /* Inner PTE, continue walking */
> -if (pte & (PTE_D | PTE_A | PTE_U | PTE_N)) {
> +if (pte & (PTE_D | PTE_A | PTE_U | PTE_N | PTE_PBMT)) {
> return TRANSLATE_FAIL;
> }
> base = ppn << PGSHIFT;
> --
> 2.17.1
>
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
.
I'm preparing c910 pachset for linux riscv and you can question me there.
On Sun, Oct 13, 2019 at 1:33 AM Palmer Dabbelt wrote:
>
> On Wed, 25 Sep 2019 17:14:21 PDT (-0700), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Highest 10 bits of PTE are reserved in riscv-privi
Thx, Sincerely
On Thu, Sep 26, 2019 at 6:52 AM Alistair Francis wrote:
>
> On Wed, Sep 25, 2019 at 5:05 AM wrote:
> >
> > From: Guo Ren
> >
> > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> > need to ignore them. They cannot be
rward compatibility." Provided that software
> follows the spec current QEMU will behave properly. For software that
> ignores that directive an sets some of those bits, the spec says
> nothing about what hardware should do, so both the old an the new
> behavior are fine.
>
> Jonathan
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
ps silently
> succeeding.
>
> Jonathan
>
> On Wed, Sep 25, 2019 at 8:29 AM Guo Ren wrote:
>>
>> On Wed, Sep 25, 2019 at 1:19 PM Alistair Francis
>> wrote:
>> >
>> > On Tue, Sep 24, 2019 at 9:48 PM wrote:
>> > >
>> > > F
On Wed, Sep 25, 2019 at 1:19 PM Alistair Francis wrote:
>
> On Tue, Sep 24, 2019 at 9:48 PM wrote:
> >
> > From: Guo Ren
> >
> > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> > need to ignore them. They can not be a part of ppn.
&
Thx
On Wed, Sep 25, 2019 at 5:58 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 5:21 PM wrote:
> >
> > From: Guo Ren
> >
> > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> > need to ignore them. They cannot be a part of ppn.
&
On Wed, Sep 25, 2019 at 1:35 PM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 12:49 PM wrote:
> >
> > From: Guo Ren
> >
>
> nits: the title is probably better to be rephrased to: Ignore reserved
> bits when calculating PPN for RV64
Yes, I forgot change the title.
在 2019/9/25 上午8:21, Alistair Francis 写道:
On Tue, Sep 24, 2019 at 5:13 PM Guo Ren wrote:
在 2019年9月25日，上午7:33，Alistair Francis 写道：
On Tue, Sep 24, 2019 at 12:58 AM wrote:
From: Guo Ren
Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
need to ignore them. They
> 在 2019年9月25日，上午7:33，Alistair Francis 写道：
>
> On Tue, Sep 24, 2019 at 12:58 AM wrote:
>>
>> From: Guo Ren
>>
>> Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
>> need to ignore them. They can not be a part of ppn.
>
I only tested it on qemu-3.1.0, pls have a try before merge.
On Tue, Sep 24, 2019 at 4:00 PM wrote:
>
> From: Guo Ren
>
> Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> need to ignore them. They can not be a part of ppn.
>
> 1: The RISC-V I
Ok, In fact it's wrong patch, don't try it. pte is destroyed.
Sorry for that, I'll send V2.
On Tue, Sep 24, 2019 at 1:03 PM Alistair Francis wrote:
>
> On Mon, Sep 23, 2019 at 10:01 PM wrote:
> >
> > From: Guo Ren
> >
> > Highest 10 bits of PTE a
24 matches
Mail list logo
