On Fri, May 09, 2014 at 01:53:32PM +0200, Paolo Bonzini wrote:
> Il 09/05/2014 04:28, Marcelo Tosatti ha scritto:
> >Alex,
> >
> >Unability to upgrade systems is not an excuse to fix the bug in the
> >wrong place.
>
> It may be an excuse to fix the bug in both places though.
>
> Paolo
Actually,
On Tue, 13 May 2014 17:11:06 -0400
Mike Day wrote:
> g_sequence_lookup is not supported by glib < 2.28. The usage
> of g_sequence_lookup is not essential in this context (it's a
> safeguard against duplicate values in the help message).
> Removing the call enables the build on all platforms and
>
On 13.05.2014 20:15, Fabian Aggeler wrote:
> This patch is based on ideas found in a patch at
> git://github.com/jowinter/qemu-trustzone.git
> a9ad01767c4b25e14700b5682a412f4fd8146ee8 by
> Johannes Winter .
>
> Each world (secure and non-secure) has its own MMU state. Providing
> a separate TLB fo
On 13.05.2014 20:15, Fabian Aggeler wrote:
> From: Sergey Fedorov
>
> CPACR register allows to control access rights to coprocessor 0-13
> interfaces. Bits corresponding to unimplemented coprocessors should be
> RAZ/WI. QEMU implements only VFP coprocessor on ARMv6+ targets. So only
> cp10 & cp11
On 13.05.2014 20:15, Fabian Aggeler wrote:
> arm_is_secure() function allows to determine CPU security state
> if the CPU implements Security Extensions.
>
> Signed-off-by: Sergey Fedorov
> Signed-off-by: Fabian Aggeler
> ---
> target-arm/cpu.h | 15 +++
> 1 file changed, 15 insertio
On 13.05.2014 20:15, Fabian Aggeler wrote:
> From: Svetlana Fedoseeva
>
> Signed-off-by: Svetlana Fedoseeva
> Signed-off-by: Sergey Fedorov
> Signed-off-by: Fabian Aggeler
> ---
> target-arm/helper.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-ar
Eric Blake writes:
> On 05/13/2014 10:02 AM, Markus Armbruster wrote:
>> Completes the conversion to Error started in commit 015a103^..d5124c0.
>>
>> Cc: Josh Durgin
>> Signed-off-by: Markus Armbruster
>> ---
>> block/rbd.c | 66
>> +++-
On 14/05/14 00:02, BALATON Zoltan wrote:
command 0x43 is read the TOC which according to atapi_cmd_table should
call cmd_read_toc_pma_atip(). You can see that in your MorphOS case
you are getting a line with a "atapi_cmd_error" prefix which indicates
that something is calling ide_atapi_cmd_error
> -Original Message-
> From: qemu-devel-bounces+jaeyong.yoo=samsung@nongnu.org [mailto:qemu-
> devel-bounces+jaeyong.yoo=samsung@nongnu.org] On Behalf Of Laszlo
> Ersek
> Sent: Tuesday, May 13, 2014 10:55 PM
> To: jaeyong@samsung.com; qemu-devel@nongnu.org
> Subject: Re: [Qemu-d
On Wed, May 14, 2014 at 01:39:03AM +0200, BALATON Zoltan wrote:
> On Thu, 8 May 2014, Michael Tokarev wrote:
> >27.02.2014 05:05, BALATON Zoltan wrote:
> >
> >Shoudl we actually make it machine-specific, to keep even prog-if value
> >of these things the same as before for older machine types? I du
It's a loop from i < num_sg and the array is VIRTQUEUE_MAX_SIZE - so
it's OK if the value read is VIRTQUEUE_MAX_SIZE.
Not a big problem in practice as people don't use
such big queues, but it's inelegant.
Reported-by: "Dr. David Alan Gilbert"
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael S.
Resending: same as previous pull request but with numbers in the subject.
Sorry about the noise.
The following changes since commit 06b4f00d53637f2c16a62c2cbaa30bffb045cf88:
Merge remote-tracking branch 'remotes/qmp-unstable/queue/qmp' into staging
(2014-05-09 15:46:34 +0100)
are available
On Tue, 05/13 10:00, Jeff Cody wrote:
> This adds a test for VHDX images created by Microsoft's tool, Disk2VHD.
Out of curiosity, is this an official tool from Microsoft?
>
> VHDX images created by this tool have 2 identical header sections, with
> identical sequence numbers. This makes sure we
> -Original Message-
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Tuesday, May 13, 2014 9:27 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org; Huangweidong (C); Michael S. Tsirkin
> Subject: Re: usb: usb tablet freeze when save/restore guest os
>
> Hi,
>
> > In the situat
On Wed, May 14, 2014 at 03:13:09AM +0200, Samuel Thibault wrote:
> Do not special-case addresses with zero host part, as we do not
> necessarily know how big it is, and the guest can fake them anyway.
> Silently avoid having 0.0.0.0 as a destination, however.
>
> Signed-off-by: Samuel Thibault
R
On Tue, May 13, 2014 at 10:32:09AM -0700, Richard Henderson wrote:
> On 05/05/2014 11:08 PM, Edgar E. Iglesias wrote:
> > -/* EL0 has no access rights to update SPSel, and this code
> > - * assumes we are updating SP for EL1 while running as EL1.
> > - */
> > -assert(arm_current_pl(
Do not special-case addresses with zero host part, as we do not
necessarily know how big it is, and the guest can fake them anyway.
Silently avoid having 0.0.0.0 as a destination, however.
Signed-off-by: Samuel Thibault
---
This is particularly bad actually, one can for instance simply do this
i
Edgar E. Iglesias, le Wed 14 May 2014 00:54:50 +, a écrit :
> Minor nit, the comment in if_encap should say
> "0.0.0.0 can not be a destination address..."
D'oh :)
Samuel
On Wed, May 14, 2014 at 02:44:20AM +0200, Samuel Thibault wrote:
> Edgar E. Iglesias, le Wed 14 May 2014 00:30:09 +, a écrit :
> > > At best I could think of using the patch below, which avoids registering
> > > anything for 0.0.0.0, and use a broadcast to answer a guest which
> > > would have
Edgar E. Iglesias, le Wed 14 May 2014 00:30:09 +, a écrit :
> > At best I could think of using the patch below, which avoids registering
> > anything for 0.0.0.0, and use a broadcast to answer a guest which
> > would have used 0.0.0.0 as a source for whatever reason. I don't find
> > anything
On Wed, May 14, 2014 at 12:15:47AM +0200, Samuel Thibault wrote:
> Edgar E. Iglesias, le Thu 08 May 2014 06:59:22 +, a écrit :
> > On Thu, May 08, 2014 at 08:50:33AM +0200, Samuel Thibault wrote:
> > > Edgar E. Iglesias, le Thu 08 May 2014 06:10:18 +, a écrit :
> > > > The search part looks
On Thu, 8 May 2014, Michael Tokarev wrote:
27.02.2014 05:05, BALATON Zoltan wrote:
Shoudl we actually make it machine-specific, to keep even prog-if value
of these things the same as before for older machine types? I dunno.
mst says we should, I think this is not a very important property to ke
On Mon, 12 May 2014, Mark Cave-Ayland wrote:
On 12/05/14 20:32, BALATON Zoltan wrote:
(cut)
MorphOS and Darwin are definitely doing things differently. I hope
someone who understands what is happening can explain it why one of them
works while the other doesn't.
Which I hope is what I'm tryin
On 05/13/2014 03:12 PM, Peter Maydell wrote:
> Hosts we care about enough to want to run QEMU really slowly
> but not enough to write a TCG backend for?
A fair point. I suppose we should port the x86 backend to win64 at some
point...
> I think possibly also some people read the configure help
>
On 05/08/2014 12:12 PM, Max Reitz wrote:
> Add a test for the JSON protocol driver.
>
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/089 | 130
> +
> tests/qemu-iotests/089.out | 54 +++
> tests/qemu-iotests/group | 1 +
Alex Williamson :
[...]
> > Oh right, I looked for code references to the register but didn't notice
> > that Linux configures it for MSI, not MSI-X. In my brief testing I only
> > saw that Windows generates interrupts on the first vector, so perhaps
> > not much lost without the extra vectors.
Edgar E. Iglesias, le Thu 08 May 2014 06:59:22 +, a écrit :
> On Thu, May 08, 2014 at 08:50:33AM +0200, Samuel Thibault wrote:
> > Edgar E. Iglesias, le Thu 08 May 2014 06:10:18 +, a écrit :
> > > The search part looks OK to me but when adding to the arp table, don't
> > > you at least want
On 5/13/2014 4:59 PM, Richard Henderson wrote:
> Commit af3cbfbe8018ccc16fb3a0048e928f66f0d05e87 hoisted some "common"
> loads of the temporary type, forgetting that the types could differ
> during truncating moves. This affects the correctness of the memory
> offset on big-endian hosts.
>
> Sign
On 05/08/2014 12:12 PM, Max Reitz wrote:
> If the filename given to bdrv_open() is prefixed with "json:", parse the
> rest as a JSON object and merge the result into the options QDict. If
> there are conflicts, report one of them to the user and abort.
Commit message is stale compared to change in
On 13 May 2014 22:52, Richard Henderson wrote:
> On 05/13/2014 02:49 PM, Peter Maydell wrote:
>> Does the TCG interpreter actually have any interesting uses
>> to merit our carrying it around, maintaining it and (in this case)
>> rewriting it? Mostly I just see it when people accidentally configur
On Tue, May 13, 2014 at 02:39:20PM -0400, Kevin O'Connor wrote:
> On Tue, May 13, 2014 at 08:24:47PM +0200, Paolo Bonzini wrote:
> > Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
> > > I was wondering about that as well. The Intel docs state that the CPL
> > > is bits 0-1 of the CS.selector regi
On 5/13/2014 4:40 PM, Richard Henderson wrote:
> On 05/13/2014 02:32 PM, Tom Musta wrote:
>> Here is the -d op output. What does the "mov_i32 tmp0,r4" op mean
>> when r4 is an i64?
>
> It's supposed to be the truncate.
>
> I believe I know what's going on. I've introduced this bug yesterday, of
Commit af3cbfbe8018ccc16fb3a0048e928f66f0d05e87 hoisted some "common"
loads of the temporary type, forgetting that the types could differ
during truncating moves. This affects the correctness of the memory
offset on big-endian hosts.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 19 +
On 05/13/2014 02:49 PM, Peter Maydell wrote:
> On 13 May 2014 22:22, Richard Henderson wrote:
>> There are a number of problems with the current interpreter:
>>
>> (1) It uses direct unaligned accesses as part of the bytecode stream.
>> This fails with SIGBUS for strict alignment hosts. T
On 13 May 2014 22:22, Richard Henderson wrote:
> There are a number of problems with the current interpreter:
>
> (1) It uses direct unaligned accesses as part of the bytecode stream.
> This fails with SIGBUS for strict alignment hosts. This could of
> course be fixed to use "proper
On 05/13/2014 03:11 PM, Mike Day wrote:
Subject line could have used a [PATCHv2] designation to make it obvious
this is a fixed version. But that doesn't affect what goes into git.
> g_sequence_lookup is not supported by glib < 2.28. The usage
> of g_sequence_lookup is not essential in this cont
On 05/13/2014 02:32 PM, Tom Musta wrote:
> Here is the -d op output. What does the "mov_i32 tmp0,r4" op mean
> when r4 is an i64?
It's supposed to be the truncate.
I believe I know what's going on. I've introduced this bug yesterday, of
course. Thomas Huth bisected a problem with an s390 host,
On 5/13/2014 4:11 PM, Richard Henderson wrote:
> On 05/13/2014 02:09 PM, Peter Maydell wrote:
>> Dumping the TCG opcodes would probably help here (-d op)...
>
> Use -d op if you suspect a bug in the translator.
> Use -d op_opt if you suspect a bug in the out_asm.
>
>
> r~
>
It is big endian.
Signed-off-by: Richard Henderson
---
configure| 12 +++
include/exec/helper-ffi.h| 83
include/exec/helper-tcg.h| 18 ++
target-i386/ops_sse_header.h | 6
target-ppc/helper.h | 1 +
tcg/tcg.c
There are a number of problems with the current interpreter:
(1) It uses direct unaligned accesses as part of the bytecode stream.
This fails with SIGBUS for strict alignment hosts. This could of
course be fixed to use "proper" unaligned accesses, but this would
just be slow.
These really ought to be moved into the (unified?) tcg-ppc backend.
Signed-off-by: Richard Henderson
---
include/qemu/cache-utils.h | 2 +-
util/cache-utils.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qemu/cache-utils.h b/include/qemu/cache-utils.h
in
A type 0 (bios info) smbios structure is only generated if explicitly
requested on the command line. This patch updates the mechanism for
generating this type of structure as follows:
- convert bios_characteristics field to uin64_t (instead of uint8_t[8])
as described in the current smbios s
Changelog:
v3:
- endian-ness fix (1/3) now correctly handles cpuid version and features
- included documentation (qemu-options.hx) for type 0 uefi flag (2/3)
- fixed type 17 field sizes ("word" means 16 bits, not 32 :) :)
v2:
- fix endian-ness for *all* larger-than-8bit fields (patch 1/2)
Fields for configured_clock_speed and various voltage values
introduced in v2.7 and v2.8 should be "word", i.e. 16 bits.
Reported-by: Laszlo Ersek
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 8
include/hw/i386/smbios.h | 8
2 files changed, 8 insertions(+), 8 d
When i386 guests are emulated on big endian hosts, make sure
fields wider than 8 bits are populated safely via cpu_to_le*().
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 92 +---
1 file changed, 47 insertions(+), 45 deletions(-)
diff --
g_sequence_lookup is not supported by glib < 2.28. The usage
of g_sequence_lookup is not essential in this context (it's a
safeguard against duplicate values in the help message).
Removing the call enables the build on all platforms and
does not change the operation of the help function.
Signed-of
On 05/13/2014 02:09 PM, Peter Maydell wrote:
> Dumping the TCG opcodes would probably help here (-d op)...
Use -d op if you suspect a bug in the translator.
Use -d op_opt if you suspect a bug in the out_asm.
r~
On 13 May 2014 21:56, Tom Musta wrote:
> I am chasing a bug in ppc64-linux-user when hosted on PPC 64.
>
> I believe I have narrowed the problem to QEMU's emulation of an rlwimi
> instruction
> in ld64.so. The in/out asm and register dump are below. And so is the ppc
> translation source.
>
>
I am chasing a bug in ppc64-linux-user when hosted on PPC 64.
I believe I have narrowed the problem to QEMU's emulation of an rlwimi
instruction
in ld64.so. The in/out asm and register dump are below. And so is the ppc
translation source.
The inbound contents of r4 is 0x24. The expected valu
On Tue, May 13, 2014 at 10:33:35PM +0200, Paolo Bonzini wrote:
> Il 13/05/2014 22:21, Gabriel L. Somlo ha scritto:
> >-t->processor_id[0] = smbios_cpuid_version;
> >-t->processor_id[1] = smbios_cpuid_features;
> >+t->processor_id[0] = smbios_cpuid_version; /* opaque, no
Il 13/05/2014 22:21, Gabriel L. Somlo ha scritto:
> >-t->processor_id[0] = smbios_cpuid_version;
> >-t->processor_id[1] = smbios_cpuid_features;
> >+t->processor_id[0] = smbios_cpuid_version; /* opaque, no cpu_to_le16 */
> >+t->processor_id[1] = smbios_cpuid_features; /* opaque, n
On 05/13/14 22:21, Gabriel L. Somlo wrote:
> On Tue, May 13, 2014 at 10:09:45PM +0200, Paolo Bonzini wrote:
>> Il 13/05/2014 20:17, Gabriel L. Somlo ha scritto:
>>> -t->processor_id[0] = smbios_cpuid_version;
>>> -t->processor_id[1] = smbios_cpuid_features;
>>> +t->processor_id[0] = smb
On 05/13/2014 11:44 AM, Markus Armbruster wrote:
>> But when I try to put this in a function to avoid repeating:
>>
>> function _no_dump_exec()
>> {
>> (ulimit -c 0; exec "$@")
>> }
>>
>> _no_dump_exec $QEMU_IO -c "write -P 0x5a 0 512" -c "abort" "$TEST_IMG")
>> | _filter_
On Tue, May 13, 2014 at 10:09:45PM +0200, Paolo Bonzini wrote:
> Il 13/05/2014 20:17, Gabriel L. Somlo ha scritto:
> >-t->processor_id[0] = smbios_cpuid_version;
> >-t->processor_id[1] = smbios_cpuid_features;
> >+t->processor_id[0] = smbios_cpuid_version; /* opaque, no cpu_to_le16 */
>
Il 13/05/2014 20:17, Gabriel L. Somlo ha scritto:
-t->processor_id[0] = smbios_cpuid_version;
-t->processor_id[1] = smbios_cpuid_features;
+t->processor_id[0] = smbios_cpuid_version; /* opaque, no cpu_to_le16 */
+t->processor_id[1] = smbios_cpuid_features; /* opaque, no cpu_to_le1
On 05/13/14 20:17, Gabriel L. Somlo wrote:
> A type 0 (bios info) smbios structure is only generated if explicitly
> requested on the command line. This patch updates the mechanism for
> generating this type of structure as follows:
>
> - convert bios_characteristics field to uin64_t (instead of
comments below
On 05/13/14 20:17, Gabriel L. Somlo wrote:
> When i386 guests are emulated on big endian hosts, make sure
> fields wider than 8 bits are populated safely via cpu_to_le*().
>
> Signed-off-by: Gabriel Somlo
> ---
> hw/i386/smbios.c | 91
> --
On 05/13/2014 10:02 AM, Markus Armbruster wrote:
> Completes the conversion to Error started in commit 015a103^..d5124c0.
>
> Cc: Josh Durgin
> Signed-off-by: Markus Armbruster
> ---
> block/rbd.c | 66
> +++--
> 1 file changed, 34 insert
On 05/08/2014 02:42 AM, Matthew Booth wrote:
> [PATCH 1/4] curl: Fix parsing of readahead option from filename
> [PATCH 2/4] curl: Add sslverify option
> [PATCH 3/4] curl: Add usage documentation
>
> The first 3 patches are reposted with updates following discussion of the
> option
> syntax. With
Am 13.05.14 17:41, schrieb Kevin O'Connor:
>
> So, my advice would be to either avoid x86emu (eg, maybe by trying the
> vm86 mode of v86d, or maybe by not using uvesafb), try compiling v86d
> with a newer version of x86emu, or stick with the "lgpl VGA BIOS".
Unfortunately I cannot use vm86 mode b
Il 13/05/2014 20:57, Paolo Bonzini ha scritto:
Il 13/05/2014 20:39, Kevin O'Connor ha scritto:
That doesn't sound right. What happens if the processor takes an NMI,
SMI, or VMEXIT between the point it enables protected mode but before
it long jumps? The processor would have to save and restore
On 05/13/2014 10:02 AM, Markus Armbruster wrote:
> qerror_report() is a transitional interface to help with converting
> existing HMP commands to QMP. It should not be used elsewhere.
> Replace by error_report().
>
> Signed-off-by: Markus Armbruster
> ---
> qemu-nbd.c | 6 +++---
> 1 file chang
On 05/13/2014 10:02 AM, Markus Armbruster wrote:
> qerror_report() is a transitional interface to help with converting
> existing HMP commands to QMP. It should not be used elsewhere.
>
> do_drive_del() is an HMP command that won't be converted to QMP (we'll
> create a new QMP command instead).
On 05/13/2014 12:34 PM, Mike Day wrote:
> g_sequence_lookup is not supported by glib < 2.28. The usage
> of g_sequence_lookup is not essential in this context (its a
s/its/it's/
> safeguard against duplicate values in the help message).
> Removing the call enables the build on all platforms and
>
On 05/13/2014 11:36 AM, Andreas Färber wrote:
> Am 07.05.2014 16:42, schrieb Marcel Apfelbaum:
>> A NULL value is not added to visitor's stack, but there
>> is no check for that when the visitor tries to return
>> that value, leading to Qemu crash.
>>
>> Reviewed-by: Eric Blake
>> Signed-off-by: M
Il 13/05/2014 20:39, Kevin O'Connor ha scritto:
On Tue, May 13, 2014 at 08:24:47PM +0200, Paolo Bonzini wrote:
Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
I was wondering about that as well. The Intel docs state that the CPL
is bits 0-1 of the CS.selector register, and that protected mode
On Tue, May 13, 2014 at 08:24:47PM +0200, Paolo Bonzini wrote:
> Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
> > I was wondering about that as well. The Intel docs state that the CPL
> > is bits 0-1 of the CS.selector register, and that protected mode
> > starts immediately after setting the P
g_sequence_lookup is not supported by glib < 2.28. The usage
of g_sequence_lookup is not essential in this context (its a
safeguard against duplicate values in the help message).
Removing the call enables the build on all platforms and
does not change the operation of the help function.
Signed-off
Il 27/04/2014 19:25, Kevin O'Connor ha scritto:
> I was wondering about that as well. The Intel docs state that the CPL
> is bits 0-1 of the CS.selector register, and that protected mode
> starts immediately after setting the PE bit. The CS.selector field
> should be the value of %cs in real mode
On Tue, May 13, 2014 at 08:08:41PM +0200, Gerhard Wiesinger wrote:
> On 13.05.2014 17:41, Kevin O'Connor wrote:
> > The x86emu code does not properly emulate "leal" (as near as I can tell
> >it treats it as a "leaw" instead), which leads to all sorts of bizarre
> >behavior when it tries to interpre
On 13 May 2014 18:21, Richard Henderson wrote:
> I broke x86 on mainline yesterday for big-endian targets. Sorry for the
> incomplete testing after the rebase. Please pull.
>
>
> r~
>
>
> The following changes since commit cd2b9b86803e46a09cf239afc44413884efa53f4:
>
> Merge remote-tracking bra
When i386 guests are emulated on big endian hosts, make sure
fields wider than 8 bits are populated safely via cpu_to_le*().
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 91
1 file changed, 46 insertions(+), 45 deletions(-)
diff --
New since version 1:
- fix endian-ness for *all* larger-than-8bit fields (patch 1/2)
- resubmit type0 update (2/2) with appropriate endian-ness fix
for 64-bit field.
Thanks,
Gabriel
Gabriel L. Somlo (2):
SMBIOS: Fix endian-ness when populating fields wider than 8-bit
SMBIOS: Updat
A type 0 (bios info) smbios structure is only generated if explicitly
requested on the command line. This patch updates the mechanism for
generating this type of structure as follows:
- convert bios_characteristics field to uin64_t (instead of uint8_t[8])
as described in the current smbios s
Lluís Vilanova writes:
> Adds support to compile QEMU with multiple tracing backends at the same time.
> For example, you can compile QEMU with:
> $ ./configure --enable-trace-backends=ftrace,dtrace
> Where 'ftrace' can be handy for having an in-flight record of events, and
> 'dtrace' can be
On 13.05.2014 17:41, Kevin O'Connor wrote:
The x86emu code does not properly emulate "leal" (as near as I can
tell it treats it as a "leaw" instead), which leads to all sorts of
bizarre behavior when it tries to interpret the code. This type of
issue has occurred for a bunch of instructions (o
Adds support to compile QEMU with multiple tracing backends at the same time.
For example, you can compile QEMU with:
$ ./configure --enable-trace-backends=ftrace,dtrace
Where 'ftrace' can be handy for having an in-flight record of events, and
'dtrace' can be later used to extract more inform
On 05/12/2014 03:35 AM, Christian Borntraeger wrote:
> On 07/05/14 20:05, Matthew Rosato wrote:
>> Add memory information to read SCP info and add handlers for
>> Read Storage Element Information, Attach Storage Element,
>> Assign Storage and Unassign Storage.
>>
>> Signed-off-by: Matthew Rosato
>
Am 07.05.2014 16:43, schrieb Marcel Apfelbaum:
> Make machine's QemuOpts QOM properties of machine. The properties
> are automatically filled in. This opens the possiblity to create
> opts per machine rather than global.
>
> Signed-off-by: Marcel Apfelbaum
> ---
> hw/core/machine.c | 256
> ++
Mike Day writes:
> The help message for qemu-img lists the supported block formats, of
> which there are 27 as of version 2.0.50. The formats are printed in
> the order of their driver's position in a linked list, which appears
> random. This patch prints the formats in sorted order, making it
>
Fam Zheng writes:
> On Tue, 05/13 10:46, Markus Armbruster wrote:
>> The shell script attempts to suppress core dumps like this:
>>
>> old_ulimit=$(ulimit -c)
>> ulimit -c 0
>> $QEMU_IO arg...
>> ulimit -c "$old_ulimit"
>>
>> This breaks the test hard unless the limit was zero t
From: Sergey Fedorov
This patch is based on idea found in patch at
git://github.com/jowinter/qemu-trustzone.git
f3d955c6c0ed8c46bc0eb10b634201032a651dd2 by
Johannes Winter .
This flag prevents from executing TCG code generated for other CPU
secure state. It also allows to generate different TCG
Am 07.05.2014 16:42, schrieb Marcel Apfelbaum:
> Filter out also 'type' property when setting
> object's properties
>
> Reviewed-by: Paolo Bonzini
> Signed-off-by: Marcel Apfelbaum
> ---
> vl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/vl.c b/vl.c
> index 58673
From: Svetlana Fedoseeva
Signed-off-by: Svetlana Fedoseeva
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
---
target-arm/helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 9c3269f..2b57ad9 100644
--- a/target-arm/help
From: Sergey Fedorov
SMC instruction is implemented similar to SVC instruction. When
executing SMC instruction from monitor CPU mode SCR.NS bit is reset.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
---
target-arm/cpu.h | 1 +
target-arm/helper.c| 11 +++
tar
Am 07.05.2014 16:42, schrieb Marcel Apfelbaum:
> A NULL value is not added to visitor's stack, but there
> is no check for that when the visitor tries to return
> that value, leading to Qemu crash.
>
> Reviewed-by: Eric Blake
> Signed-off-by: Marcel Apfelbaum
Where does the Rb come from on this
The PADEN bit in the transmit control register enables padding of short
data packets out to the required minimum length. However a typo here
meant we were adjusting tx_fifo_len rather than tx_frame_len, so the
padding didn't actually happen. Fix this bug.
Signed-off-by: Peter Maydell
Reviewed-by:
Am 07.05.2014 16:42, schrieb Marcel Apfelbaum:
> Total removal of QEMUMachineInitArgs struct. QEMUMachineInitArgs's fields
> are copied into MachineState. Removed duplicated fields from MachineState.
>
> All the other changes are only mechanical refactoring, no semantic changes.
>
> Signed-off-by
On 05/05/2014 11:08 PM, Edgar E. Iglesias wrote:
> -/* EL0 has no access rights to update SPSel, and this code
> - * assumes we are updating SP for EL1 while running as EL1.
> - */
> -assert(arm_current_pl(env) == 1);
> +/* EL0 has no access rights to update SPSel. */
> +as
Some of SCTRL bits are common for secure and non-secure state.
Translation table base masks are updated on NS-bit switch as
well as on TTBCR writes.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
---
target-arm/cpu.h| 10 ++
target-arm/helper.c | 39
This patch enables all previous cpu model related patches and
allows the feature to become active. It basically implements
the host properties being fetched from the host and applied to
the predefined S390 cpu classes during initialization of the
HW platform. In a second step, t
NSACR allows to control non-secure access to coprocessor interfaces 0-13
and CPACR bits.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
---
target-arm/cpu.h | 1 +
target-arm/helper.c| 29 +
target-arm/translate.c | 7 +++
3 files changed
On 05/08/2014 02:42 AM, Matthew Booth wrote:
> curl_parse_filename wasn't removing the option string from the url,
> resulting in a 404.
>
> This change is a rewrite of the previous parsing behaviour, and
> also changes the option syntax. The new syntax is:
>
> http://example.com/path?query[ssl
On 05/13/2014 01:02 AM, Marc Marí wrote:
> Modify debug macros to have the same format through the codebase and use
> regular
> ifs instead of ifdef.
>
> As the debug printf is always put in code, some casting had to be added to
> avoid
> warnings treated as errors at compile time.
Umm, where i
From: Sergey Fedorov
Make arm_current_pl() return PL3 for secure PL1 and monitor mode.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
---
target-arm/cpu.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 6ea0432.
qerror_report_err() is a transitional interface to help with
converting existing HMP commands to QMP. It should not be used
elsewhere.
drive_init() is not meant to be used by QMP commands. It uses both
qerror_report_err() and error_report(). Convert the former to the
latter.
Signed-off-by: Mar
qerror_report() is a transitional interface to help with converting
existing HMP commands to QMP. It should not be used elsewhere.
do_drive_del() is an HMP command that won't be converted to QMP (we'll
create a new QMP command instead). It uses both qerror_report() and
error_report(). Convert t
When writing to the YEARS_REG register, if the year value is
99 then the multiplication by 31536000 will overflow into
the sign bit of a 32 bit value and then be erroneously
sign-extended if time_t is 64 bits. Add a cast to avoid this.
Signed-off-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
I broke x86 on mainline yesterday for big-endian targets. Sorry for the
incomplete testing after the rebase. Please pull.
r~
The following changes since commit cd2b9b86803e46a09cf239afc44413884efa53f4:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20140512' into
staging (2014-05
We got the wrong version of stl_p, the one that bswaps as appropriate
for the target. Since x86 is always little-endian, the "_le_" routine
will resolve to what we want.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
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