[Mesa-dev] [PATCH v2 03/12] ac: make use of ac_get_store_intr_attribs() where possible

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 75cebf427ad..2f535259f78 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd

[Mesa-dev] [PATCH v2 09/12] ac/nir: use ac_build_buffer_store_dword() for SSBO store operations

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 23 +-- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index af0c3cc679d..f4d408cd587 100644 --- a/src/amd/common

[Mesa-dev] [PATCH v2 08/12] ac/nir: use ac_build_buffer_load() for SSBO load operations

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 35 ++--- 1 file changed, 6 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index a25e5388bce..af0c3cc679d 100644 --- a/src/amd/common

[Mesa-dev] [PATCH v2 04/12] ac/nir: set attrib flags for SSBO and image store operations

For consistency regarding other store operations. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index a7b3fdf64aa..ff29345ffe5

[Mesa-dev] [PATCH v2 07/12] ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations

Use the raw version (ie. IDXEN=0) because vindex is unused. v2: - use raw version Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 66 + 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd

[Mesa-dev] [PATCH v2 12/12] ac: use new LLVM 8 intrinsics in ac_build_buffer_store_dword()

New buffer intrinsics have a separate soffset parameter. v2: - use the raw version as vindex is not used Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 66 ++ 1 file changed, 26 insertions(+), 40 deletions(-) diff --git a/src/amd/common

[Mesa-dev] [PATCH v2 11/12] ac: use new LLVM 8 intrinsic when storing 16-bit values

v2: do not force enable IDXEN when unecessary Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 111 src/amd/common/ac_llvm_build.h | 26 src/amd/common/ac_nir_to_llvm.c | 26 ++-- 3 files changed, 142 insertions(+), 21

[Mesa-dev] [PATCH 1/2] ac: add ac_build_{struct, raw}_tbuffer_load() helpers

The struct version sets IDXEN=1, while the raw version sets IDXEN=0. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c| 48 +++ src/amd/common/ac_llvm_build.h| 37 src/amd/vulkan/radv_nir_to_llvm.c | 13 + 3

[Mesa-dev] [PATCH 2/2] ac: use the raw tbuffer version when for 16-bit SSBO loads

vindex is always 0. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 6 +++--- src/amd/common/ac_llvm_build.h | 1 - src/amd/common/ac_nir_to_llvm.c | 2 -- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common

[Mesa-dev] [PATCH] radv: fix the NUM_RECORDS field for vertex bindings on GFX6/GFX7

Since the driver now uses typed buffer loads, we don't have to account for the format. This fixes few CTS regressions on SI. Fixes: a66b186bebf ("radv: use typed buffer loads for vertex input fetches") Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 3 +--

[Mesa-dev] [PATCH v3 00/11] ac: use LLVM 8 buffer intrinsics everywhere

Hi, This small series makes use of new LLVM 8 buffer intrinsics. No CTS regressions on GFX8 with LLVM 7, 8 and master. v3: use different names (ie. struct vs raw) for IDXEN V2: fix use of IDXEN for GFX9 Please review, Thanks! Samuel Pitoiset (11): ac: make use of ac_get_store_intr_attribs

[Mesa-dev] [PATCH v3 08/11] ac: use new LLVM 8 intrinsics in ac_build_buffer_load()

v3: - always use the raw version as vindex is unused v2: - do not force enable IDXEN when unecessary Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c

[Mesa-dev] [PATCH v3 01/11] ac: make use of ac_get_store_intr_attribs() where possible

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 0cab4d4a9b5..d21cd7e0e28 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd

[Mesa-dev] [PATCH v3 10/11] ac: use new LLVM 8 intrinsic when storing 16-bit values

vindex is always 0. v3: use the raw version v2: do not force enable IDXEN when unecessary Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 20 src/amd/common/ac_llvm_build.h | 9 + src/amd/common/ac_nir_to_llvm.c | 25

[Mesa-dev] [PATCH v3 11/11] ac: use new LLVM 8 intrinsics in ac_build_buffer_store_dword()

New buffer intrinsics have a separate soffset parameter. v3: - use ac_build_raw_tbuffer_store() v2: - use the raw version as vindex is not used Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 66 ++ 1 file changed, 26 insertions(+), 40

[Mesa-dev] [PATCH v3 06/11] ac/nir: use ac_build_buffer_load() for SSBO load operations

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 35 ++--- 1 file changed, 6 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 7f63b506b93..949a7a74834 100644 --- a/src/amd/common

[Mesa-dev] [PATCH v3 09/11] ac: add ac_build_{struct, raw}_tbuffer_store() helpers

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 127 + src/amd/common/ac_llvm_build.h | 29 2 files changed, 156 insertions(+) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 1843bbbee5f

[Mesa-dev] [PATCH v3 04/11] ac/nir: remove one useless check in visit_store_ssbo()

Trivial. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index c77547c319b..247bd20a7ea 100644 --- a/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH v3 07/11] ac/nir: use ac_build_buffer_store_dword() for SSBO store operations

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 23 +-- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 949a7a74834..5aad5807bb5 100644 --- a/src/amd/common

[Mesa-dev] [PATCH v3 05/11] ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations

Use the raw version (ie. IDXEN=0) because vindex is unused. v2: - use raw version Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 66 + 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd

[Mesa-dev] [PATCH v3 03/11] ac: add ac_build_buffer_store_format() helper

Similar to ac_build_buffer_load_format(). v2: - fix out of bounds access Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 100 src/amd/common/ac_llvm_build.h | 11 src/amd/common/ac_nir_to_llvm.c | 29 +++-- 3 files changed, 119

[Mesa-dev] [PATCH v3 02/11] ac/nir: set attrib flags for SSBO and image store operations

For consistency regarding other store operations. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 18297ed99b1..947dc359d49

[Mesa-dev] [PATCH] radv: always initialize HTILE when the src layout is UNDEFINED

in VM faults. Cc: mesa-sta...@lists.freedesktop.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107563 Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/v

[Mesa-dev] [PATCH] radv: always load 3 channels for formats that need to be shuffled

This fixes a rendering issue with Hellblade and DXVK. Fixes: a66b186bebf ("radv: use typed buffer loads for vertex input fetches") Reported-by: Philip Rebohle Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 23 ++- 1 file changed, 14 insert

Re: [Mesa-dev] [PATCH] radv: remove sisched hack for talos

Results of my benchmarks are: 3 runs at 1080p: GFX8: -1% GFX9: -1.12% 3 runs at 4k: GFX8: -2% GFX9: -1.85% I'm actually not sure if we want to remove it... On 3/15/19 11:25 AM, Timothy Arceri wrote: This was added in 8a7d4092d260 but no longer seems to have any impact on performance. ---

[Mesa-dev] [PATCH 1/8] ac: add various int8 definitions

Original patch by Rhys Perry. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 10 -- src/amd/common/ac_llvm_build.h | 2 ++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index

[Mesa-dev] [PATCH 2/8] ac: add ac_build_tbuffer_load_byte() helper

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 18 ++ src/amd/common/ac_llvm_build.h | 8 2 files changed, 26 insertions(+) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index c5f1c85f269..d52f1b3f42d 100644 --- a/src

[Mesa-dev] [PATCH 0/8] radv: VK_KHR_8bit_storage

types to glsl_base_to_llvm_type ac/nir: implement 8-bit conversions radv: enable VK_KHR_8bit_storage Samuel Pitoiset (3): ac: add various int8 definitions ac: add ac_build_tbuffer_load_byte() helper ac: add ac_build_tbuffer_store_byte() helper docs/features.txt | 2 +- src

[Mesa-dev] [PATCH 6/8] ac/nir: add 8-bit types to glsl_base_to_llvm_type

From: Rhys Perry v2: remove 16-bit additions and rebase Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index f3e8f89ba9b..c7212ff3293 100644 --- a/src/amd/com

[Mesa-dev] [PATCH 5/8] ac/nir: implement 8-bit ssbo stores

From: Rhys Perry Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 34c4e2a69fa..f3e8f89ba9b 100644 --- a/src/amd/common/ac_nir_to_llvm

[Mesa-dev] [PATCH 8/8] radv: enable VK_KHR_8bit_storage

From: Rhys Perry Signed-off-by: Rhys Perry --- docs/features.txt | 2 +- src/amd/vulkan/radv_device.c | 9 + src/amd/vulkan/radv_extensions.py | 1 + src/amd/vulkan/radv_shader.c | 1 + 4 files changed, 12 insertions(+), 1 deletion(-) diff --git a/docs/feature

[Mesa-dev] [PATCH 7/8] ac/nir: implement 8-bit conversions

From: Rhys Perry Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 4 1 file changed, 4 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index c7212ff3293..f0b0c24ec08 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/comm

[Mesa-dev] [PATCH 3/8] ac/nir: implement 8-bit push constant, ssbo and ubo loads

From: Rhys Perry Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 65 - 1 file changed, 55 insertions(+), 10 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 7a03e9c15b2..34c4e2a69fa 100644 --- a/sr

[Mesa-dev] [PATCH 4/8] ac: add ac_build_tbuffer_store_byte() helper

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 19 +++ src/amd/common/ac_llvm_build.h | 9 + 2 files changed, 28 insertions(+) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index d52f1b3f42d..f6078634336 100644 --- a

[Mesa-dev] [PATCH v2] radv: only load 2-dwords for vertex buffers when robustness is disabled

-> 120509 (0.43 %) v2: - fix vertex descriptors Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 32 +++ src/amd/vulkan/radv_device.c | 2 ++ src/amd/vulkan/radv_nir_to_llvm.c | 21 +++- src/amd/vulkan/radv_private.h

Re: [Mesa-dev] Mesa (master): nir/spirv: handle kernel function parameters

This commit breaks some CTS with RADV (eg. dEQP-VK.ssbo.phys.layout.single_basic_type.std430.bvec2) and it introduces one compiler warning (minor stuff). Is the Rb tag missing too? Thanks! On 3/19/19 5:57 AM, GitLab Mirror wrote: Module: Mesa Branch: master Commit: c95afe56a8033a87dca71cc931

[Mesa-dev] [PATCH 3/3] radv: improve color image metadata (CMASK/FMASK/DCC) initialization

If an image has CMASK/FMASK or FMASK/DCC it shouldn't be needed to sync between the two clears because they don't initialize the same memory range. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 31 +-- 1 file changed, 13 inserti

[Mesa-dev] [PATCH 1/3] radv: rework radv_init_color_image_metadata()

Unnecessary to have a separate function for CMASK, and calling the radv_clear_XXX() helpers will allow us to remove some cache flushes. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 48 src/amd/vulkan/radv_private.h| 18

[Mesa-dev] [PATCH 2/3] radv: remove unnecessary FLUSH_AND_INV_CB when initializing DCC

The clear operation (ie. compute) doesn't use the CB caches. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5bb3b5

Re: [Mesa-dev] [PATCH 2/3] radv: remove unnecessary FLUSH_AND_INV_CB when initializing DCC

On 3/19/19 1:56 PM, Bas Nieuwenhuizen wrote: That it does not use it is exactly why we need to make sure the CB data is not in the CB cache by flushing it? Why only for DCC? On Tue, Mar 19, 2019 at 12:15 PM Samuel Pitoiset wrote: The clear operation (ie. compute) doesn't use the CB c

Re: [Mesa-dev] [PATCH 2/3] radv: remove unnecessary FLUSH_AND_INV_CB when initializing DCC

enough? On 3/19/19 2:03 PM, Samuel Pitoiset wrote: On 3/19/19 1:56 PM, Bas Nieuwenhuizen wrote: That it does not use it is exactly why we need to make sure the CB data is not in the CB cache by flushing it? Why only for DCC? On Tue, Mar 19, 2019 at 12:15 PM Samuel Pitoiset wrote: The clear

Re: [Mesa-dev] [PATCH v3 06/11] ac/nir: use ac_build_buffer_load() for SSBO load operations

On 3/19/19 8:24 PM, Bas Nieuwenhuizen wrote: On Wed, Mar 13, 2019 at 5:38 PM Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 35 ++--- 1 file changed, 6 insertions(+), 29 deletions(-) diff --git a/src/amd/common

[Mesa-dev] [PATCH] ac: use llvm.amdgcn.fract intrinsic for nir_op_ffract

shaders: SGPRS: 229584 -> 229592 (0.00 %) VGPRS: 163268 -> 163168 (-0.06 %) Spilled SGPRs: 8682 -> 8650 (-0.37 %) Code Size: 12819572 -> 12707884 (-0.87 %) bytes Max Waves: 24398 -> 24392 (-0.02 %) Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 9 -

[Mesa-dev] [PATCH 1/1] nir: add a pass that removes continue blocks

This gives +10% FPS with Doom on my Vega56. Signed-off-by: Samuel Pitoiset --- src/compiler/nir/nir_opt_if.c | 87 +++ 1 file changed, 87 insertions(+) diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index bc128f79f3c..47a8a65aad3

[Mesa-dev] [PATCH 0/1] nir: new pass that removes continue blocks (+10% FPS with Doom on RADV)

s why LLVM isn't able to improve that itself, but I think it might good to have this optimization directly in NIR. Please review, Thanks! Samuel Pitoiset (1): nir: add a pass that removes continue blocks src/compiler/nir/nir_opt_if.c | 87 +++ 1 file c

Re: [Mesa-dev] [PATCH 1/1] nir: add a pass that removes continue blocks

On 3/20/19 11:47 AM, Timothy Arceri wrote: On 20/3/19 9:41 pm, Samuel Pitoiset wrote: 28717 shaders in 14931 tests Totals: SGPRS: 1267317 -> 1267549 (0.02 %) VGPRS: 896876 -> 895920 (-0.11 %) Spilled SGPRs: 24701 -> 26367 (6.74 %) Code Size: 48379452 -> 48507880 (0.27 %) byt

Re: [Mesa-dev] [PATCH 5/8] ac/nir: implement 8-bit ssbo stores

On 3/20/19 1:07 AM, Bas Nieuwenhuizen wrote: On Tue, Mar 19, 2019 at 9:28 AM Samuel Pitoiset wrote: From: Rhys Perry Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH] radv: add missing initializations since VK_EXT_pipeline_creation_feedback

This fixes the world. Fixes: 5f5ac19f138 ("radv: Implement VK_EXT_pipeline_creation_feedback.")" Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b

Re: [Mesa-dev] radv: Implement VK_EXT_pipeline_creation_feedback. - sigfault - bisected

and     the Vega merged stages.     Reviewed-by: Samuel Pitoiset :04 04 ea08bcac9b3630e10bf333c79227bcd0ed9a894b 0924580849d9bc268e47be1248311ff3b5488c86 M src I'm on the 'old' way compiling today: ./autogen.sh --prefix=/usr/local --with-dri-drivers="" --with

[Mesa-dev] [PATCH] ac: add 16-bit support to fract

Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index b5bb399eef1..2c6fecb91db 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd

Re: [Mesa-dev] [PATCH] fix temperature display sign in hud

Hi Benjamin, In my opinion, your commit message is a bit confusing I think you meant "unit" instead of "sign", right? Besides, I'm not sure we want to add a new unit for temperature but I could live with it. Marek, what do you think? See my comments, below. On 09/03/2015 09:43 PM, Benjam

Re: [Mesa-dev] [Mesa-stable] [PATCH v2 2/2] gallium/hud: display the Celsius temperature unit

On 09/04/2015 08:57 PM, Benjamin Bellec wrote: Currently, the temperature is displayed with a "%" symbol in gallium/hud, which is quite odd. Marek suggested to only change the value "100" to another value so that this symbol is no more displayed. That works very well. This is the patch #1. I

[Mesa-dev] [PATCH 0/5] nvc0: split HW/SQ queries in different files

Kepler and I launched some piglit tests related to those queries. No regressions. Feel free to review, Thanks. Samuel. Samuel Pitoiset (5): nvc0: add a header file for nvc0_query nvc0: move nvc0_so_target_save_offset() to its correct location nvc0: move SW queries to nvc0_query_sw.c/h files

[Mesa-dev] [PATCH 1/5] nvc0: add a header file for nvc0_query

This will allow to split SW and HW queries in an upcoming patch. While we are at it, make use of nvc0_query struct instead of pipe_query. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/Makefile.sources | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_context.h| 12

[Mesa-dev] [PATCH 2/5] nvc0: move nvc0_so_target_save_offset() to its correct location

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 21 - src/gallium/drivers/nouveau/nvc0/nvc0_query.h | 3 --- src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 19 +++ 3 files changed, 19 insertions(+), 24 deletions(-) diff

[Mesa-dev] [PATCH 5/5] nvc0: move HW SM queries to nvc0_query_hw_sm.c/h files

Global performance counters (PCOUNTER) will be added to nvc0_query_hw_pm.c/h files. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/Makefile.sources | 2 + src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 707 +-- src/gallium/drivers/nouveau/nvc0

[Mesa-dev] [PATCH 4/5] nvc0: move HW queries to nvc0_query_hw.c/h files

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/Makefile.sources |2 + src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 1122 +-- src/gallium/drivers/nouveau/nvc0/nvc0_query.h | 121 --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c | 1128

[Mesa-dev] [PATCH 3/5] nvc0: move SW queries to nvc0_query_sw.c/h files

Loosely based on freedreno driver. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/Makefile.sources | 2 + src/gallium/drivers/nouveau/nvc0/nvc0_query.c| 31 src/gallium/drivers/nouveau/nvc0/nvc0_query.h| 56 +++ src/gallium/drivers/nouveau/nvc0

Re: [Mesa-dev] [Nouveau] [PATCH] nouveau: make sure there's always room to emit a fence

Reviewed-by: Samuel Pitoiset On 10/05/2015 09:21 PM, Ilia Mirkin wrote: I started seeing a lot of situations on nv30 where fence emission wouldn't fit into the previous buffer (causing assertions). This ensures that whenever checking for space, we always leave a bit of extra room for the

[Mesa-dev] [PATCH] nvc0: fix wrong value for NVC8_COMPUTE_CLASS

Compute class value for GF110+ is 0x91c0 and not 0x92c0. This fixes compute support and MP performance counters on GF110. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nv_object.xml.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE calls, sometimes you add it sometimes not. Did you run a full piglit test this time ? :) See my comment below. On 10/10/2015 11:09 AM, Il

Re: [Mesa-dev] [PATCH] nouveau: avoid emitting new fences unnecessarily

Does this fix those texelFetch piglit tests ? Or is it the second patch ? Anyway, this patch is : Reviewed-by: Samuel Pitoiset On 10/10/2015 08:12 AM, Ilia Mirkin wrote: Right now we emit on every kick, but this is only necessary if something will ever be able to observe that the fence

Re: [Mesa-dev] [Nouveau] [PATCH] nv50, nvc0: don't base decisions on available pushbuf space

On 10/10/2015 09:42 PM, Ilia Mirkin wrote: On Sat, Oct 10, 2015 at 3:41 PM, Samuel Pitoiset wrote: This patch looks fine except that it should be a bit more normalized. I mean, sometimes you break when PUSH_SPACE fails, sometimes not. Same for PUSH_SPACE calls, sometimes you add it sometimes

[Mesa-dev] [PATCH v4] nv50, nvc0: optimize coherent buffer checking at draw time

: - check if views[i] and views[i]->texture are not NULL - fix use of nv50->textures_coherent - check if vb[i].buffer is not NULL - clear out the flag for UBO Changes from v2: - forgot to apply some changes for nv50 (texture/vertex bufs) Signed-off-by: Samuel Pitoiset --- src/gallium/d

[Mesa-dev] [PATCH v3] gallium/tests: fix build with clang compiler

om v2: - fix typo Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75165 Signed-off-by: Samuel Pitoiset --- src/gallium/tests/trivial/compute.c | 603 1 file changed, 330 insertions(+), 273 deletions(-) diff --git a/src/gallium/tests/trivial/compute

Re: [Mesa-dev] [PATCH 5/6] nvc0/ir: add support for PK2H/UP2H

Reviewed-by: Samuel Pitoiset On 01/03/2016 01:38 AM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin --- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 1 + .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 5 - .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 23

[Mesa-dev] [PATCH] st/mesa: fix parameter names for tesseval/tessctrl prototypes

Cc: Ilia Mirkin Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_program.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mesa/state_tracker/st_program.h b/src/mesa/state_tracker/st_program.h index a8571f0..a745315 100644 --- a/src/mesa

Re: [Mesa-dev] [PATCH] st/mesa: fix parameter names for tesseval/tessctrl prototypes

On 01/03/2016 07:03 PM, Ilia Mirkin wrote: Reviewed-by: Ilia Mirkin Can you guess where I copy-pasted these from? :) Two lines above? :-) On Sun, Jan 3, 2016 at 12:47 PM, Samuel Pitoiset wrote: Cc: Ilia Mirkin Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_program.h

Re: [Mesa-dev] [PATCH 5/5] nvc0: add ARB_indirect_parameters support

Did you write piglit tests for this new extension? I don't see any tests which use MultiDrawArraysIndirectCountARB() or MultiDrawElementsIndirectCountARB(). Are you going to submit the rest of the series for nvc0? On 01/02/2016 09:38 PM, Ilia Mirkin wrote: I chose to make separate macros for

Re: [Mesa-dev] [PATCH 1/8] tgsi: add ureg support for image decls

On 01/03/2016 05:37 AM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin --- src/gallium/auxiliary/tgsi/tgsi_build.c| 62 + src/gallium/auxiliary/tgsi/tgsi_dump.c | 10 +-- src/gallium/auxiliary/tgsi/tgsi_parse.c| 4 +- src/gallium/auxilia

Re: [Mesa-dev] [PATCH 2/8] ureg: add buffer support to ureg

I assume this is going to replace the old RES stuff? On 01/03/2016 05:37 AM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin --- src/gallium/auxiliary/tgsi/tgsi_dump.c | 5 +++ src/gallium/auxiliary/tgsi/tgsi_strings.c | 1 + src/gallium/auxiliary/tgsi/tgsi_text.c | 5 +++ src/ga

Re: [Mesa-dev] [PATCH 5/5] nvc0: add ARB_indirect_parameters support

On 01/04/2016 09:18 PM, Ilia Mirkin wrote: On Mon, Jan 4, 2016 at 3:04 PM, Samuel Pitoiset wrote: Did you write piglit tests for this new extension? I don't see any tests which use MultiDrawArraysIndirectCountARB() or MultiDrawElementsIndirectCountARB(). http://patchwork.freedeskto

Re: [Mesa-dev] [PATCH 1/8] tgsi: add ureg support for image decls

On 01/04/2016 09:25 PM, Ilia Mirkin wrote: On Mon, Jan 4, 2016 at 3:13 PM, Samuel Pitoiset wrote: On 01/03/2016 05:37 AM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c b/src/gallium/auxiliary/tgsi/tgsi_strings.c index fd926b3..ae30399

[Mesa-dev] [PATCH] nvc0: remove useless goto in nvc0_launch_grid()

Trivial. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c index 6ce96ae..795c027

[Mesa-dev] [PATCH] nvc0: do not force re-binding of compute constbufs on Fermi

Re-binding compute constant buffers after launching a grid have no effects because they are not currently validated and because dirty_cp is not updated accordingly. This might also prevent weird future behaviours when UBOs will be binded for compute. Signed-off-by: Samuel Pitoiset --- src

Re: [Mesa-dev] [PATCH] glsl: expose accurate gl_MaxCompute* constants rather than cooked values

This patch fixes the following deqp tests related to compute shaders: - max_compute_atomic_counter_buffers - max_compute_atomic_counters - max_compute_image_uniforms - max_compute_uniform_components Thanks for fixing this. Reviewed-by: Samuel Pitoiset On 01/20/2016 09:06 AM, Ilia Mirkin wrote

Re: [Mesa-dev] [PATCH] glsl: Disable tree grafting optimization for shared variables

.functional.compute.basic.shared_atomic_op_single_invocation Tested-by: Samuel Pitoiset On 01/22/2016 01:47 AM, Jordan Justen wrote: Fixes: dEQP-GLES31.functional.compute.basic.shared_atomic_op_multiple_groups From: https://android.googlesource.com/platform/external/deqp Reported-by: Ilia Mirkin Signed-off-by

Re: [Mesa-dev] [PATCH v2 10/10] trace: add support for set_shader_buffers

On 01/19/2016 03:30 AM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin Reviewed-by: Marek Olšák --- src/gallium/drivers/trace/tr_context.c| 38 +++ src/gallium/drivers/trace/tr_dump_state.c | 18 +++ src/gallium/drivers/trace/tr_dump_state.h | 2

[Mesa-dev] [PATCH] trace: fix a segfault when tracing indirect draw calls

Like other resources, the indirect draw buffer must be unwrapped. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/trace/tr_context.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace

[Mesa-dev] [PATCH v2] trace: fix a segfault when tracing indirect draw calls

Like other resources, the indirect draw buffer must be unwrapped. Changes from v2: - do it for indirect_params Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/trace/tr_context.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers

Re: [Mesa-dev] [PATCH v4 11/11] trace: add support for set_shader_buffers

Looks good know. Reviewed-by: Samuel Pitoiset On 01/24/2016 07:59 PM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin Reviewed-by: Marek Olšák (v1) v1 -> v2: add arg_begin/arg_end around buffer array --- src/gallium/drivers/trace/tr_context.c| 40 +++

[Mesa-dev] [PATCH 06/17] gallium: add a new interface for pipe_context::launch_grid()

This introduces pipe_grid_info which contains all information to describe a launch_grid call. This will be used to implement indirect compute in the same fashion as indirect draw. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/ilo/ilo_gpgpu.c| 8 ++ src/gallium

[Mesa-dev] [PATCH 09/17] st/mesa: add a second pipeline for compute

Compute needs a new and different validation path. Signed-off-by: Samuel Pitoiset --- src/gallium/include/state_tracker/st_api.h | 8 + src/mesa/state_tracker/st_atom.c | 48 -- src/mesa/state_tracker/st_atom.h | 4 ++- src/mesa

[Mesa-dev] [PATCH 17/17] st/mesa: expose ARB_compute_shader when compute is supported

Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 2374dcc..ec30d99 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa

[Mesa-dev] [PATCH 15/17] st/mesa: add a state tracker for compute

This state tracker implements DispatchCompute() and DispatchComputeIndirect(). Signed-off-by: Samuel Pitoiset --- src/mesa/Makefile.sources | 2 + src/mesa/state_tracker/st_cb_compute.c | 85 ++ src/mesa/state_tracker/st_cb_compute.h | 38

[Mesa-dev] [PATCH 01/17] mesa: make compute maximums reflect driver-provided values

From: Ilia Mirkin Looks like the various max's were never plumbed through. Signed-off-by: Ilia Mirkin Signed-off-by: Samuel Pitoiset --- src/glsl/builtin_variables.cpp | 15 ++- src/glsl/glsl_parser_extras.cpp | 7 +++ src/glsl/glsl_parser_extras.h| 5 + src

[Mesa-dev] [PATCH 02/17] mesa: do not use a constant for MAX_COMPUTE_SHARED_SIZE

This will allow to query the underlying drivers for the maximum total storage size of all variables declared as with PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE. Signed-off-by: Samuel Pitoiset --- src/glsl/main.cpp| 1 + src/mesa/main/config.h | 5 - src/mesa/main

[Mesa-dev] [PATCH 00/17] st/mesa: add compute shaders support

en if they don't *really* support compute shaders. Comments are very welcome here. Please review, thanks! Ilia Mirkin (1): mesa: make compute maximums reflect driver-provided values Samuel Pitoiset (16): mesa: do not use a constant for MAX_COMPUTE_SHARED_SIZE gallium/cso: add supp

[Mesa-dev] [PATCH 16/17] st/mesa: implement limits for ARB_compute_shader

According to the spec, this also increases the following minimum values: - MAX_COMBINED_TEXTURE_IMAGE_UNITS 96 (6*16), was 80 - MAX_UNIFORM_BUFFER_BINDINGS 72 (6*12), was 60 Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_extensions.c | 24 ++-- 1

[Mesa-dev] [PATCH 07/17] gallium: add indirect compute parameters to pipe_grid_info

Like indirect draw, we need to store a resource and an offset that needs to be 4 byte aligned. When indirect is used, the size of the grid (in blocks) is stored with three 32-bit integers. Signed-off-by: Samuel Pitoiset --- src/gallium/include/pipe/p_state.h | 12 1 file changed

[Mesa-dev] [PATCH 08/17] tgsi/ureg: add shared variables support for compute shaders

This adds a new SHARED attribute to TGSI_FILE_BUFFER. Only one shared buffer can be declared and its size is defined by MAX_COMPUTE_SHARED_SIZE. Note that an atomic buffer can also be shared. Signed-off-by: Samuel Pitoiset --- src/gallium/auxiliary/tgsi/tgsi_build.c| 1 + src/gallium

[Mesa-dev] [PATCH 03/17] gallium/cso: add support for compute shaders

Signed-off-by: Samuel Pitoiset --- src/gallium/auxiliary/cso_cache/cso_context.c | 53 +++ src/gallium/auxiliary/cso_cache/cso_context.h | 6 +++ 2 files changed, 59 insertions(+) diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c b/src/gallium/auxiliary

[Mesa-dev] [PATCH 10/17] st/mesa: add compute shader states

Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_atom.c| 2 +- src/mesa/state_tracker/st_atom.h| 1 + src/mesa/state_tracker/st_atom_shader.c | 36 + src/mesa/state_tracker/st_cb_program.c | 28 +++ src/mesa/state_tracker/st_context.c | 1

[Mesa-dev] [PATCH 13/17] st/mesa: add mappings for compute shader sysvals

LOCAL_INVOCATION_ID, WORK_GROUP_ID and NUM_WORK_GROUPS are respectively mapped to THREAD_ID, BLOCK_ID and GRID_SIZE. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp

[Mesa-dev] [PATCH 12/17] st/mesa: add intrinsics for shared variables

This adds GLSL intrinsics for load/store and atomic operations. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_extensions.c | 3 + src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 95 ++ 2 files changed, 98 insertions(+) diff --git a/src/mesa

[Mesa-dev] [PATCH 05/17] gallium: reserve one shader buffer for shared storage

At least, one shader buffer must be available for compute shaders. Signed-off-by: Samuel Pitoiset --- src/gallium/include/pipe/p_state.h | 2 +- src/mesa/state_tracker/st_extensions.c | 6 -- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/gallium/include/pipe

[Mesa-dev] [PATCH 04/17] gallium: disable compute shaders for meta ops

Loosely based on tessellation shaders. Signed-off-by: Samuel Pitoiset --- src/gallium/auxiliary/hud/hud_context.c| 3 +++ src/gallium/auxiliary/postprocess/pp_run.c | 3 +++ src/gallium/auxiliary/util/u_blit.c| 3 +++ src/mesa/state_tracker/st_cb_bitmap.c | 3 +++ src/mesa

[Mesa-dev] [PATCH 14/17] st/mesa: add state validation for compute shaders

This binds atomics, constants, samplers, ssbos, textures and ubos. Signed-off-by: Samuel Pitoiset --- src/mesa/state_tracker/st_atom.c| 6 src/mesa/state_tracker/st_atom.h| 5 src/mesa/state_tracker/st_atom_atomicbuf.c | 18 +++ src/mesa

[Mesa-dev] [PATCH 11/17] st/mesa: add conversion for compute shaders

The size of shared variables needs to be stored in gl_compute_program in order to set up pipe_compute_state::req_local_mem. According to the spec, there are no predefined inputs nor any fixed-function outputs. Signed-off-by: Samuel Pitoiset --- src/mesa/main/mtypes.h | 5

[Mesa-dev] [PATCH 18/18] trace: add all compute related functions

Signed-off-by: Samuel Pitoiset --- I have forgot this one... src/gallium/drivers/trace/tr_context.c| 80 +++ src/gallium/drivers/trace/tr_dump_state.c | 51 src/gallium/drivers/trace/tr_dump_state.h | 4 ++ src/gallium/drivers/trace

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